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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file halGFLIP.c
98 /// @brief MStar GFLIP DDI HAL LEVEL
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102 #define _HAL_GFLIP_C
103
104 //=============================================================================
105 // Include Files
106 //=============================================================================
107 #include "MsCommon.h"
108 #include "regGOP.h"
109 #include "drvGFLIP.h"
110 #include "halGOP.h"
111 #include "halGFLIP.h"
112
113 //=============================================================================
114 // Compile options
115 //=============================================================================
116
117
118 //=============================================================================
119 // Debug Macros
120 //=============================================================================
121 #define GFLIPHAL_DEBUG
122 #ifdef GFLIPHAL_DEBUG
123 #define GFLIPHAL_PRINT(fmt, args...) printf("[GFLIP (HAL Driver)][%05d] " fmt, __LINE__, ## args)
124 #define GFLIPHAL_ASSERT(_cnd, _fmt, _args...) \
125 if (!(_cnd)) { \
126 GFLIPHAL_PRINT(_fmt, ##_args); \
127 }
128 #else
129 #define GFLIPHAL_PRINT(_fmt, _args...)
130 #define GFLIPHAL_ASSERT(_cnd, _fmt, _args...)
131 #endif
132
133 //=============================================================================
134 // Macros
135 //=============================================================================
136 #define GFLIP_GOP_BANKOFFSET 0x30000UL
137
138 //Mask bits of #define REG_GOP_INT 0x0008
139 #define GOP_INTMASK_VS0 BIT(0)
140 #define GOP_INTMASK_VS1 BIT(1)
141 #define GOP_INT_VS0 BIT(8)
142 #define GOP_INT_VS1 BIT(9)
143
144 //Mask bits of GOPD Int Flag of #define REG_GOP_MUX 0x007e
145 #define GOPD_INT_FLAG BIT(12)
146
147 //Mask bits of Int Flag of #define REG_GOP_WR_ACK 0x007f
148 #define GOP4G_INT_FLAG BIT(4)
149 #define GOP2G_INT_FLAG BIT(5)
150 #define GOP1G_INT_FLAG BIT(6)
151 #define GOP1GX_INT_FLAG BIT(7)
152
153 //=============================================================================
154 // Local Variables
155 //=============================================================================
156
157 //=============================================================================
158 // Global Variables
159 //=============================================================================
160
161 //=============================================================================
162 // Local Function Prototypes
163 //=============================================================================
164 MS_S32 _MHal_GFLIP_DirectSerialDiff(MS_U16 u16TagID1, MS_U16 u16TagID2);
165 MS_U32 _MHal_GFLIP_GetValidGWinIDPerGOPIdx(MS_U32 u32GopIdx, MS_U32 u32GwinIdx);
166
167 //-------------------------------------------------------------------------------------------------
168 /// Differ Two TagIDs.
169 /// @param u16TagID1 \b IN: The First TagID
170 /// @param u16TagID2 \b IN: The Second TagID
171 /// @return MS_S32: The different of two IDs.
172 /// @attention
173 /// <b>[GFLIP] <em> </em></b>
174 //-------------------------------------------------------------------------------------------------
_MHal_GFLIP_DirectSerialDiff(MS_U16 u16TagID1,MS_U16 u16TagID2)175 MS_S32 _MHal_GFLIP_DirectSerialDiff(MS_U16 u16TagID1, MS_U16 u16TagID2)
176 {
177 if(u16TagID1 < u16TagID2)
178 {
179 if((u16TagID2-u16TagID1)>0x7FFF)
180 {
181 return (MS_S32)(0xFFFFUL-u16TagID2+u16TagID1+1);
182 }
183 else
184 return -(MS_S32)(u16TagID2-u16TagID1);
185 }
186 else
187 {
188 if((u16TagID1-u16TagID2)>0x7FFF)
189 {
190 return -(MS_S32)(0xFFFFUL-u16TagID1+u16TagID2+1);
191 }
192 else
193 return (MS_S32)(u16TagID1-u16TagID2);
194 }
195 }
196
197 //-------------------------------------------------------------------------------------------------
198 /// Get Valid GWinID per GopIdx.
199 /// @param u32GopIdx \b IN: The gop idx value
200 /// @param u32GwinIdx \b IN: The gop gwin idx value,
201 /// @return MS_U32 The valid GWinID for related Gop
202 /// @attention
203 /// <b>[GFLIP] <em>GOP0: 0/1/2/3; GOP1: 0/1; GOP2: 1; GOP3: 1</em></b>
204 //-------------------------------------------------------------------------------------------------
_MHal_GFLIP_GetValidGWinIDPerGOPIdx(MS_U32 u32GopIdx,MS_U32 u32GwinIdx)205 MS_U32 _MHal_GFLIP_GetValidGWinIDPerGOPIdx(MS_U32 u32GopIdx, MS_U32 u32GwinIdx)
206 {
207 switch(u32GopIdx)
208 {
209 case GFLIP_GOP_IDX_4G:
210 case GFLIP_GOP_IDX_2G:
211 u32GwinIdx = u32GwinIdx % 2;
212 break;
213 case GFLIP_GOP_IDX_1G:
214 case GFLIP_GOP_IDX_1GX:
215 u32GwinIdx = 0; //only GWin 1 is valid;
216 break;
217 default:
218 break;
219 }
220
221 return u32GwinIdx;
222 }
223
224 ////////////////////////////////////////////////////////////////////////////////////////////////////////
225
226 //=============================================================================
227 // HAL Driver Function
228 //=============================================================================
229 //-------------------------------------------------------------------------------------------------
230 /// Enable/Disable Vsync. Interrupt of gop.
231 /// @param u32GopIdx \b IN: The gop idx which need enable/disable vsync. interrupt
232 /// @param bEnable \b IN: enable or disable
233 /// @return TRUE/FALSE
234 /// @attention
235 /// <b>[GFLIP] <em> </em></b>
236 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_IntEnable(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx,MS_BOOL bEnable)237 MS_BOOL MHal_GFLIP_IntEnable(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_BOOL bEnable)
238 {
239 MS_U16 u16RegVal;
240
241 if(bEnable)
242 {
243 u16RegVal = GOP_INTMASK_VS1;
244 }
245 else
246 {
247 u16RegVal = GOP_INTMASK_VS0 | GOP_INTMASK_VS1;
248 }
249
250 HAL_GOP_Write16Reg(pGOPHalLocal, (GFLIP_GOP_BANKOFFSET*u32GopIdx) + GOP_4G_INT, u16RegVal, (GOP_INTMASK_VS0 | GOP_INTMASK_VS1));
251
252 return TRUE;
253 }
254
255 //-------------------------------------------------------------------------------------------------
256 /// check if the vsync. interrupt
257 /// @param void
258 /// @return MS_BOOL: TRUE/FALSE
259 /// @attention
260 /// <b>[GFLIP] <em> </em></b>
261 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_IsVSyncInt(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx)262 MS_BOOL MHal_GFLIP_IsVSyncInt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx)
263 {
264 MS_U32 u32RegAddr;
265 MS_U16 u16RegVal=0;
266
267 switch(u32GopIdx)
268 {
269 default:
270 case GFLIP_GOP_IDX_4G:
271 u32RegAddr = GOP_4G_INT;
272 break;
273 case GFLIP_GOP_IDX_2G:
274 u32RegAddr = GOP_2G_INT;
275 break;
276 case GFLIP_GOP_IDX_1G:
277 u32RegAddr = GOP_1G_INT;
278 break;
279 case GFLIP_GOP_IDX_1GX:
280 u32RegAddr = GOP_1GX_INT;
281 break;
282 }
283
284 HAL_GOP_Read16Reg(pGOPHalLocal, u32RegAddr, &u16RegVal);
285
286 if(u16RegVal & GOP_INT_VS0)
287 {
288 return TRUE;
289 }
290
291 return FALSE;
292 }
293
294 //-------------------------------------------------------------------------------------------------
295 /// Kick off Flip to Gop HW.
296 /// @param u32GopIdx \b IN: The gop idx who is the flip owner
297 /// @param u32GwinIdx \b IN: The gwin idx who is the flip owner
298 /// @param u32Addr \b IN: The flip address
299 /// @return TRUE: success
300 /// @return FALSE: fail
301 /// @attention
302 /// <b>[GFLIP] <em> </em></b>
303 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_SetFlipToGop(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx,MS_U32 u32GwinIdx,MS_U32 u32Addr)304 MS_BOOL MHal_GFLIP_SetFlipToGop(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U32 u32GwinIdx, MS_U32 u32Addr)
305 {
306 MS_U16 u16FWR=0;
307
308 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_BAK_SEL, &u16FWR);
309
310 u32GwinIdx = _MHal_GFLIP_GetValidGWinIDPerGOPIdx(u32GopIdx, u32GwinIdx);
311
312 if(u32GopIdx)
313 {
314 HAL_GOP_Write32Reg(pGOPHalLocal, GOP_2G_DRAM_RBLK_L(u32GwinIdx), u32Addr);
315 }
316 else
317 {
318 HAL_GOP_Write32Reg(pGOPHalLocal, GOP_4G_DRAM_RBLK_L(u32GwinIdx), u32Addr);
319 }
320
321 if((u16FWR&GOP_VAL_FWR) == 0)
322 {
323 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
324 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
325 }
326
327 return TRUE;
328 }
329
330 //-------------------------------------------------------------------------------------------------
331 /// Clear DWinIRQ if It happened.
332 /// @return TRUE: success
333 /// @return FALSE: fail
334 /// @attention
335 /// <b>[GFLIP] <em> </em></b>
336 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_ClearDWINIRQ(GOP_CTX_HAL_LOCAL * pGOPHalLocal,GFLIP_DWININT_INFO * pGFlipDWinIntInfo)337 MS_BOOL MHal_GFLIP_ClearDWINIRQ(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GFLIP_DWININT_INFO *pGFlipDWinIntInfo)
338 {
339 MS_U16 u16ValEn=0, u16ValDe;
340
341 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_MUX, &u16ValEn);
342
343 if(!(u16ValEn & GOPD_INT_FLAG))
344 {
345 return FALSE;
346 }
347
348 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_DW_INT_MASK, &u16ValEn);
349 u16ValDe = u16ValEn;
350
351 //Check and Clear DWin IRQs:
352 if(u16ValEn & GOP_DWIN_INT_WADR)
353 {
354 u16ValEn &= ~GOP_DWIN_INTMASK_WADR;
355 u16ValDe |= GOP_DWIN_INTMASK_WADR;
356 pGFlipDWinIntInfo->sDwinIntInfo.bDWinIntWADR = 0x1;
357 }
358
359 if(u16ValEn & GOP_DWIN_INT_PROG)
360 {
361 u16ValEn &= ~GOP_DWIN_INTMASK_PROG;
362 u16ValDe |= GOP_DWIN_INTMASK_PROG;
363 pGFlipDWinIntInfo->sDwinIntInfo.bDWinIntPROG = 0x1;
364 }
365
366 if(u16ValEn & GOP_DWIN_INT_TF)
367 {
368 u16ValEn &= ~GOP_DWIN_INTMASK_TF;
369 u16ValDe |= GOP_DWIN_INTMASK_TF;
370 pGFlipDWinIntInfo->sDwinIntInfo.bDWinIntTF = 0x1;
371 }
372
373 if(u16ValEn & GOP_DWIN_INT_BF)
374 {
375 u16ValEn &= ~GOP_DWIN_INTMASK_BF;
376 u16ValDe |= GOP_DWIN_INTMASK_BF;
377 pGFlipDWinIntInfo->sDwinIntInfo.bDWinIntBF = 0x1;
378 }
379
380 if(u16ValEn & GOP_DWIN_INT_VS)
381 {
382 u16ValEn &= ~GOP_DWIN_INTMASK_VS;
383 u16ValDe |= GOP_DWIN_INTMASK_VS;
384 pGFlipDWinIntInfo->sDwinIntInfo.bDWinIntVS = 0x1;
385 }
386
387 //Disable Interrupt:
388 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_DW_INT_MASK, u16ValDe, GOP_REG_LW_MASK);
389 //Enable Interrupt:
390 HAL_GOP_Write16Reg(pGOPHalLocal, GOP_DW_INT_MASK, u16ValEn, GOP_REG_LW_MASK);
391
392 return TRUE;
393 }
394
395 //-------------------------------------------------------------------------------------------------
396 /// Handle HW Limitation -- Vsync Limitation.
397 /// @param u32GopIdx \b IN: The gop idx who is the owner
398 /// @return TRUE: success
399 /// @return FALSE: fail
400 /// @attention
401 /// <b>[GFLIP] <em>The Limitation is found on U3/T2/T3. When GOP Src Clock is no signal and GOP
402 /// Vsync is on, Then there will be no chance to Reset GOP Vsync Interrupt. this will leads to
403 /// system looks like hang(busy handling interrupt always). T2/T3/U3 will Switch GOP Dst
404 /// to OP to fix the issue and later chips could Reset GOP to clear interrupt Bit.</em></b>
405 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_HandleVsyncLimitation(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx)406 MS_BOOL MHal_GFLIP_HandleVsyncLimitation(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx)
407 {
408 //Save Current Dst Clock Src:
409 HAL_GOP_GetGOPDst(pGOPHalLocal, u32GopIdx, &pGOPHalLocal->drvGFlipGOPDst[u32GopIdx]);
410 //Set Dst Clock Src to OP:
411 HAL_GOP_SetGOPClk(pGOPHalLocal, u32GopIdx, E_DRV_GOP_DST_OP0);
412
413
414 return TRUE;
415 }
416
417 //-------------------------------------------------------------------------------------------------
418 /// Restore HW Limitation -- Vsync Limitation.
419 /// @param u32GopIdx \b IN: The gop idx who is the owner
420 /// @return TRUE: success
421 /// @return FALSE: fail
422 /// @attention
423 /// <b>[GFLIP] <em>The Limitation is found on U3/T2/T3. When GOP Src Clock is no signal and GOP
424 /// Vsync is on, Then there will be no chance to Reset GOP Vsync Interrupt. this will leads to
425 /// system looks like hang(busy handling interrupt always). T2/T3/U3 will Switch GOP Dst
426 /// to OP to fix the issue and later chips could Reset GOP to clear interrupt Bit.</em></b>
427 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_RestoreFromVsyncLimitation(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U32 u32GopIdx)428 MS_BOOL MHal_GFLIP_RestoreFromVsyncLimitation(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx)
429 {
430 //Restore Dst Clock Src:
431 HAL_GOP_SetGOPClk(pGOPHalLocal, u32GopIdx, pGOPHalLocal->drvGFlipGOPDst[u32GopIdx]);
432
433 //Restore Interrupt:
434 MHal_GFLIP_IntEnable(pGOPHalLocal, u32GopIdx, TRUE);
435
436 //Restore Current Dst Clock Src to OP:
437 pGOPHalLocal->drvGFlipGOPDst[u32GopIdx] = E_DRV_GOP_DST_OP0;
438
439 return TRUE;
440 }
441
442 //-------------------------------------------------------------------------------------------------
443 /// Check If the gived TagId has back or not.
444 /// @param u32TagId \b IN: The TagId which need to be check
445 /// @return TRUE: back
446 /// @return FALSE: not back
447 /// @attention
448 /// <b>[GFLIP] <em> </em></b>
449 //-------------------------------------------------------------------------------------------------
MHal_GFLIP_IsTagIDBack(GOP_CTX_HAL_LOCAL * pGOPHalLocal,MS_U16 u16TagId)450 MS_BOOL MHal_GFLIP_IsTagIDBack(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U16 u16TagId)
451 {
452 MS_U16 u16TagIDHW=0;
453 MS_U16 u16RegVal=0;
454 MS_U32 u32RegVal=0;
455
456 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_TAG, &u16TagIDHW);
457
458 if(_MHal_GFLIP_DirectSerialDiff(u16TagIDHW, u16TagId) >= 0)
459 { //TagID is back!
460 // printk("tagIDHW = %04x\n", tagID_HW);
461 return TRUE;
462 }
463
464 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_STATUS, &u16RegVal);
465
466 if((u16RegVal & GOP_GE_CMDQ1_STATUS) < (16UL<<3)) //still has commands in queue.
467 {
468 return FALSE;
469 }
470
471 if((u16RegVal & GOP_GE_CMDQ2_STATUS) < (16UL<<11)) //still has commands in queue.
472 {
473 return FALSE;
474 }
475
476 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_FMT_BLT, &u16RegVal);
477
478 if(u16RegVal & GOP_GE_EN_VCMDQ) //still has commands in VCMDQ.
479 {
480 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_VQ_FIFO_STATUS_L, &u16RegVal);
481 u32RegVal = u16RegVal;
482 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_VQ_FIFO_STATUS_H, &u16RegVal);
483 u32RegVal |= (u16RegVal&1);
484 if(u32RegVal)
485 {
486 return FALSE;
487 }
488 }
489
490 HAL_GOP_Read16Reg(pGOPHalLocal, GOP_GE_STATUS, &u16RegVal);
491 if(u16RegVal & GOP_GE_BUSY) //GE still busy
492 {
493 return FALSE;
494 }
495
496 return TRUE;
497 }
498