1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
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20 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
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90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 #include "MsCommon.h"
100 #ifndef MSOS_TYPE_LINUX_KERNEL
101 #include <string.h>
102 #endif
103 #include "regGE.h"
104 #include "drvGE.h"
105 #include "halGE.h"
106 #include "halCHIP.h"
107 #ifdef MSOS_TYPE_LINUX
108 #include "halMPool.h"
109 #endif
110 #ifdef CLK_MANAGEMENT
111 #include "drvCLKM.h"
112 #endif
113
114 //-------------------------------------------------------------------------------------------------
115 // Driver Compiler Options
116 //-------------------------------------------------------------------------------------------------
117 #define GE_DITHER_RAND_ENABLE 0UL //[TBD] Add new option for SetDither if rand is used in the future.
118 #define GE_PATCH_ENABLE 0UL
119
120 #define GE_LOG_ENABLE 0UL
121 #define MS_DEBUG 1UL
122
123 //-------------------------------------------------------------------------------------------------
124 // Local Defines
125 //-------------------------------------------------------------------------------------------------
126 #define GE_MIU_ADDR_MASK 0x7FFFFFFFUL
127
128 #define GE_CMDQ_FREECNT() ((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ_MASK)>>GE_STAT_CMDQ_SHFT)
129 #define GE_VCMDQ_FREECNT() (GE_REG(REG_GE_VCMDQ_STAT) + ((GE_REG(REG_GE_BIST_STAT)&GE_VCMDQ_STAT_H_MASK) << 16))
130
131 #define GE_BUSY() (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
132
133 #define GE_CMDQ_ENABLE 1UL // Always Enable
134 #define GE_CMD_SIZE_MAX GE_STAT_CMDQ_MAX
135 #define GE_VCMD_SIZE_MAX GE_STAT_VCMDQ_MAX
136 #define GE_CMD_SIZE 1UL // 1 queue entry available for 2 commands, but we just check entry for convenience
137
138 #define GE_MAP_VCMD_SIZE_TO_HWDEF(x) ((x))
139
140 #define GE_YIELD() MsOS_YieldTask()
141 #define GE_DELAY() MsOS_DelayTask(2)
142
143 #ifdef MS_DEBUG
144 #define GE_DBG(_fmt, _args...) printf(_fmt, ##_args)
145 #else
146 #define GE_DBG(_fmt, _args...) { }
147 #endif
148 #define GE_BURST_LEN 128UL
149
150 //-------------------------------------------------------------------------------------------------
151 // Local Structures
152 //-------------------------------------------------------------------------------------------------
153
154
155 //-------------------------------------------------------------------------------------------------
156 // Global Variables
157 //------------------------------------------------------------------------------------------------- // line pattern reset
158
159
160 const MS_U8 _GE_Reg_Backup[] = {
161 REG_GE_EN, REG_GE_CFG, REG_GE_TH, REG_GE_ROP2, REG_GE_BLEND, REG_GE_ALPHA, REG_GE_ALPHA_CONST,
162 REG_GE_SCK_HTH_L, REG_GE_SCK_HTH_H, REG_GE_SCK_LTH_L, REG_GE_SCK_LTH_H, REG_GE_DCK_HTH_L,
163 REG_GE_DCK_HTH_H, REG_GE_DCK_LTH_L, REG_GE_DCK_LTH_H, REG_GE_OP_MODE, REG_GE_ATEST_TH,
164 REG_GE_YUV_MODE, REG_GE_SRC_BASE_L, REG_GE_SRC_BASE_H, REG_GE_DST_BASE_L, REG_GE_DST_BASE_H,
165 REG_GE_SRC_PITCH, REG_GE_DST_PITCH, REG_GE_FMT,
166 0x0035, 0x0036, 0x0037, 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, // I0~I4
167 0x003f, 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047, 0x0048, // I5-I9
168 0x0049, 0x004a, 0x004b, 0x004c, 0x004d, 0x004e, 0x004f, 0x0050, 0x0051, 0x0052, // I10-I14
169 0x0053, 0x0054, // I15
170 REG_GE_CLIP_L, REG_GE_CLIP_R, REG_GE_CLIP_T, REG_GE_CLIP_B, REG_GE_ROT_MODE, REG_GE_BLT_SCK_MODE,
171 REG_GE_BLT_SCK_CONST_L, REG_GE_BLT_SCK_CONST_H, REG_GE_BLT_DST_X_OFST, REG_GE_BLT_DST_Y_OFST,
172 REG_GE_LINE_DELTA, REG_GE_LINE_STYLE, REG_GE_LINE_LENGTH, REG_GE_BLT_SRC_DX, REG_GE_BLT_SRC_DY,
173 REG_GE_ITALIC_OFFSET, REG_GE_ITALIC_DELTA, REG_GE_PRIM_V0_X, REG_GE_PRIM_V0_Y, REG_GE_PRIM_V1_X,
174 REG_GE_PRIM_V1_Y, REG_GE_PRIM_V2_X, REG_GE_PRIM_V2_Y, REG_GE_BLT_SRC_W, REG_GE_BLT_SRC_H,
175 REG_GE_PRIM_C_L, REG_GE_PRIM_C_H, REG_GE_PRIM_RDX_L, REG_GE_PRIM_RDX_H, REG_GE_PRIM_RDY_L,
176 REG_GE_PRIM_RDY_H, REG_GE_PRIM_GDX_L, REG_GE_PRIM_GDX_H, REG_GE_PRIM_GDY_L, REG_GE_PRIM_GDY_H,
177 REG_GE_PRIM_BDX_L, REG_GE_PRIM_BDX_H, REG_GE_PRIM_BDY_L, REG_GE_PRIM_BDY_H, REG_GE_PRIM_ADX,
178 REG_GE_PRIM_ADY, 0xFF
179 };
180
181 //-------------------------------------------------------------------------------------------------
182 // Debug Functions
183 //-------------------------------------------------------------------------------------------------
184
185
186 //------------------------------------------------------------------------------
187 // Local Var
188 //------------------------------------------------------------------------------
189 GE_CHIP_PROPERTY g_GeChipPro =
190 {
191 .WordUnit = GE_WordUnit,
192
193 .bSupportFourePixelMode = TRUE,
194 .bFourPixelModeStable = TRUE,
195
196 .bSupportMultiPixel = FALSE,
197 .bSupportSpiltMode = TRUE,
198 .bSupportTwoSourceBitbltMode = FALSE,
199 .bSupportTLBMode = FALSE,
200 .MIUSupportMaxNUM = GE_MAX_MIU,
201 .BltDownScaleCaps =
202 {
203 .u8RangeMax = 1,
204 .u8RangeMin = 32,
205 .u8ContinuousRangeMin = 1,
206 .bFullRangeSupport = TRUE,
207
208 .u8ShiftRangeMax = 0, /// 1 = 2^0 = 1<<0
209 .u8ShiftRangeMin = 5, /// 32 = 2^5 = 1<<5
210 .u8ShiftContinuousRangeMin = 0, /// 1 = 2^0 = 1<<0
211 }
212 };
213
214 //-------------------------------------------------------------------------------------------------
215 // Local Functions
216 //-------------------------------------------------------------------------------------------------
GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL * pGEHalLocal)217 void GE_Chip_Proprity_Init(GE_CTX_HAL_LOCAL *pGEHalLocal)
218 {
219 pGEHalLocal->pGeChipPro = &g_GeChipPro;
220 }
221
_GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_ScaleInfo * pScaleinfo)222 GE_Result _GE_SetBltScaleRatio2HW(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_ScaleInfo *pScaleinfo)
223 {
224 MS_U16 u16RegVal;
225
226 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DX, (MS_U16)(pScaleinfo->x&0xFFFF));
227 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SRC_DY, (MS_U16)(pScaleinfo->y&0xFFFF));
228 //Set Initial DeltaX, DeltaY:
229 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, (MS_U16)(pScaleinfo->init_x&0xFFFF));
230 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, (MS_U16)(pScaleinfo->init_y&0xFFFF));
231
232 //set MSBs of REG_GE_BLT_SRC_DY, REG_GE_BLT_SRC_DY:
233 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST) & ~(GE_STBB_DX_MSB);
234 u16RegVal |= (((pScaleinfo->x>>16)<<GE_STBB_DX_MSB_SHFT) & GE_STBB_DX_MSB);
235 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_X_OFST, u16RegVal);
236
237 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST) & ~(GE_STBB_DY_MSB);
238 u16RegVal |= (((pScaleinfo->y>>16)<<GE_STBB_DY_MSB_SHFT) & GE_STBB_DY_MSB);
239 GE_WriteReg(pGEHalLocal, REG_GE_BLT_DST_Y_OFST, u16RegVal);
240
241 return E_GE_OK;
242 }
243
GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL * pGEHalLocal)244 void GE_SetActiveCtrlMiu1(GE_CTX_HAL_LOCAL *pGEHalLocal)
245 {
246 MIU1_REG(MIU1_GEGROUP) = MIU1_REG(MIU1_GEGROUP)|MIU1_GE_CLIENT;
247 }
248
249 //-------------------------------------------------------------------------------------------------
250 // Global Functions
251 //-------------------------------------------------------------------------------------------------
GE_DumpReg(GE_CTX_HAL_LOCAL * pGEHalLocal)252 static void GE_DumpReg(GE_CTX_HAL_LOCAL *pGEHalLocal)
253 {
254 MS_U32 i;
255
256 printf("Dump GE register:\n");
257 for (i = 0; i < 0x80; i++)
258 {
259 if(i % 0x08 == 0) {
260 printf(" \n");
261 printf("h%02x ", (MS_U8)i );
262 }
263 printf("%04x ", GE_REG(i) );
264 }
265
266 printf(" \n");
267 }
_GET_MIU_MASK_SHIFT(void)268 static MS_U32 _GET_MIU_MASK_SHIFT(void)
269 {
270 if (HAL_MIU1_BASE==0x20000000)
271 return (29UL);
272 else if (HAL_MIU1_BASE==0x10000000)
273 return (28UL);
274 else if (HAL_MIU1_BASE==0x8000000)
275 return (27UL);
276 else if (HAL_MIU1_BASE==0x4000000)
277 return (26UL);
278 else if (HAL_MIU1_BASE==0x60000000)
279 return (29UL);
280 else
281 {
282 printf("\n[%s] !!!!!! get miu1 base error!!!!!!", __FUNCTION__);
283 return (27UL); //default return case
284 }
285 }
286
_GFXAPI_MIU_ID(MS_PHY ge_fbaddr)287 MS_U8 _GFXAPI_MIU_ID(MS_PHY ge_fbaddr)
288 {
289 #if 1
290 if(ge_fbaddr>=HAL_MIU2_BASE)
291 {
292 return 2;
293 }
294 else if(ge_fbaddr>=HAL_MIU1_BASE)
295 {
296 return 1;
297 }
298 else
299 {
300 return 0;
301 }
302 #else
303 return ((MS_U8) (((ge_fbaddr)>>_GET_MIU_MASK_SHIFT())&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1)));
304
305 #endif
306 }
307
_GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)308 MS_PHY _GFXAPI_PHYS_ADDR_IN_MIU(MS_PHY ge_fbaddr)
309 {
310 #if 1
311 if(ge_fbaddr>=HAL_MIU2_BASE)
312 {
313 return (ge_fbaddr -= HAL_MIU2_BASE);
314 }
315 else if(ge_fbaddr>=HAL_MIU1_BASE)
316 {
317 return (ge_fbaddr -= HAL_MIU1_BASE);
318 }
319 else
320 {
321 return (ge_fbaddr);
322 }
323 #else
324 return ((ge_fbaddr)&((1UL<<_GET_MIU_MASK_SHIFT())-1));
325 #endif
326 }
327
_GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId,MS_PHY ge_addrInMIU)328 MS_PHY _GFXAPI_PHYS_ADDR_2_API(MS_U8 u8MIUId, MS_PHY ge_addrInMIU)
329 {
330 #if 1
331 if(u8MIUId == 2)
332 {
333 return (HAL_MIU2_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
334 }
335 else if(u8MIUId == 1)
336 {
337 return (HAL_MIU1_BASE| (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
338 }
339 else
340 {
341 return (ge_addrInMIU&((1UL<<_GET_MIU_MASK_SHIFT())-1));
342 }
343 #else
344
345 return (((((MS_U32)(u8MIUId))&((1UL<<GE_FB_ADDR_MIU_MASK_BIT)-1))<<_GET_MIU_MASK_SHIFT()) | \
346 (((MS_U32)(ge_addrInMIU))&((1UL<<_GET_MIU_MASK_SHIFT())-1)));
347 #endif
348 }
349
GE_Reset(GE_CTX_HAL_LOCAL * pGEHalLocal)350 static void GE_Reset(GE_CTX_HAL_LOCAL *pGEHalLocal)
351 {
352 MS_U16 reg0, reg1;
353
354 reg0 = GE_REG(REG_GE_EN);
355 reg1 = GE_REG(REG_GE_CFG);
356
357 GE_REG(REG_GE_EN) = 0;
358 GE_REG(REG_GE_CFG) = 0;
359
360 GE_REG(REG_GE_EN) = reg0;
361 GE_REG(REG_GE_CFG) = reg1;
362
363 }
364
GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)365 static MS_U8 GE_MapVQ2Reg(GE_VcmqBufSize enBufSize)
366 {
367 switch(enBufSize)
368 {
369 case E_GE_VCMD_4K:
370 return GE_VQ_8K;
371 case E_GE_VCMD_8K:
372 return GE_VQ_8K;
373 case E_GE_VCMD_16K:
374 return GE_VQ_16K;
375 case E_GE_VCMD_32K:
376 return GE_VQ_32K;
377 case E_GE_VCMD_64K:
378 return GE_VQ_64K;
379 case E_GE_VCMD_128K:
380 return GE_VQ_128K;
381 case E_GE_VCMD_256K:
382 return GE_VQ_256K;
383 case E_GE_VCMD_512K:
384 return GE_VQ_512K;
385 case E_GE_VCMD_1024K:
386 return GE_VQ_1024K;
387 default:
388 return 0;
389 }
390 }
391
GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U32 u32Count)392 void GE_WaitCmdQAvail(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U32 u32Count)
393 {
394 #if GE_CMDQ_ENABLE
395
396 #ifdef MS_DEBUG
397 MS_U32 waitcount = 0;
398 #endif
399 MS_U16 tmp1 = 0;
400 MS_U32 u32CmdMax;
401
402 /// VCMQ enabled
403 if((GE_REG(REG_GE_CFG) & GE_CFG_VCMDQ) != 0)
404 {
405 // 16 Bytes one command in VCMDQ.
406 u32CmdMax = (512 << (GE_REG(REG_GE_VCMDQ_SIZE) & 0x7));
407 u32Count = MIN(u32CmdMax, u32Count);
408
409 while (GE_CMDQ_FREECNT() < u32Count)
410 {
411 #ifdef MS_DEBUG
412 if (waitcount >= 0x80000)
413 {
414 printf("[GE] V0 Wait command queue: %d : %x, %tx\n", tmp1, GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
415 waitcount = 0;
416 tmp1++;
417 if(tmp1 > 10)
418 {
419 GE_DumpReg(pGEHalLocal);
420 GE_Reset(pGEHalLocal);
421 }
422 }
423 waitcount++;
424 #endif
425 GE_YIELD();
426 }
427 tmp1 = 0;
428 waitcount = 0;
429
430
431 //If u32Count >= u32CmdMax, It will be dead loop. But since it won't happen, and if match
432 //Full VCMDQ, hw will hang, so keep the logic.
433 while ( (MS_U32)GE_VCMDQ_FREECNT() >= (MS_U32)(u32CmdMax- u32Count))
434 {
435 #ifdef MS_DEBUG
436 if (waitcount >= 0x80000)
437 {
438 printf("[GE] Wait VCMQ : %d : %tx, %tx \n", tmp1, (ptrdiff_t)GE_VCMDQ_FREECNT(), (ptrdiff_t)u32Count);
439 waitcount = 0;
440 tmp1++;
441 if(tmp1 > 10)
442 {
443 GE_DumpReg(pGEHalLocal);
444 GE_Reset(pGEHalLocal);
445 }
446 }
447 waitcount++;
448 #endif
449 GE_YIELD();
450 }
451 }
452 else
453 {
454 u32Count = MIN(GE_CMD_SIZE_MAX, u32Count);
455
456 while (GE_CMDQ_FREECNT() < u32Count)
457 {
458 #ifdef MS_DEBUG
459 if (waitcount >= 0x80000)
460 {
461 printf("[GE] Wait command queue: %d : %x, %tx \n", tmp1, GE_CMDQ_FREECNT(), (ptrdiff_t)u32Count);
462 waitcount = 0;
463 tmp1++;
464 if(tmp1 > 10)
465 {
466 GE_DumpReg(pGEHalLocal);
467 GE_Reset(pGEHalLocal);
468 }
469 }
470 waitcount++;
471 #endif
472 GE_YIELD();
473 }
474
475 }
476
477 #endif
478 }
479
GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_APIAddrInMIU)480 MS_PHY GE_ConvertAPIAddr2HAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_APIAddrInMIU)
481 {
482 PhyGE_APIAddrInMIU &= (1UL<<MIU_SELETE_OFFSET)-1UL;
483 if(u8MIUId==1)
484 PhyGE_APIAddrInMIU |= 1UL<<MIU_SELETE_OFFSET;
485 return PhyGE_APIAddrInMIU;
486 }
GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8MIUId,MS_PHY PhyGE_HALAddr)487 MS_PHY GE_ConvertHALAddr2API(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8MIUId, MS_PHY PhyGE_HALAddr)
488 {
489 return _GFXAPI_PHYS_ADDR_2_API(u8MIUId, PhyGE_HALAddr&((1UL<<MIU_SELETE_OFFSET)-1));
490 }
491
GE_WaitIdle(GE_CTX_HAL_LOCAL * pGEHalLocal)492 void GE_WaitIdle(GE_CTX_HAL_LOCAL *pGEHalLocal)
493 {
494 #ifdef MS_DEBUG
495 MS_U32 waitcount = 0;
496 #endif
497 MS_U16 tmp1 = 0;
498
499 GE_WriteReg(pGEHalLocal, REG_GE_TAG, GE_GetNextTAGID(pGEHalLocal, FALSE)); // write dummy
500 // GE will pack 2 register commands before CMDQ
501 // We need to push fifo if there is one command in the fifo before
502 // CMDQ. Then the GE status register will be consistant after idle.
503 GE_WaitCmdQAvail(pGEHalLocal, GE_STAT_CMDQ_MAX); // Wait CMDQ empty
504
505 // Wait level-2 command queue flush
506 while (((GE_REG(REG_GE_STAT)&GE_STAT_CMDQ2_MASK)>>GE_STAT_CMDQ2_SHFT) != GE_STAT_CMDQ2_MAX)
507 {
508 #ifdef MS_DEBUG
509 if (waitcount >= 0x80000)
510 {
511 printf("[GE] Wait Idle: %u : %x\n", tmp1, GE_CMDQ_FREECNT());
512 waitcount = 0;
513 tmp1++;
514 if(tmp1 > 10)
515 {
516 GE_DumpReg(pGEHalLocal);
517 GE_Reset(pGEHalLocal);
518 }
519 }
520 waitcount++;
521 #endif
522
523 GE_YIELD();
524 }
525
526 #ifdef MS_DEBUG
527 waitcount = 0;
528 tmp1 = 0;
529 #endif
530 // Wait GE idle
531 while (GE_REG(REG_GE_STAT) & GE_STAT_BUSY)
532 {
533 #ifdef MS_DEBUG
534 if (waitcount >= 0x80000)
535 {
536 printf("[GE] Wait Busy: %d : %x\n", tmp1, GE_CMDQ_FREECNT());
537 waitcount = 0;
538 tmp1++;
539 if(tmp1 > 10)
540 {
541 GE_DumpReg(pGEHalLocal);
542 GE_Reset(pGEHalLocal);
543 }
544 }
545 waitcount++;
546 #endif
547
548 GE_YIELD();
549 }
550
551 }
552
GE_Map_Share_Reg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)553 GE_Result GE_Map_Share_Reg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
554 {
555 if(addr == REG_GE_CFG)
556 return E_GE_OK;
557 else
558 return E_GE_FAIL;
559 #if 0
560 switch(addr)
561 {
562 case REG_GE_CFG:
563 return E_GE_OK;
564 default:
565 return E_GE_FAIL;
566 }
567 #endif
568
569 }
570
GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)571 GE_Result GE_Map_Share_RegEX(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
572 {
573 return E_GE_FAIL;
574 }
575
GE_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)576 MS_U16 GE_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
577 {
578 MS_U16 u16NoFIFOMask;
579
580 if(GE_TABLE_REGNUM <= addr)
581 {
582 GE_WaitIdle(pGEHalLocal);
583 return GE_REG(addr-GE_TABLE_REGNUM);
584 }
585 switch (addr)
586 {//for registers which do not go through command queue
587 case REG_GE_EN:
588 u16NoFIFOMask = GE_EN_GE;
589 break;
590 /*
591 case REG_GE_CFG:
592 //u16NoFIFOMask = ~(GE_CFG_BLT_STRETCH|GE_CFG_EN_CLIPCHK|GE_CFG_BLT_ITALIC|GE_CFG_SRC_TILE|GE_CFG_DST_TILE);
593 return pGEHalLocal->u16RegImage[addr];
594 break;
595 */
596 case REG_GE_DBG:
597 case REG_GE_TH:
598 case REG_GE_BIST_STAT:
599 case REG_GE_STAT:
600 case REG_GE_VCMDQ_STAT:
601 case REG_GE_MIU_PROT_LTH_L(0):
602 case REG_GE_MIU_PROT_LTH_H(0):
603 case REG_GE_MIU_PROT_HTH_L(0):
604 case REG_GE_MIU_PROT_HTH_H(0):
605 case REG_GE_MIU_PROT_LTH_L(1):
606 case REG_GE_MIU_PROT_LTH_H(1):
607 case REG_GE_MIU_PROT_HTH_L(1):
608 case REG_GE_MIU_PROT_HTH_H(1):
609 case REG_GE_TAG:
610 case REG_GE_VCMDQ_BASE_L:
611 case REG_GE_VCMDQ_BASE_H:
612 u16NoFIFOMask = 0xffff;
613 break;
614 case REG_GE_VCMDQ_SIZE:
615 u16NoFIFOMask = GE_VCMDQ_SIZE_MASK;
616 break;
617 default:
618 u16NoFIFOMask = 0;
619 break;
620 }
621
622 if(0 == u16NoFIFOMask)
623 {
624 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
625 return pGEHalLocal->pHALShared->u16ShareRegImage[addr];
626 else
627 {
628 return pGEHalLocal->u16RegGETable[addr];
629 }
630 }
631 return (GE_REG(addr)&u16NoFIFOMask)|(pGEHalLocal->u16RegGETable[addr]&~u16NoFIFOMask);
632 }
633
634
GE_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)635 void GE_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
636 {
637 // CMDQ special command
638 if(addr < GE_TABLE_REGNUM)
639 {
640 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
641 {
642 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= value;
643 }
644
645 pGEHalLocal->u16RegGETable[addr] = value;
646 }
647 else
648 {
649 printf("[%s][%d] Reg Index [%d]is out of GE_TABLE_REGNUM [0x%lx]range!!!!\n",__FUNCTION__,__LINE__, addr, GE_TABLE_REGNUM);
650 }
651
652 if(pGEHalLocal->pHALShared->bGE_DirectToReg ==TRUE)
653 {
654 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
655 GE_REG(addr)= value;
656 return;
657 }
658 else
659 {
660 MS_U16 i=0;
661
662 switch (addr)
663 {
664 case REG_GE_EN:
665 case REG_GE_CFG:
666 case REG_GE_DBG:
667 case REG_GE_TH:
668 case REG_GE_BIST_STAT:
669 case REG_GE_STAT:
670 case REG_GE_VCMDQ_STAT:
671 case REG_GE_MIU_PROT_LTH_L(0):
672 case REG_GE_MIU_PROT_LTH_H(0):
673 case REG_GE_MIU_PROT_HTH_L(0):
674 case REG_GE_MIU_PROT_HTH_H(0):
675 case REG_GE_MIU_PROT_LTH_L(1):
676 case REG_GE_MIU_PROT_LTH_H(1):
677 case REG_GE_MIU_PROT_HTH_L(1):
678 case REG_GE_MIU_PROT_HTH_H(1):
679 case REG_GE_TAG:
680 case REG_GE_VCMDQ_BASE_L:
681 case REG_GE_VCMDQ_BASE_H:
682 case REG_GE_VCMDQ_SIZE:
683
684 //Palette
685 case REG_GE_CLUT_L:
686 case REG_GE_CLUT_H:
687 case REG_GE_CLUT_CTRL:
688 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
689 GE_REG(addr) = value;
690 break;
691
692 case REG_GE_CMD:
693 GE_WaitIdle(pGEHalLocal);
694
695 for(i=0; i<GE_TABLE_REGNUM; i++)
696 {
697 //CMQ/Palette
698 if(i==REG_GE_EN || i==REG_GE_CFG || i==REG_GE_DBG || i==REG_GE_TH || i==REG_GE_VCMDQ_STAT || i==REG_GE_BIST_STAT \
699 || i==REG_GE_MIU_PROT_LTH_L(0) || i==REG_GE_MIU_PROT_LTH_H(0) || i==REG_GE_MIU_PROT_HTH_L(0) || i==REG_GE_MIU_PROT_HTH_H(0)\
700 || i==REG_GE_MIU_PROT_LTH_L(1) || i==REG_GE_MIU_PROT_LTH_H(1) || i==REG_GE_MIU_PROT_HTH_L(1) || i==REG_GE_MIU_PROT_HTH_H(1)\
701 || i==REG_GE_VCMDQ_BASE_L || i==REG_GE_VCMDQ_BASE_H || i==REG_GE_VCMDQ_SIZE \
702 || i==REG_GE_CLUT_L || i==REG_GE_CLUT_H || i==REG_GE_CLUT_CTRL || i==REG_GE_TAG)
703 {
704 continue;
705 }
706
707 if(i == REG_GE_CMD )
708 {
709 continue;
710 }
711
712 if(i == (GE_TABLE_REGNUM-1))
713 {
714 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
715 GE_REG(REG_GE_CMD)= pGEHalLocal->u16RegGETable[REG_GE_CMD];
716 }
717 else
718 {
719 if (GE_WordUnit/*256bit*//4/*32bit*/*16*2 < (GE_TABLE_REGNUM-20))
720 {
721 if(i%64==0)
722 GE_WaitCmdQAvail(pGEHalLocal, GE_CMD_SIZE);
723 }
724 GE_REG(i)= pGEHalLocal->u16RegGETable[i];
725 }
726 }
727 break;
728 default:
729 #if GE_LOG_ENABLE
730 GE_LOG(addr, value);
731 #endif
732 break;
733 }
734
735 }
736
737 }
738
GE2_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr)739 MS_U16 GE2_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr)
740 {
741 return 0;
742 }
743
GE_RestoreReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)744 void GE_RestoreReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
745 {
746 // CMDQ special command
747 switch (addr)
748 {
749 case REG_GE_CMD:
750 break;
751 //[OBSOLETE]
752 default:
753 GE_WriteReg(pGEHalLocal, addr, value);
754 break;
755 }
756 }
757
758
GE_ResetState(GE_CTX_HAL_LOCAL * pGEHalLocal)759 void GE_ResetState(GE_CTX_HAL_LOCAL *pGEHalLocal)
760 {
761 GE_WaitIdle(pGEHalLocal);
762
763 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE);
764 #if GE_DITHER_RAND_ENABLE
765 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE | GE_EN_DITHER_RAND); //fixed random dither by default
766 #endif
767 GE_WriteReg(pGEHalLocal, REG_GE_TH, 0x0000); //0(<half) will be default to be half
768
769 GE_WriteReg(pGEHalLocal, REG_GE_LINE_STYLE, GE_LINEPAT_RST);
770 GE_WriteReg(pGEHalLocal, REG_GE_BLT_SCK_MODE, GE_BLT_SCK_NEAREST);
771 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, GE_ALPHA_ARGB1555); //force alpha constant of ARGB"1"555 to be 1.0 by default
772 }
773
774
GE_Init_RegImage(GE_CTX_HAL_LOCAL * pGEHalLocal)775 void GE_Init_RegImage(GE_CTX_HAL_LOCAL *pGEHalLocal)
776 {
777 MS_U8 addr;
778
779 for(addr = 0; addr<GE_TABLE_REGNUM; addr++)
780 {
781 if(GE_Map_Share_Reg(pGEHalLocal,addr)== E_GE_OK)
782 pGEHalLocal->pHALShared->u16ShareRegImage[addr]= GE_REG(addr);
783 pGEHalLocal->u16RegGETable[addr] = GE_REG(addr);
784 }
785
786 }
787
GE_Init(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Config * cfg)788 void GE_Init(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Config *cfg)
789 {
790 MS_U16 u16temp =0;
791
792 GE_WaitIdle(pGEHalLocal);
793
794 GE_SetClock(pGEHalLocal,TRUE);
795
796 u16temp = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
797
798 if ((u16temp & BIT(1)) != BIT(1)) //if VQ is Not Enabled
799 {
800 #if GE_CMDQ_ENABLE
801 GE_WriteReg(pGEHalLocal, REG_GE_CFG, 0);
802 GE_WriteReg(pGEHalLocal, REG_GE_CFG, GE_CFG_CMDQ); // enable command queue
803 #endif
804
805 GE_WriteReg(pGEHalLocal, REG_GE_EN, 0);
806 GE_WriteReg(pGEHalLocal, REG_GE_EN, GE_EN_GE);
807
808 // Set default FMT for avoiding 1st set buffinfo error.
809 GE_WriteReg(pGEHalLocal, REG_GE_FMT, (GE_FMT_ARGB1555<<GE_SRC_FMT_SHFT)+(GE_FMT_ARGB1555<<GE_DST_FMT_SHFT));
810
811 if (cfg->u32VCmdQSize >= GE_VCMDQ_SIZE_MIN)
812 {
813 MS_PHY PhyVQAddr = cfg->PhyVCmdQAddr;
814 GE_WriteReg(pGEHalLocal, REG_GE_CFG, 0);
815 GE_WriteReg(pGEHalLocal, REG_GE_CFG, GE_CFG_CMDQ | GE_CFG_VCMDQ);
816
817 GE_SetVQBufMIUId(pGEHalLocal, _GFXAPI_MIU_ID(PhyVQAddr));
818 PhyVQAddr = GE_ConvertAPIAddr2HAL(pGEHalLocal, _GFXAPI_MIU_ID(PhyVQAddr), _GFXAPI_PHYS_ADDR_IN_MIU(PhyVQAddr));
819
820 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, (MS_U32)(PhyVQAddr) & 0xFFFF);
821 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, (MS_U32)(PhyVQAddr) >> 16);
822 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_SIZE, GE_MapVQ2Reg(cfg->u32VCmdQSize));
823 }
824
825 GE_ResetState(pGEHalLocal);
826 }
827 else
828 {
829 //No need to set command queue
830 printf(" warning!!! Virtual Command queue has been activated!! \n");
831 }
832 //GE_Init_RegImage(pGEHalLocal);
833
834 GE_WriteReg(pGEHalLocal, REG_GE_TH, GE_THRESHOLD_SETTING);
835 GE_WriteReg(pGEHalLocal, REG_GE_CFG, GE_ReadReg(pGEHalLocal, REG_GE_CFG)|GE_BIT15); //GE power saving
836 //Mask Interrupt
837 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, 0x00C0);
838
839 GE_EnableDynaClkGate(pGEHalLocal,TRUE);
840 }
841
GE_SetRotate(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RotateAngle geRotAngle)842 GE_Result GE_SetRotate(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RotateAngle geRotAngle)
843 {
844 MS_U16 u16RegVal;
845
846 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_ROT_MODE) & ~REG_GE_ROT_MODE_MASK) | (geRotAngle<<REG_GE_ROT_MODE_SHFT);
847 GE_WriteReg(pGEHalLocal, REG_GE_ROT_MODE, u16RegVal);
848
849 return E_GE_OK;
850 }
851
GE_SetOnePixelMode(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)852 GE_Result GE_SetOnePixelMode(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
853 {
854
855 MS_U16 u16en;
856 //GE_DBG("%s\n", __FUNCTION__);
857
858 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
859 if (enable)
860 {
861 u16en |= GE_EN_ONE_PIXEL_MODE;
862 }
863 else
864 {
865 u16en &= (~GE_EN_ONE_PIXEL_MODE);
866 }
867 u16en |= GE_EN_BURST;
868 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en);
869
870 return E_GE_OK;
871 }
872
GE_SetBlend(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BlendOp eBlendOp)873 GE_Result GE_SetBlend(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BlendOp eBlendOp)
874 {
875 MS_U16 u16op;
876
877 switch (eBlendOp)
878 {
879 case E_GE_BLEND_ONE:
880 case E_GE_BLEND_CONST:
881 case E_GE_BLEND_ASRC:
882 case E_GE_BLEND_ADST:
883 case E_GE_BLEND_ROP8_ALPHA:
884 case E_GE_BLEND_ROP8_SRCOVER:
885 case E_GE_BLEND_ROP8_DSTOVER:
886 case E_GE_BLEND_ZERO:
887 case E_GE_BLEND_CONST_INV:
888 case E_GE_BLEND_ASRC_INV:
889 case E_GE_BLEND_ADST_INV:
890 case E_GE_BLEND_ALPHA_ADST:
891 case E_GE_BLEND_SRC_ATOP_DST:
892 case E_GE_BLEND_DST_ATOP_SRC:
893 case E_GE_BLEND_SRC_XOR_DST:
894 case E_GE_BLEND_INV_CONST:
895
896 u16op = eBlendOp;
897 break;
898 default:
899 return E_GE_FAIL_PARAM;
900 break;
901 }
902
903 u16op = (GE_ReadReg(pGEHalLocal, REG_GE_BLEND) & ~GE_BLEND_MASK) | u16op;
904 GE_WriteReg(pGEHalLocal, REG_GE_BLEND, u16op);
905
906 return E_GE_OK;
907 }
908
909
GE_SetAlpha(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_AlphaSrc eAlphaSrc)910 GE_Result GE_SetAlpha(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_AlphaSrc eAlphaSrc)
911 {
912 MS_U16 u16src;
913
914 switch (eAlphaSrc)
915 {
916 case E_GE_ALPHA_CONST:
917 case E_GE_ALPHA_ASRC:
918 case E_GE_ALPHA_ADST:
919 case E_GE_ALPHA_ROP8_SRC:
920 case E_GE_ALPHA_ROP8_IN:
921 case E_GE_ALPHA_ROP8_DSTOUT:
922 case E_GE_ALPHA_ROP8_SRCOUT:
923 case E_GE_ALPHA_ROP8_OVER:
924 case E_GE_ALPHA_ROP8_INV_CONST:
925 case E_GE_ALPHA_ROP8_INV_ASRC:
926 case E_GE_ALPHA_ROP8_INV_ADST:
927 case E_GE_ALPHA_ROP8_SRC_ATOP_DST:
928 case E_GE_ALPHA_ROP8_DST_ATOP_SRC:
929 case E_GE_ALPHA_ROP8_SRC_XOR_DST:
930 case E_GE_ALPHA_ROP8_INV_SRC_ATOP_DST:
931 case E_GE_ALPHA_ROP8_INV_DST_ATOP_SRC:
932
933 u16src = eAlphaSrc;
934 break;
935 default:
936 return E_GE_FAIL_PARAM;
937 break;
938 }
939
940 u16src = (GE_ReadReg(pGEHalLocal, REG_GE_ALPHA) & ~GE_ALPHA_MASK) | (u16src<<GE_ALPHA_SHFT);
941 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA, u16src);
942
943 return E_GE_OK;
944 }
945
GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 * pU16SupportedBldFlags)946 GE_Result GE_QueryDFBBldCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 *pU16SupportedBldFlags)
947 {
948 if(NULL == pU16SupportedBldFlags)
949 {
950 return E_GE_FAIL_PARAM;
951 }
952
953 (*pU16SupportedBldFlags) = E_GE_DFB_BLD_FLAG_ALL;
954
955 return E_GE_OK;
956 }
957
GE_EnableDFBBld(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)958 GE_Result GE_EnableDFBBld(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
959 {
960 MS_U16 u16RegVal;
961
962 u16RegVal = GE_ReadReg(pGEHalLocal, REG_GE_EN);
963
964 if (enable)
965 {
966 u16RegVal |= GE_EN_DFB_BLD;
967 }
968 else
969 {
970 u16RegVal &= ~GE_EN_DFB_BLD;
971 }
972
973 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16RegVal);
974
975 return E_GE_OK;
976 }
977
GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16DFBBldFlags)978 GE_Result GE_SetDFBBldFlags(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16DFBBldFlags)
979 {
980 MS_U16 u16RegVal;
981
982 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS) & ~GE_DFB_BLD_FLAGS_MASK);
983
984 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORALPHA)
985 {
986 u16RegVal |= GE_DFB_BLD_FLAG_COLORALPHA;
987 }
988
989 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_ALPHACHANNEL)
990 {
991 u16RegVal |= GE_DFB_BLD_FLAG_ALPHACHANNEL;
992 }
993
994 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_COLORIZE)
995 {
996 u16RegVal |= GE_DFB_BLD_FLAG_COLORIZE;
997 }
998
999 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMUL)
1000 {
1001 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMUL;
1002 }
1003
1004 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_SRCPREMULCOL)
1005 {
1006 u16RegVal |= GE_DFB_BLD_FLAG_SRCPREMULCOL;
1007 }
1008
1009 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DSTPREMUL)
1010 {
1011 u16RegVal |= GE_DFB_BLD_FLAG_DSTPREMUL;
1012 }
1013
1014 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_XOR)
1015 {
1016 u16RegVal |= GE_DFB_BLD_FLAG_XOR;
1017 }
1018
1019 if(u16DFBBldFlags & E_GE_DFB_BLD_FLAG_DEMULTIPLY)
1020 {
1021 u16RegVal |= GE_DFB_BLD_FLAG_DEMULTIPLY;
1022 }
1023
1024 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_FLAGS, u16RegVal);
1025
1026
1027 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~GE_DFB_SRC_COLORMASK);
1028
1029 if(u16DFBBldFlags & (E_GE_DFB_BLD_FLAG_SRCCOLORMASK | E_GE_DFB_BLD_FLAG_SRCALPHAMASK))
1030 {
1031 u16RegVal |= (1 << GE_DFB_SRC_COLORMASK_SHIFT);
1032 }
1033
1034
1035
1036 return E_GE_OK;
1037 }
1038
GE_SetDFBBldOP(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_DFBBldOP geSrcBldOP,GE_DFBBldOP geDstBldOP)1039 GE_Result GE_SetDFBBldOP(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_DFBBldOP geSrcBldOP, GE_DFBBldOP geDstBldOP)
1040 {
1041 MS_U16 u16RegVal;
1042
1043 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_DFB_BLD_OP) & ~(GE_DFB_SRCBLD_OP_MASK|GE_DFB_DSTBLD_OP_MASK));
1044 u16RegVal |= ((geSrcBldOP<<GE_DFB_SRCBLD_OP_SHFT) | (geDstBldOP<<GE_DFB_DSTBLD_OP_SHFT));
1045
1046 GE_WriteReg(pGEHalLocal, REG_GE_DFB_BLD_OP, u16RegVal);
1047
1048 return E_GE_OK;
1049 }
1050
GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1051 GE_Result GE_SetDFBBldConstColor(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1052 {
1053 MS_U16 u16RegVal;
1054
1055 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_CONST_MASK) | (geRgbColor.a & 0xFF));
1056 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1057
1058 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_R_CONST) & ~GE_R_CONST_MASK) | ((geRgbColor.r<<GE_R_CONST_SHIFT) & GE_R_CONST_MASK));
1059 GE_WriteReg(pGEHalLocal, REG_GE_R_CONST, u16RegVal);
1060
1061 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_G_CONST) & ~GE_G_CONST_MASK) | ((geRgbColor.g<<GE_G_CONST_SHIFT) & GE_G_CONST_MASK));
1062 GE_WriteReg(pGEHalLocal, REG_GE_G_CONST, u16RegVal);
1063
1064 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_B_CONST) & ~GE_B_CONST_MASK) | ((geRgbColor.b<<GE_B_CONST_SHIFT) & GE_B_CONST_MASK));
1065 GE_WriteReg(pGEHalLocal, REG_GE_B_CONST, u16RegVal);
1066
1067 return E_GE_OK;
1068 }
1069
GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_RgbColor geRgbColor)1070 GE_Result GE_SetDFBBldSrcColorMask(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_RgbColor geRgbColor)
1071 {
1072 //no more hw function
1073 /*
1074 MS_U16 u16RegVal;
1075
1076 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_ALPHA_CONST) & ~GE_ALPHA_SRCMASK_MASK) | (geRgbColor.a & 0xFF));
1077 GE_WriteReg(pGEHalLocal, REG_GE_ALPHA_CONST, u16RegVal);
1078
1079 u16RegVal = ((GE_ReadReg(pGEHalLocal, REG_GE_OP_MODE) & ~GE_SRCCOLOR_MASK_R) | ((geRgbColor.r<<GE_SRCCOLOR_MASK_R_SHIFT) & GE_SRCCOLOR_MASK_R));
1080 GE_WriteReg(pGEHalLocal, REG_GE_OP_MODE, u16RegVal);
1081
1082 u16RegVal = (geRgbColor.g<<GE_SRCCOLOR_MASK_G_SHIFT) | (geRgbColor.b<<GE_SRCCOLOR_MASK_B_SHIFT);
1083 GE_WriteReg(pGEHalLocal, REG_GE_SRCMASK_GB, u16RegVal);
1084 */
1085 return E_GE_OK;
1086 }
1087
1088
GE_WriteProtect(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY addr_low,MS_PHY addr_high,GE_WPType eWPType)1089 GE_Result GE_WriteProtect(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY addr_low, MS_PHY addr_high, GE_WPType eWPType)
1090 {
1091 MS_U16 u16cfg;
1092
1093 if (miu > 2)
1094 {
1095 return E_GE_FAIL;
1096 }
1097
1098 if ( (eWPType == E_GE_WP_IN_RANGE) || (eWPType == E_GE_WP_OUT_RANGE) )
1099 {
1100 // range setting
1101 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_L(miu), addr_low & (GE_MIU_ADDR_MASK&0xFFFF));
1102 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_LTH_H(miu), ((addr_low>>16) & (GE_MIU_ADDR_MASK>>16)) | (eWPType<<GE_MIU_PROT_MODE_SHFT));
1103 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_L(miu), addr_high & (GE_MIU_ADDR_MASK&0xFFFF));
1104 GE_WriteReg(pGEHalLocal, REG_GE_MIU_PROT_HTH_H(miu), (addr_high>>16) & (GE_MIU_ADDR_MASK>>16));
1105 // enable setting
1106 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) | (GE_CFG_MIU0_PROT << miu);
1107 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1108 }
1109 else if (eWPType == E_GE_WP_DISABLE)
1110 {
1111 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_CFG) & ~(GE_CFG_MIU0_PROT<<miu);
1112 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16cfg);
1113 }
1114 else
1115 {
1116 return E_GE_FAIL;
1117 }
1118
1119 return E_GE_OK;
1120 }
1121
1122
GE_SetSrcTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1123 GE_Result GE_SetSrcTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1124 {
1125 //GE_DBG("%s\n", __FUNCTION__);
1126
1127 return E_GE_NOT_SUPPORT;
1128
1129 }
1130
1131
GE_SetDstTile(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL tile)1132 GE_Result GE_SetDstTile(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL tile)
1133 {
1134 //GE_DBG("%s\n", __FUNCTION__);
1135
1136 return E_GE_NOT_SUPPORT;
1137
1138 }
GE_SetASCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1139 GE_Result GE_SetASCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1140 {
1141 MS_U16 u16cfg;
1142
1143 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1144 if (enable)
1145 {
1146 u16cfg |= GE_EN_ASCK;
1147 }
1148 else
1149 {
1150 u16cfg &= ~GE_EN_ASCK;
1151 }
1152 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1153
1154 return E_GE_OK;
1155 }
GE_SetADCK(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1156 GE_Result GE_SetADCK(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL enable)
1157 {
1158 MS_U16 u16cfg;
1159
1160 u16cfg = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1161 if (enable)
1162 {
1163 u16cfg |= GE_EN_DSCK;
1164 }
1165 else
1166 {
1167 u16cfg &= ~GE_EN_DSCK;
1168 }
1169 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16cfg);
1170
1171 return E_GE_OK;
1172 }
1173
1174
GE_GetFmtCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_BufFmt fmt,GE_BufType type,GE_FmtCaps * caps)1175 GE_Result GE_GetFmtCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_BufFmt fmt, GE_BufType type, GE_FmtCaps *caps)
1176 {
1177 static const MS_U8 _u8GETileWidth[] = {8, 4, 2, 0, 1};
1178
1179 caps->fmt = fmt;
1180 if (type == E_GE_BUF_SRC)
1181 {
1182 switch (fmt)
1183 {
1184 case E_GE_FMT_I1:
1185 case E_GE_FMT_I2:
1186 case E_GE_FMT_I4:
1187 case E_GE_FMT_I8:
1188 caps->u8BaseAlign = 1;
1189 caps->u8PitchAlign = 1;
1190 caps->u8Non1pAlign = 0;
1191 caps->u8HeightAlign = 1;
1192 caps->u8StretchAlign = 1;
1193 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1194 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1195 caps->u8TileHeightAlign = 16;
1196 break;
1197 case E_GE_FMT_RGB565:
1198 case E_GE_FMT_RGBA5551:
1199 case E_GE_FMT_RGBA4444:
1200 case E_GE_FMT_ARGB1555:
1201 case E_GE_FMT_1ABFgBg12355:
1202 case E_GE_FMT_ARGB4444:
1203 case E_GE_FMT_YUV422:
1204 case E_GE_FMT_FaBaFgBg2266:
1205 caps->u8BaseAlign = 2;
1206 caps->u8PitchAlign = 2;
1207 caps->u8Non1pAlign = 0;
1208 caps->u8HeightAlign = 1;
1209 caps->u8StretchAlign = 2;
1210 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1211 caps->u8TileWidthAlign = 16;
1212 caps->u8TileHeightAlign = 16;
1213 break;
1214 case E_GE_FMT_ABGR8888:
1215 case E_GE_FMT_ARGB8888:
1216 caps->u8BaseAlign = 4;
1217 caps->u8PitchAlign = 4;
1218 caps->u8Non1pAlign = 0;
1219 caps->u8HeightAlign = 1;
1220 caps->u8StretchAlign = 4;
1221 caps->u8TileBaseAlign = 0x80;//[HWBUG] 8;
1222 caps->u8TileWidthAlign = 8;
1223 caps->u8TileHeightAlign = 16;
1224 break;
1225 // Not Support
1226 default:
1227 caps->fmt = E_GE_FMT_GENERIC;
1228 caps->u8BaseAlign = 4;
1229 caps->u8PitchAlign = 4;
1230 caps->u8Non1pAlign = 0;
1231 caps->u8HeightAlign = 1;
1232 caps->u8StretchAlign = 4;
1233 caps->u8TileBaseAlign = 0;
1234 caps->u8TileWidthAlign = 0;
1235 caps->u8TileHeightAlign = 0;
1236 return E_GE_FAIL_FORMAT;
1237 }
1238 }
1239 else
1240 {
1241 switch (fmt)
1242 {
1243 case E_GE_FMT_I8:
1244 caps->u8BaseAlign = 1;
1245 caps->u8PitchAlign = 1;
1246 caps->u8Non1pAlign = 0;
1247 caps->u8HeightAlign = 1;
1248 caps->u8StretchAlign = 1;
1249 caps->u8TileBaseAlign = 8;
1250 caps->u8TileWidthAlign = _u8GETileWidth[fmt];
1251 caps->u8TileHeightAlign = 16;
1252 break;
1253 case E_GE_FMT_RGB565:
1254 case E_GE_FMT_ARGB1555:
1255 case E_GE_FMT_RGBA5551:
1256 case E_GE_FMT_RGBA4444:
1257 case E_GE_FMT_1ABFgBg12355:
1258 case E_GE_FMT_ARGB4444:
1259 case E_GE_FMT_YUV422:
1260 case E_GE_FMT_FaBaFgBg2266:
1261 case E_GE_FMT_ARGB1555_DST:
1262 caps->u8BaseAlign = 2;
1263 caps->u8PitchAlign = 2;
1264 caps->u8Non1pAlign = 0;
1265 caps->u8HeightAlign = 1;
1266 caps->u8StretchAlign = 2;
1267 caps->u8TileBaseAlign = 8;
1268 caps->u8TileWidthAlign = 16;
1269 caps->u8TileHeightAlign = 16;
1270 break;
1271 case E_GE_FMT_ABGR8888:
1272 case E_GE_FMT_ARGB8888:
1273 caps->u8BaseAlign = 4;
1274 caps->u8PitchAlign = 4;
1275 caps->u8Non1pAlign = 0;
1276 caps->u8HeightAlign = 1;
1277 caps->u8StretchAlign = 4;
1278 caps->u8TileBaseAlign = 8;
1279 caps->u8TileWidthAlign = 8;
1280 caps->u8TileHeightAlign = 16;
1281 break;
1282 // Not Support
1283 case E_GE_FMT_I1:
1284 case E_GE_FMT_I2:
1285 case E_GE_FMT_I4:
1286 default:
1287 caps->fmt = E_GE_FMT_GENERIC;
1288 caps->u8BaseAlign = 4;
1289 caps->u8PitchAlign = 4;
1290 caps->u8Non1pAlign = 0;
1291 caps->u8HeightAlign = 1;
1292 caps->u8StretchAlign = 4;
1293 caps->u8TileBaseAlign = 0;
1294 caps->u8TileWidthAlign = 0;
1295 caps->u8TileHeightAlign = 0;
1296 return E_GE_FAIL_FORMAT;
1297 }
1298 }
1299
1300 return E_GE_OK;
1301 }
1302
1303
GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1304 GE_Result GE_Set_IOMap_Base(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1305 {
1306 pGEHalLocal->va_mmio_base = addr;
1307 return E_GE_OK;
1308 }
1309
1310
direct_serial_diff(MS_U16 tagID1,MS_U16 tagID2)1311 static MS_S32 direct_serial_diff( MS_U16 tagID1, MS_U16 tagID2)
1312 {
1313 if(tagID1 < tagID2)
1314 {
1315 if((tagID2-tagID1)>0x7FFF)
1316 {
1317 return (MS_S32)(0xFFFFUL-tagID2+tagID1+1);
1318 }
1319 else
1320 return -(MS_S32)(tagID2-tagID1);
1321 }
1322 else
1323 {
1324 if((tagID1-tagID2)>0x7FFF)
1325 {
1326 return -(MS_S32)(0xFFFF-tagID1+tagID2+1);
1327 }
1328 else
1329 return (MS_S32)(tagID1-tagID2);
1330 }
1331 }
1332
1333 //-------------------------------------------------------------------------------------------------
1334 /// Wait GE TagID back
1335 /// @param tagID \b IN: tag id number for wating
1336 /// @return @ref GE_Result
1337 //-------------------------------------------------------------------------------------------------
GE_WaitTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tagID)1338 GE_Result GE_WaitTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tagID)
1339 {
1340 MS_U16 tagID_HW;
1341 MS_U32 u32Temp;
1342
1343
1344 while(1)
1345 {
1346
1347 tagID_HW = GE_ReadReg(pGEHalLocal, REG_GE_TAG);
1348 if(direct_serial_diff(tagID_HW, tagID) >= 0)
1349 {
1350 //printf("tagIDHW = %04x %04x\n", tagID_HW, tagID);
1351 break;
1352 }
1353 GE_DELAY();
1354
1355 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_STAT);
1356 if((u32Temp&GE_STAT_CMDQ_MASK) < (16UL<<11))
1357 continue;
1358 if((u32Temp&GE_STAT_CMDQ2_MASK) < (16UL<<3))
1359 continue;
1360 if(GE_ReadReg(pGEHalLocal, REG_GE_CFG) & GE_CFG_VCMDQ)
1361 {
1362 u32Temp = GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_STAT);
1363 u32Temp |= (GE_ReadReg(pGEHalLocal, REG_GE_BIST_STAT)&1)<<16;
1364 if(u32Temp)
1365 continue;
1366
1367 }
1368
1369 if(GE_ReadReg(pGEHalLocal, REG_GE_STAT) & GE_STAT_BUSY)
1370 continue;
1371
1372 break;
1373 }
1374
1375 return E_GE_OK;
1376
1377 }
1378 //-------------------------------------------------------------------------------------------------
1379 /// MDrv_GE_SAVE_CHIP_IMAGE
1380 //-------------------------------------------------------------------------------------------------
GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal)1381 GE_Result GE_Restore_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal)
1382 {
1383 MS_U16 i = 0;
1384 MS_U16 u16RegVal;
1385
1386 //GE_WaitIdle(pGEHalLocal);
1387
1388 while( (_GE_Reg_Backup[i] != 0xFF) )
1389 {
1390 if(_GE_Reg_Backup[i]>= 0x80)
1391 {
1392 break;
1393 }
1394
1395 u16RegVal = GE_ReadReg(pGEHalLocal, _GE_Reg_Backup[i]);
1396 GE_RestoreReg(pGEHalLocal, _GE_Reg_Backup[i], u16RegVal);
1397 i++;
1398 }
1399
1400 //GE_DBG(printf("GE_Restore_HAL_Context finished \n\n"));
1401
1402 return E_GE_OK;
1403 }
1404
1405 //-------------------------------------------------------------------------------------------------
1406 /// Calculate Blit Scale Ratio:
1407 //-------------------------------------------------------------------------------------------------
GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 u16SrcWidth,MS_U16 u16SrcHeight,MS_U16 u16DstWidth,MS_U16 u16DstHeight,GE_ScaleInfo * pScaleinfo)1408 GE_Result GE_CalcBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 u16SrcWidth, MS_U16 u16SrcHeight, MS_U16 u16DstWidth, MS_U16 u16DstHeight, GE_ScaleInfo *pScaleinfo)
1409 {
1410 if(NULL == pScaleinfo)
1411 {
1412 return E_GE_FAIL_PARAM;
1413 }
1414
1415 if(u16SrcWidth >= (u16DstWidth<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1416 {
1417 pScaleinfo->x = 0xFFFFFFFF;
1418 }
1419 else
1420 {
1421 pScaleinfo->x = GE_Divide2Fixed(u16SrcWidth, u16DstWidth, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1422 }
1423
1424 if(u16SrcHeight >= (u16DstHeight<< g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1425 {
1426 pScaleinfo->y = 0xFFFFFFFF;
1427 }
1428 else
1429 {
1430 pScaleinfo->y = GE_Divide2Fixed(u16SrcHeight, u16DstHeight, g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin, 12);
1431 }
1432
1433 /* HW use format S0.12 which means Bit(12) should be Sign bit
1434 // If overflow, S bit maybe wrong, handle it as actually value we hoped*/
1435 pScaleinfo->init_x = GE_Divide2Fixed(u16SrcWidth-u16DstWidth, 2 * u16DstWidth, 0, 12);
1436 if(u16SrcWidth >= u16DstWidth)
1437 {
1438 pScaleinfo->init_x &= (~(1<<12));
1439 }
1440 else
1441 {
1442 pScaleinfo->init_x |= (1<<12);
1443 }
1444
1445 pScaleinfo->init_y = GE_Divide2Fixed(u16SrcHeight-u16DstHeight, 2 * u16DstHeight, 0, 12);
1446 if(u16SrcHeight >= u16DstHeight)
1447 {
1448 pScaleinfo->init_y &= (~(1<<12));
1449 }
1450 else
1451 {
1452 pScaleinfo->init_y |= (1<<12);
1453 }
1454
1455 if (pGEHalLocal->bYScalingPatch)
1456 {
1457 if (u16SrcHeight<=5)
1458 pScaleinfo->init_y = (1<<12);
1459 }
1460 return E_GE_OK;
1461 }
1462
1463 //-------------------------------------------------------------------------------------------------
1464 /// Set GE scale register
1465 /// @param GE_Rect *src \b IN: src coordinate setting
1466 /// @param GE_DstBitBltType *dst \b IN: dst coordinate setting
1467 /// @return @ref GE_Result
1468 //-------------------------------------------------------------------------------------------------
GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * src,GE_DstBitBltType * dst,GE_Flag flags,GE_ScaleInfo * scaleinfo)1469 GE_Result GE_SetBltScaleRatio(GE_CTX_HAL_LOCAL *pGEHalLocal,GE_Rect *src, GE_DstBitBltType *dst, GE_Flag flags, GE_ScaleInfo* scaleinfo)
1470 {
1471 GE_ScaleInfo geScaleinfo, *pGeScaleInfo = scaleinfo;
1472
1473 if(flags & E_GE_FLAG_BYPASS_STBCOEF)
1474 {
1475 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1476 }
1477 else if (flags & E_GE_FLAG_BLT_STRETCH)
1478 {
1479 /* Safe Guard. Prevent set scaling ratio < 1/32. Also prevent 0 h/w */
1480 if ((src->width-1) >= (dst->dstblk.width << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1481 {
1482 if(pGEHalLocal->bIsComp == FALSE)
1483 {
1484 return E_GE_FAIL_PARAM;
1485 }
1486
1487 dst->dstblk.width = ((src->width-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1488 }
1489 if ((src->height-1) >= (dst->dstblk.height << g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin))
1490 {
1491 if(pGEHalLocal->bIsComp == FALSE)
1492 {
1493 return E_GE_FAIL_PARAM;
1494 }
1495
1496 dst->dstblk.height = ((src->height-1) >> g_GeChipPro.BltDownScaleCaps.u8ShiftRangeMin) + 1;
1497 }
1498
1499 pGeScaleInfo = &geScaleinfo;
1500 GE_CalcBltScaleRatio(pGEHalLocal, src->width, src->height, dst->dstblk.width, dst->dstblk.height, pGeScaleInfo);
1501 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1502 }
1503 else
1504 {
1505 pGeScaleInfo = &geScaleinfo;
1506
1507 pGeScaleInfo->x = (1<<12);
1508 pGeScaleInfo->y = (1<<12);
1509 pGeScaleInfo->init_x = 0;
1510 pGeScaleInfo->init_y = 0;
1511
1512 _GE_SetBltScaleRatio2HW(pGEHalLocal, pGeScaleInfo);
1513 }
1514
1515 return E_GE_OK;
1516 }
1517
GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_Rect * pSrcRect,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Flags,GE_ScaleInfo * pScaleinfo)1518 GE_Result GE_BitBltEX_Trape(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_Rect *pSrcRect, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Flags, GE_ScaleInfo* pScaleinfo)
1519 {
1520 return E_GE_NOT_SUPPORT;
1521 }
1522
1523 //-------------------------------------------------------------------------------------------------
1524 /// GE Primitive Drawing - TRAPEZOID
1525 /// @param pGENormTrapezoid \b IN: pointer to position of TRAPEZOID
1526 /// @param u32ColorS \b IN: start color of TRAPEZOID when gradient
1527 /// @param u32ColorE \b IN: end color of TRAPEZOID when gradient
1528 /// @param pColorDeltaX \b IN: x gradient color
1529 /// @param pColorDeltaY \b IN: y gradient color
1530 /// @return @ref GE_Result
1531 //-------------------------------------------------------------------------------------------------
GE_FillTrapezoid(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bYTrapezoid,GE_Normalized_Trapezoid * pGENormTrapezoid,MS_U32 u32Color,GE_ColorDelta * pColorDeltaX,GE_ColorDelta * pColorDeltaY)1532 GE_Result GE_FillTrapezoid(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bYTrapezoid, GE_Normalized_Trapezoid *pGENormTrapezoid, MS_U32 u32Color, GE_ColorDelta *pColorDeltaX, GE_ColorDelta *pColorDeltaY)
1533 {
1534 return E_GE_NOT_SUPPORT;
1535 }
1536
1537 //-------------------------------------------------------------------------------------------------
1538 /// Set GE DISABLE MIU ACCESS
1539 /// @param enable \b IN: enable and update setting
1540 /// @return @ref GE_Result
1541 //-------------------------------------------------------------------------------------------------
GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1542 GE_Result GE_SetDisaMIUAccess(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1543 {
1544 MS_U16 u16en;
1545
1546 GE_DBG("%s\n", __FUNCTION__);
1547
1548 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1549 if (enable)
1550 {
1551 u16en |= GE_CFG_DISABLE_MIU_ACS;
1552 }
1553 else
1554 {
1555 u16en &= ~GE_CFG_DISABLE_MIU_ACS;
1556 }
1557 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1558
1559 return E_GE_OK;
1560 }
1561 //-------------------------------------------------------------------------------------------------
1562 /// Set GE Clear Invalid MIU Flag
1563 /// @param enable \b IN: enable and update setting
1564 /// @return @ref GE_Result
1565 //-------------------------------------------------------------------------------------------------
GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1566 GE_Result GE_ClrInvalMIUFlg(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1567 {
1568 MS_U16 u16en;
1569
1570 GE_DBG("%s\n", __FUNCTION__);
1571
1572 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1573 if (enable)
1574 {
1575 u16en |= GE_CFG_CLR_MIU_FLG;
1576 }
1577 else
1578 {
1579 u16en &= ~GE_CFG_CLR_MIU_FLG;
1580 }
1581 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1582
1583 return E_GE_OK;
1584 }
1585
1586 //-------------------------------------------------------------------------------------------------
1587 /// Set Enable Dynamic Clock Gating
1588 /// @param enable \b IN: enable and update setting
1589 /// @return @ref GE_Result
1590 //-------------------------------------------------------------------------------------------------
GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL enable)1591 GE_Result GE_EnableDynaClkGate(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL enable)
1592 {
1593 MS_U16 u16en;
1594
1595 GE_DBG("%s\n", __FUNCTION__);
1596
1597 u16en = GE_ReadReg(pGEHalLocal,REG_GE_CFG);
1598 if (enable)
1599 {
1600 u16en |= GE_CFG_EN_DNY_CLK_GATE;
1601 }
1602 else
1603 {
1604 u16en &= ~GE_CFG_EN_DNY_CLK_GATE;
1605 }
1606 GE_WriteReg(pGEHalLocal,REG_GE_CFG, u16en);
1607
1608 return E_GE_OK;
1609 }
1610
GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1611 GE_Result GE_EnableTrapezoidAA(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1612 {
1613 //GE_DBG("%s\n", __FUNCTION__);
1614
1615 return E_GE_NOT_SUPPORT;
1616
1617 }
1618
GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1619 GE_Result GE_EnableTrapSubPixCorr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1620 {
1621 //GE_DBG("%s\n", __FUNCTION__);
1622
1623 return E_GE_NOT_SUPPORT;
1624
1625 }
1626
GE_GetNextTAGID(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bStepTagBefore)1627 MS_U16 GE_GetNextTAGID(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bStepTagBefore)
1628 {
1629 MS_U16 tagID;
1630 if(bStepTagBefore)
1631 {
1632 if(0 == ++pGEHalLocal->pHALShared->global_tagID)
1633 ++pGEHalLocal->pHALShared->global_tagID;
1634 }
1635 tagID =pGEHalLocal->pHALShared->global_tagID;
1636
1637 return tagID;
1638 }
1639
GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY PhyAddr,GE_VcmqBufSize enBufSize)1640 GE_Result GE_SetVCmdBuffer(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY PhyAddr, GE_VcmqBufSize enBufSize)
1641 {
1642 MS_U16 u16RegVal;
1643
1644 if(enBufSize >= E_GE_VCMD_1024K)
1645 {
1646 return E_GE_NOT_SUPPORT;
1647 }
1648
1649 GE_SetVQBufMIUId(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr));
1650 PhyAddr = GE_ConvertAPIAddr2HAL(pGEHalLocal, _GFXAPI_MIU_ID(PhyAddr), _GFXAPI_PHYS_ADDR_IN_MIU(PhyAddr));
1651
1652 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_L, PhyAddr & 0xffff); // Address
1653 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_BASE_H, PhyAddr >> 16); // Address
1654
1655 u16RegVal = (GE_ReadReg(pGEHalLocal, REG_GE_VCMDQ_SIZE) & ~GE_VCMDQ_SIZE_MASK) | ((GE_MapVQ2Reg(enBufSize) & GE_VCMDQ_SIZE_MASK));
1656 GE_WriteReg(pGEHalLocal, REG_GE_VCMDQ_SIZE, u16RegVal);
1657
1658 return E_GE_OK;
1659 }
1660
GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL * pGEHalLocal)1661 GE_Result GE_InitCtxHalPalette(GE_CTX_HAL_LOCAL *pGEHalLocal)
1662 {
1663 MS_U32 u32Idx;
1664
1665 for(u32Idx=0; u32Idx<GE_PALETTE_NUM; u32Idx++)
1666 {
1667 GE_WriteReg(pGEHalLocal, REG_GE_CLUT_CTRL, ((u32Idx) & GE_CLUT_CTRL_IDX_MASK) | GE_CLUT_CTRL_RD);
1668 GE_WaitIdle(pGEHalLocal);
1669 pGEHalLocal->u32Palette[u32Idx] = ByteSwap32(((GE_ReadReg(pGEHalLocal, REG_GE_CLUT_H)<<16) | GE_ReadReg(pGEHalLocal, REG_GE_CLUT_L)));
1670 }
1671
1672 pGEHalLocal->bPaletteDirty = FALSE;
1673
1674 return (E_GE_OK);
1675 }
1676
GE_Init_HAL_Context(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_CTX_HAL_SHARED * pHALShared,MS_BOOL bNeedInitShared)1677 void GE_Init_HAL_Context(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared)
1678 {
1679 memset(pGEHalLocal, 0, sizeof(*pGEHalLocal));
1680
1681 if(bNeedInitShared)
1682 {
1683 memset(pHALShared, 0, sizeof(*pHALShared));
1684 pHALShared->global_tagID = 1;
1685 }
1686 pGEHalLocal->pHALShared = pHALShared;
1687 pGEHalLocal->bYScalingPatch = FALSE;
1688 }
1689
GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_VIRT addr)1690 GE_Result GE_Set_IOMap_Base2(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_VIRT addr)
1691 {
1692 pGEHalLocal->va_mmio_base2 = addr;
1693 return E_GE_OK;
1694 }
1695
GE_SetClock(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bOnOff)1696 GE_Result GE_SetClock(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bOnOff)
1697 {
1698
1699 #ifdef CLK_MANAGEMENT
1700 MS_S32 handle;
1701
1702 handle = Drv_Clkm_Get_Handle("g_clk_ge");
1703 Drv_Clkm_Set_Clk_Source(handle,"CLK_FASTEST");
1704 #else
1705 MS_U16 u16tmp = 0;
1706
1707 u16tmp = CLK_REG(CHIP_GE_CLK);
1708
1709 if (bOnOff)
1710 {
1711 u16tmp &= ~ BIT(0);
1712 }
1713 else
1714 {
1715 u16tmp |= BIT(0);
1716 }
1717 CLK_REG(CHIP_GE_CLK) = u16tmp;
1718 #endif
1719 return E_GE_OK;
1720
1721 }
1722
GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL * pGEHalLocal,PatchBitBltInfo * patchInfo)1723 MS_BOOL GE_NonOnePixelModeCaps(GE_CTX_HAL_LOCAL *pGEHalLocal, PatchBitBltInfo* patchInfo)
1724 {
1725 GE_ScaleInfo geScaleinfo;
1726 GE_Result ret;
1727
1728 patchInfo->scaleinfo =&geScaleinfo;
1729 ret = GE_CalcBltScaleRatio(pGEHalLocal, patchInfo->src.width , patchInfo->src.height ,patchInfo->dst.dstblk.width , patchInfo->dst.dstblk.height, patchInfo->scaleinfo);
1730
1731 if(ret == E_GE_FAIL_PARAM)
1732 {
1733 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1734 }
1735 else if ((patchInfo->scaleinfo->init_x>0xFFF)||(patchInfo->scaleinfo->init_y>0xFFF))
1736 {
1737 return FALSE;
1738 }
1739 else
1740 {
1741 return pGEHalLocal->pGeChipPro->bFourPixelModeStable;
1742 }
1743 }
1744
HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1745 GE_Result HAL_GE_EnableCalcSrc_WidthHeight(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1746 {
1747 MS_U16 u16en;
1748
1749 u16en = GE_ReadReg(pGEHalLocal, REG_GE_EN);
1750
1751 if(bEnable)
1752 {
1753 if(u16en & GE_EN_BURST)
1754 {
1755 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en | GE_EN_CALC_SRC_WH);
1756 }
1757 }
1758 else
1759 {
1760 GE_WriteReg(pGEHalLocal, REG_GE_EN, u16en & (~GE_EN_CALC_SRC_WH));
1761 }
1762
1763 return E_GE_OK;
1764 }
1765
GEWD_ReadReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 * value)1766 GE_Result GEWD_ReadReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16* value)
1767 {
1768 //For two source buffer read register
1769 return E_GE_NOT_SUPPORT;
1770 }
1771
GEWD_WriteReg(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 addr,MS_U16 value)1772 GE_Result GEWD_WriteReg(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 addr, MS_U16 value)
1773 {
1774 //For two source buffer write register
1775 return E_GE_NOT_SUPPORT;
1776 }
1777
GE_SetTLBMode(GE_CTX_HAL_LOCAL * pGEHalLocal,GE_TLB_Mode tlb_type)1778 GE_Result GE_SetTLBMode(GE_CTX_HAL_LOCAL *pGEHalLocal, GE_TLB_Mode tlb_type)
1779 {
1780 return E_GE_NOT_SUPPORT;
1781 }
1782
GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1783 GE_Result GE_GetTLBSRCADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1784 {
1785 return E_GE_NOT_SUPPORT;
1786 }
1787
GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY * addr)1788 GE_Result GE_GetTLBDSTADDR(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY* addr)
1789 {
1790 return E_GE_NOT_SUPPORT;
1791 }
1792
GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1793 GE_Result GE_SetTLBSrcBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1794 {
1795 return E_GE_NOT_SUPPORT;
1796 }
1797
GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_PHY addr)1798 GE_Result GE_SetTLBDstBaseAddr(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_PHY addr)
1799 {
1800 return E_GE_NOT_SUPPORT;
1801 }
1802
GE_FlushTLBTable(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable)1803 GE_Result GE_FlushTLBTable(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bEnable)
1804 {
1805 return E_GE_NOT_SUPPORT;
1806 }
1807
GE_SetTLBTag(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U16 tag)1808 GE_Result GE_SetTLBTag(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U16 tag)
1809 {
1810 return E_GE_NOT_SUPPORT;
1811 }
1812
GE_StopFlushTLB(GE_CTX_HAL_LOCAL * pGEHalLocal)1813 GE_Result GE_StopFlushTLB(GE_CTX_HAL_LOCAL *pGEHalLocal)
1814 {
1815 return E_GE_NOT_SUPPORT;
1816 }
1817
GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 miu,MS_PHY * value)1818 GE_Result GE_Get_MIU_INTERVAL(GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 miu, MS_PHY* value)
1819 {
1820 if(miu==2)
1821 {
1822 *value = HAL_MIU2_BASE;
1823 }
1824 else if(miu==1)
1825 {
1826 *value = HAL_MIU1_BASE;
1827 }
1828 else if(miu==0)
1829 {
1830 *value = 0;
1831 }
1832 else
1833 {
1834 *value = 0;
1835 return E_GE_FAIL;
1836 }
1837
1838 return E_GE_OK;
1839 }
1840
HAL_GE_AdjustDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bDstXInv)1841 GE_Result HAL_GE_AdjustDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_BOOL bDstXInv )
1842 {
1843 MS_U16 u16ClipL=0,u16ClipR=0;
1844 MS_U16 u16DstX=0;
1845
1846 u16DstX = GE_ReadReg(pGEHalLocal, REG_GE_PRIM_V1_X);
1847 if( bDstXInv==FALSE )
1848 {
1849 u16ClipR = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_R);
1850 if( u16ClipR < u16DstX )
1851 {
1852 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipR);
1853 }
1854 }
1855 else
1856 {
1857 u16ClipL = GE_ReadReg(pGEHalLocal, REG_GE_CLIP_L);
1858 if( u16ClipL > u16DstX )
1859 {
1860 GE_WriteReg(pGEHalLocal, REG_GE_PRIM_V1_X, u16ClipL);
1861 }
1862 }
1863
1864 return E_GE_OK;
1865 }
1866
HAL_GE_AdjustRotateDstWin(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_U8 u8Rotate)1867 GE_Result HAL_GE_AdjustRotateDstWin( GE_CTX_HAL_LOCAL *pGEHalLocal, MS_U8 u8Rotate )
1868 {
1869 return E_GE_OK;
1870 }
1871
HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL * pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)1872 GE_Result HAL_GE_SetBurstMiuLen(GE_CTX_HAL_LOCAL *pGEHalLocal,MS_BOOL bEnable,MS_U32 u32BurstLen)
1873 {
1874 MS_U16 u16Reg = 0;
1875
1876 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_DBG);
1877 u16Reg &= ( ~GE_DBG_MIU_MAX_LEG );
1878 u16Reg |= ( ((u32BurstLen - 1)<<8) & GE_DBG_MIU_MAX_LEG );
1879 GE_WriteReg(pGEHalLocal, REG_GE_DBG, u16Reg);
1880
1881 u16Reg = GE_ReadReg(pGEHalLocal, REG_GE_CFG);
1882 if(bEnable)
1883 u16Reg |= GE_CFG_LENGTH_LIMIT;
1884 else
1885 u16Reg &= (~GE_CFG_LENGTH_LIMIT);
1886 GE_WriteReg(pGEHalLocal, REG_GE_CFG, u16Reg);
1887
1888 return E_GE_OK;
1889 }
1890
1891