1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 //////////////////////////////////////////////////////////////////////////////// 93 94 #ifndef _REGEMMFLT_H_ 95 #define _REGEMMFLT_H_ 96 97 //////////////////////////////////////////////////////////////////////////////// 98 // Header Files 99 //////////////////////////////////////////////////////////////////////////////// 100 101 //////////////////////////////////////////////////////////////////////////////// 102 // Define & data type 103 //////////////////////////////////////////////////////////////////////////////// 104 //v: value n: shift n bits 105 #define __BIT(x) ((MS_U16)(1 << (x))) 106 #define __BIT0 __BIT(0) 107 #define __BIT1 __BIT(1) 108 #define __BIT2 __BIT(2) 109 #define __BIT3 __BIT(3) 110 #define __BIT4 __BIT(4) 111 #define __BIT5 __BIT(5) 112 #define __BIT6 __BIT(6) 113 #define __BIT7 __BIT(7) 114 #define __BIT8 __BIT(8) 115 #define __BIT9 __BIT(9) 116 #define __BITA __BIT(0xA) 117 #define __BITB __BIT(0xB) 118 #define __BITC __BIT(0xC) 119 #define __BITD __BIT(0xD) 120 #define __BITE __BIT(0xE) 121 #define __BITF __BIT(0xF) 122 123 124 #define BYTE0 0xFF 125 #define BYTE1 (0xFF<<8) 126 #define BYTE0_MASK 0x00FF 127 #define BYTE1_MASK 0xFF00 128 129 /* KERES */ 130 #define REG_EMMFLT_BASE1 (0x170500<<1) 131 #define REG_EMMFLT_BASE2 (0x161400<<1) 132 #define REG_OTP_BASE (0x190000<<1) 133 #define REG_OTP_CTRL_BASE (0x1A1300<<1) 134 #define REG_PVR0_BASE (0x1A1100<<1) 135 #define REG_CHIPTOP_BASE (0x101E00<<1) 136 #define REG_CLKGEN0_BASE (0x100B00<<1) 137 #define REG_CLKGEN2_BASE (0x100A00<<1) 138 139 140 141 142 #define REG_EMM_TID_MODE_L 0x0000 143 #define REG_EMM_TID_MODE_H 0x0001 144 #define REG_EMM_DATA_ID1_L 0x0002 145 #define REG_EMM_DATA_ID1_H 0x0003 146 #define REG_EMM_DATA_ID2_L 0x0004 147 #define REG_EMM_DATA_ID2_H 0x0005 148 #define REG_EMM_DATA_ID3_L 0x0006 149 #define REG_EMM_DATA_ID3_H 0x0007 150 151 #define REG_EMM_MASK_ID1_L 0x000A 152 #define REG_EMM_MASK_ID1_H 0x000B 153 #define REG_EMM_MASK_ID2_L 0x000C 154 #define REG_EMM_MASK_ID2_H 0x000D 155 #define REG_EMM_MASK_ID3_L 0x000E 156 #define REG_EMM_MASK_ID3_H 0x000F 157 158 #define REG_EMM_PID 0x0010 159 #define REG_EMM_ENABLE_TID __BITE 160 #define EMM_ENABLE_TID_SHIFT 0xE 161 #define REG_EMM_ENABLE_PID __BITF 162 #define EMM_ENABLE_PID_SHIFT 0xF 163 164 #define REG_EMM_TID 0x0011 165 166 #define REG_EMM_CA_INT 0x0018 167 #define EMM_ONEPAKCET_INT __BIT1 168 #define EMM_OVERFLOW_INT __BIT2 169 #define EMM_RESET_INT __BIT7 170 #define EMM_INT_MASK BMASK(7:0) 171 172 #define REG_EMM_DATA_ID4_L 0x0038 173 #define REG_EMM_DATA_ID4_H 0x0039 174 #define REG_EMM_DATA_ID5_L 0x003A 175 #define REG_EMM_DATA_ID5_H 0x003B 176 #define REG_EMM_DATA_ID6_L 0x003C 177 #define REG_EMM_DATA_ID6_H 0x003D 178 #define REG_EMM_DATA_ID7_L 0x003E 179 #define REG_EMM_DATA_ID7_H 0x003F 180 #define REG_EMM_DATA_ID8_L 0x0040 181 #define REG_EMM_DATA_ID8_H 0x0041 182 183 #define REG_EMM_MASK_ID4_L 0x0042 184 #define REG_EMM_MASK_ID4_H 0x0043 185 #define REG_EMM_MASK_ID5_L 0x0044 186 #define REG_EMM_MASK_ID5_H 0x0045 187 #define REG_EMM_MASK_ID6_L 0x0046 188 #define REG_EMM_MASK_ID6_H 0x0047 189 #define REG_EMM_MASK_ID7_L 0x0048 190 #define REG_EMM_MASK_ID7_H 0x0049 191 #define REG_EMM_MASK_ID8_L 0x004A 192 #define REG_EMM_MASK_ID8_H 0x004B 193 194 #define REG_EMM_CTRL_ID 0x004C 195 #define REG_EMM_CTRL_MAX 0x3 196 #define REG_EMM_IRD_MAX 0x8 197 198 #define REG_EMM_INT_STAT 0x004D 199 #define EMM_RECIEVE_ACT 0x10 200 201 #define REG_EMM_RESET 0x004E 202 #define EMM_RESET_UNLOCK 0x1 203 204 205 #define REG_EMM_CTRL0_L 0x0051 206 #define EMM_PACKET256_EN __BIT0 207 #define EMM_PVR_EN __BIT1 208 #define EMM_CLR_PVR_OVERFLOW __BIT2 209 #define EMM_DMA_FLUSH_EN __BIT3 210 #define EMM_FORCE_SYNC_EN __BIT4 211 #define EMM_FW_FILEIN __BITC 212 #define EMM_FLT_BYPASS __BITF 213 214 #define REG_EMM_CTRL0_H 0x0052 215 216 #define REG_EMM_GENERAL_CTRL_L 0x0059 217 #define EMM_TS_INPUT_SELECT BMASK(1:0) 218 #define EMM_FIRST_4_BYTES __BIT2 219 #define EMM_VERSION_NUMBER BMASK(11:4) 220 221 222 #define REG_EMM_GENERAL_CTRL_H 0x005A 223 #define EMM_IGNORE_TS_INPUT __BITF 224 225 #define REG_EMM_STR2MIU_EN 0x005B 226 #define EMM_PINGPONG_EN __BIT0 227 #define EMM_STR2MIU_EN __BIT1 228 #define EMM_STR2MIU_RST_WADR __BIT2 229 #define EMM_STR2MIU_DATA_SWAP __BIT3 230 #define EMM_STR2MIU_BIT_ORDER __BIT4 231 #define EMM_STR2MIU_PAUSE __BIT5 232 #define EMM_SKIP_ADDR_EN __BIT6 233 234 #define REG_EMM_STR2MIU_HEAD1_L 0x005C 235 #define REG_EMM_STR2MIU_HEAD1_H 0x005D 236 #define REG_EMM_STR2MIU_TAIL1_L 0x005E 237 #define REG_EMM_STR2MIU_TAIL1_H 0x005F 238 #define REG_EMM_STR2MIU_MID1_L 0x0060 239 #define REG_EMM_STR2MIU_MID1_H 0x0061 240 241 #define REG_EMM_STR2MIU_HEAD2_L 0x0062 242 #define REG_EMM_STR2MIU_HEAD2_H 0x0063 243 #define REG_EMM_STR2MIU_TAIL2_L 0x0064 244 #define REG_EMM_STR2MIU_TAIL2_H 0x0065 245 #define REG_EMM_STR2MIU_MID2_L 0x0066 246 #define REG_EMM_STR2MIU_MID2_H 0x0067 247 248 249 #define REG_EMM_STR2MIU_CTRL 0x0068 250 #define REG_STR_OVER_CTRL __BIT0 251 #define REG_MIU_HIGH_PRI __BIT1 252 #define REG_WADR_PROTECT_EN __BIT2 253 #define REG_MI2STR_WD_EN __BIT3 254 #define REG_LAST_STR_WD_EN __BIT4 255 #define REG_STR2MI_WP_LD __BIT5 256 #define REG_PKT192_EN __BIT6 257 #define REG_LPCR1_WLD __BIT7 258 #define REG_BURST_LEN (__BIT8 | __BIT9) 259 #define REG_RECORD_AT_SYNC_DIS __BITA 260 261 262 #define REG_EMM_LPCR1_BUF_L 0x0069 263 #define REG_EMM_LPCR1_BUF_H 0x006A 264 265 #define REG_EMM_TS_IF2_CTRL 0x0070 266 #define REG_TS_IF2_EN __BIT0 267 #define REG_TS_DATA2_SWAP __BIT1 268 #define REG_SIM_C0_CONFIG __BIT2 269 #define REG_SIM_C1_CONFIG __BIT3 270 #define REG_FORCE_SYNCBYTE __BIT4 271 #define REG_P_SEL2 __BIT5 272 #define REG_EXT_SYNC_SEL2 __BIT6 273 #define REG_DATA_CHK_2T __BIT7 274 #define REG_EMM_DGB_SEL (__BIT8 | __BIT9 | __BITA | __BITB) 275 #define REG_SERIAL_EXT_SYNC_1T __BITC 276 #define REG_SW_RSTS __BITF 277 278 #define REG_EMM_SYNC_BYTES 0x0071 279 #define REG_SYNC_BYTES BYTE0 280 #define REG_PKT_CHK_SIZE2 BYTE1 281 282 #define REG_EMM_TS_IF2_DEBUG_L 0x0072 283 #define REG_EMM_TS_IF2_DEBUG_H 0x0073 284 285 #define REG_EMM_TSIF_LOCKED_CNT_STATUS 0x0074 286 #define REG_TSIF_LOCKED_CNT_INC __BIT0 287 #define REG_TSIF_LOSE_LOCKED_CNT_INC __BIT1 288 289 #define REG_EMM_PACKET_CNT 0x0076 290 291 #define REG_EMM_HW_CONFIG0 0x007C 292 293 #endif //_REGEMMFLT_H_ 294 295