xref: /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/halTSO.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi // file   halTSO.h
97*53ee8cc1Swenshuai.xi // @brief  TS I/O (TSO) HAL
98*53ee8cc1Swenshuai.xi // @author MStar Semiconductor,Inc.
99*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
100*53ee8cc1Swenshuai.xi #ifndef __HAL_TSO_H__
101*53ee8cc1Swenshuai.xi #define __HAL_TSO_H__
102*53ee8cc1Swenshuai.xi 
103*53ee8cc1Swenshuai.xi #include "MsCommon.h"
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi #include "regTSO.h"
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
108*53ee8cc1Swenshuai.xi //  Driver Compiler Option
109*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
110*53ee8cc1Swenshuai.xi 
111*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
112*53ee8cc1Swenshuai.xi //  TSP Hardware Abstraction Layer
113*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
114*53ee8cc1Swenshuai.xi 
115*53ee8cc1Swenshuai.xi #define _TsoPid                      ((REG_Pid*)(REG_PIDFLT_BASE))
116*53ee8cc1Swenshuai.xi 
117*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
118*53ee8cc1Swenshuai.xi //  Macro of bit operations
119*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi 
122*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
123*53ee8cc1Swenshuai.xi // HAL API
124*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
125*53ee8cc1Swenshuai.xi 
126*53ee8cc1Swenshuai.xi // TSO in mux select
127*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS0                       0x0000UL
128*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS1                       0x0001UL
129*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS2                       0x0002UL
130*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS3                       0x0003UL
131*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS4                       0x0004UL
132*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS5                       0x0005UL
133*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TSCB                      0xFFFFUL   //not supported
134*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TSDEMOD0                  0x0007UL
135*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TSDEMOD1                  0xFFFFUL   //not supported
136*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_MEM                       0x0008UL
137*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_MEM1                      0x0009UL
138*53ee8cc1Swenshuai.xi 
139*53ee8cc1Swenshuai.xi // TSO output mux select
140*53ee8cc1Swenshuai.xi #define HAL_TSOOUT_MUX_NONE                     0x0000UL
141*53ee8cc1Swenshuai.xi #define HAL_TSOOUT_MUX_TS1                      0x0001UL
142*53ee8cc1Swenshuai.xi #define HAL_TSOOUT_MUX_TS3                      0x0003UL
143*53ee8cc1Swenshuai.xi 
144*53ee8cc1Swenshuai.xi 
145*53ee8cc1Swenshuai.xi // TSO In Clk select
146*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS0                       0x0000UL
147*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS1                       0x0001UL
148*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS2                       0x0002UL
149*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS3                       0x0004UL
150*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSCB                      0xFFFFUL  //not supported
151*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSDEMOD0                  0x0003UL
152*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSDEMOD1                  0xFFFFUL  //not supported
153*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS4                       0x0005UL
154*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS5                       0x0006UL
155*53ee8cc1Swenshuai.xi 
156*53ee8cc1Swenshuai.xi 
157*53ee8cc1Swenshuai.xi // Pre TsoOut Select
158*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS0IN               0x0000UL
159*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS1IN               0x0001UL
160*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS2IN               0x0002UL
161*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS3IN               0x0003UL
162*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS4IN               0x0004UL
163*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS5IN               0x0005UL
164*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TSCBIN              0xFFFFUL  //not supported
165*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TSDEMOD0            0xFFFFUL  //not supported
166*53ee8cc1Swenshuai.xi 
167*53ee8cc1Swenshuai.xi // TSO ClkOut DivClk Src Select
168*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_172M_2N             0x0000UL
169*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_288M_2N             0x0800UL
170*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_216M_N              0xFFFFUL  //not supported
171*53ee8cc1Swenshuai.xi 
172*53ee8cc1Swenshuai.xi // TSO ClkOut Select
173*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_DIV2N           0x0000UL
174*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_62MHz           0x0400UL
175*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_54MHz           0x0800UL
176*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT         0x0C00UL
177*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT_DIV8    0x1000UL
178*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_27MHz           0x1400UL
179*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_FROM_DEMOD      0x1C00UL
180*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_DIV             0xFFFFUL  //not supported
181*53ee8cc1Swenshuai.xi 
182*53ee8cc1Swenshuai.xi //TSO Channel IF
183*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE1                      1UL
184*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE2                      5UL
185*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE3                      6UL
186*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_FILE1                      HAL_TSO_TSIF_LIVE2
187*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_FILE2                      HAL_TSO_TSIF_LIVE3
188*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE_MMT                   7UL
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi 
191*53ee8cc1Swenshuai.xi //TSO SVQ RX packet mode
192*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_OPENCABLE            0UL
193*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_CIP                  1UL
194*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_192                  2UL
195*53ee8cc1Swenshuai.xi 
196*53ee8cc1Swenshuai.xi //TSO timestamp base
197*53ee8cc1Swenshuai.xi #define HAL_TSO_TIMESTAMP_90K                   0UL
198*53ee8cc1Swenshuai.xi #define HAL_TSO_TIMESTAMP_27M                   1UL
199*53ee8cc1Swenshuai.xi 
200*53ee8cc1Swenshuai.xi #define MIU_BUS                                 4UL
201*53ee8cc1Swenshuai.xi 
202*53ee8cc1Swenshuai.xi //TSO PVR SRC
203*53ee8cc1Swenshuai.xi #define HAL_TSO_PVR_NONE                        0UL
204*53ee8cc1Swenshuai.xi #define HAL_TSO_PVR_SVQ                         1UL
205*53ee8cc1Swenshuai.xi #define HAL_TSO_PVR_MMT                         2UL
206*53ee8cc1Swenshuai.xi 
207*53ee8cc1Swenshuai.xi typedef struct stDrvTSOOutClk
208*53ee8cc1Swenshuai.xi {
209*53ee8cc1Swenshuai.xi     MS_U16  u16OutClk;
210*53ee8cc1Swenshuai.xi     MS_U16  u16OutDivSrc;
211*53ee8cc1Swenshuai.xi     MS_U16  u16OutDivNum;
212*53ee8cc1Swenshuai.xi     MS_U16  u16PreTsoOutClk;
213*53ee8cc1Swenshuai.xi     MS_BOOL bClkInvert;
214*53ee8cc1Swenshuai.xi     MS_BOOL bEnable;
215*53ee8cc1Swenshuai.xi }HalTSOOutClk;
216*53ee8cc1Swenshuai.xi 
217*53ee8cc1Swenshuai.xi //
218*53ee8cc1Swenshuai.xi // General API
219*53ee8cc1Swenshuai.xi void        HAL_TSO_SetBank(MS_VIRT virtBankAddr);
220*53ee8cc1Swenshuai.xi void        HAL_TSO_Init(void);
221*53ee8cc1Swenshuai.xi void        HAL_TSO_Reset_All(MS_U8 u8Eng);
222*53ee8cc1Swenshuai.xi void        HAL_TSO_Reset(MS_U8 u8Eng);
223*53ee8cc1Swenshuai.xi void        HAL_TSO_Reset_SubItem(MS_U8 u8Eng, MS_U16 u16RstItem);
224*53ee8cc1Swenshuai.xi void        HAL_TSO_HWInt_Enable(MS_U8 u8Eng, MS_BOOL bEnable, MS_U16 u16init);
225*53ee8cc1Swenshuai.xi void        HAL_TSO_HWInt_Clear(MS_U8 u8Eng, MS_U16 u16Int);
226*53ee8cc1Swenshuai.xi MS_U16      HAL_TSO_HWInt_Status(MS_U8 u8Eng);
227*53ee8cc1Swenshuai.xi void        HAL_TSO_PowerCtrl(MS_BOOL bOn);
228*53ee8cc1Swenshuai.xi 
229*53ee8cc1Swenshuai.xi void        HAL_TSO_Recover_TSOutMode(MS_U8 u8Eng);
230*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_OutPad(MS_U8 u8Eng, MS_U16* pu16OutPad, MS_BOOL bSet);
231*53ee8cc1Swenshuai.xi 
232*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_SelPad(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16 u16InPadSel, MS_BOOL bParallel);
233*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_InClk(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16 u16ClkSel, MS_BOOL bClkInvert, MS_BOOL bEnable);
234*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_GetInputTSIF_Status(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16* pu16Pad, MS_BOOL* pbClkInvert, MS_BOOL* pbExtSync, MS_BOOL* pbParl);
235*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_OutClk_DefSelect(MS_U8 u8Eng, MS_U16 u16PadSel, MS_BOOL bSet, HalTSOOutClk* pstOutClkSet);
236*53ee8cc1Swenshuai.xi void        HAL_TSO_OutputClk(MS_U8 u8Eng, HalTSOOutClk* pstOutClkSet, MS_BOOL bSet);
237*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_GetOutputClk(MS_U8 u8Eng, HalTSOOutClk* pstOutClkSet);
238*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_TSOOut_Phase_Tune(MS_U8 u8Eng, MS_U16 u16ClkOutPhase, MS_BOOL bPhaseEnable);
239*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_PreTsoOutClk(MS_U8 u8Eng, MS_U16* pu16PreTsoOutSel, MS_BOOL bSet);
240*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_TSOOutDiv(MS_U8 u8Eng, MS_U16* pu16ClkOutDivSrcSel, MS_U16* pu16ClkOutDivNum, MS_BOOL bSet);
241*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_OutClk(MS_U8 u8Eng, MS_U16* pu16ClkOutSel, MS_BOOL* pbClkInvert, MS_BOOL* pbEnable, MS_BOOL bSet);
242*53ee8cc1Swenshuai.xi 
243*53ee8cc1Swenshuai.xi void        HAL_TSO_Flt_SetPid(MS_U8 u8Eng, MS_U16 u16FltId, MS_U16 u16PID);
244*53ee8cc1Swenshuai.xi void        HAL_TSO_Flt_SetInputSrc(MS_U8 u8Eng, MS_U16 u16FltId, MS_U16 u16InputSrc);
245*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_ReplaceFlt_SetPktPid(MS_U8 u8Eng, MS_U16 u16FltId, MS_U8 u8TsIf, MS_U16 u16OldPid, MS_U16 u16NewPid);
246*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_ReplaceFlt_Enable(MS_U8 u8Eng, MS_U16 u16FltId, MS_BOOL bEnable);
247*53ee8cc1Swenshuai.xi 
248*53ee8cc1Swenshuai.xi void        HAL_TSO_Set_Filein_ReadAddr(MS_U8 u8Eng, MS_U8 u8FileEng, MS_PHY phyAddr);
249*53ee8cc1Swenshuai.xi void        HAL_TSO_Set_Filein_ReadLen(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U32 u32len);
250*53ee8cc1Swenshuai.xi MS_PHY      HAL_TSO_Get_Filein_ReadAddr(MS_U8 u8Eng, MS_U8 u8FileEng);
251*53ee8cc1Swenshuai.xi void        HAL_TSO_Set_Filein_Ctrl(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U16 u16ctrl);
252*53ee8cc1Swenshuai.xi MS_U16      HAL_TSO_Get_Filein_Ctrl(MS_U8 u8Eng, MS_U8 u8FileEng);
253*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_Filein_MOBFKey(MS_U8 u8FileEng, MS_U32 u32Key, MS_BOOL bSecured);
254*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Filein_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
255*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_Filein_MOBFKey(MS_U8 u8FileEng, MS_U32 u32Key, MS_BOOL bSecured);
256*53ee8cc1Swenshuai.xi void        HAL_TSO_FileinTimer_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
257*53ee8cc1Swenshuai.xi void        HAL_TSO_Filein_Rate(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U16 u16timer);
258*53ee8cc1Swenshuai.xi void        HAL_TSO_Filein_192Mode_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
259*53ee8cc1Swenshuai.xi void        HAL_TSO_Filein_192BlockMode_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
260*53ee8cc1Swenshuai.xi MS_U16      HAL_TSO_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng, MS_U8 u8FileEng);
261*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_CmdQ_FIFO_IsFull(MS_U8 u8Eng, MS_U8 u8FileEng);
262*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng, MS_U8 u8FileEng);
263*53ee8cc1Swenshuai.xi MS_U8       HAL_TSO_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng, MS_U8 u8FileEng);
264*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_CmdQ_Reset(MS_U8 u8Eng, MS_U8 u8FileEng);
265*53ee8cc1Swenshuai.xi 
266*53ee8cc1Swenshuai.xi void        HAL_TSO_RW_ValidBlock_Count(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16ValidBlockCnt);
267*53ee8cc1Swenshuai.xi void        HAL_TSO_RW_InvalidBlock_Count(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16InvalidBlockCnt);
268*53ee8cc1Swenshuai.xi void        HAL_TSO_RW_OutputPktSize(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16PktSize);
269*53ee8cc1Swenshuai.xi 
270*53ee8cc1Swenshuai.xi void        HAL_TSO_LPcr2_Set(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U32 u32lpcr2);
271*53ee8cc1Swenshuai.xi MS_U32      HAL_TSO_LPcr2_Get(MS_U8 u8Eng, MS_U8 u8FileEng);
272*53ee8cc1Swenshuai.xi MS_U32      HAL_TSO_TimeStamp_Get(MS_U8 u8Eng, MS_U8 u8FileEng);
273*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_PktChkSize_Set(MS_U8 u8Eng, MS_U8 u8If, MS_U8 u8size);
274*53ee8cc1Swenshuai.xi void        HAL_TSO_Filein_PktChkSize_Set(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U8 u8size);
275*53ee8cc1Swenshuai.xi 
276*53ee8cc1Swenshuai.xi void        HAL_TSO_Cfg1_Enable(MS_U8 u8Eng, MS_U16 u16CfgItem, MS_BOOL bEnable);
277*53ee8cc1Swenshuai.xi void        HAL_TSO_Cfg4_Enable(MS_U8 u8Eng, MS_U16 u16CfgItem, MS_BOOL bEnable);
278*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_ChIf_Enable(MS_U8 u8Eng, MS_U8 u8ChIf, MS_BOOL bEnable);
279*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_ChIf_Cfg(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16 u16Cfg, MS_BOOL bEnable);
280*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Get_ChIf_Cfg(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16* pu16Cfg, MS_BOOL *pbEnable);
281*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_SVQBuf_Set(MS_U8 u8Eng, MS_U8 u8ChIf, MS_PHY phyBufAddr, MS_U32 u32BufSize);
282*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_ChIf_ClrByteCnt(MS_U8 u8Eng, MS_U8 u8ChIf);
283*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_LocalStreamID(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U8* pu8StrID, MS_BOOL beSet);
284*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_SVQ_TX_Reset(MS_U8 u8Eng, MS_U8 u8ChIf);
285*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_SVQRX_MOBFKey(MS_U8 u8Eng, MS_U32 u32Key, MS_BOOL bSecured);
286*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_SVQRX_PktMode(MS_U8 u8Eng, MS_U16 u16mode);
287*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_SVQRX_ArbitorMode(MS_U8 u8Eng, MS_U16 u16mode, MS_U16 *pu16SvqRxPri);
288*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Set_SVQ_LocalSysTimestamp(MS_U8 u8Eng, MS_U32 u32systime);
289*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Get_SVQ_Status(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16* pu16Status);
290*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_GetDelayTime_PreHd2Output(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U32 *pu32time);
291*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Get_MaxDelta_ChId(MS_U8 u8Eng, MS_U8 *pu8ChIf);
292*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_Sel_LocalSysStampClkBase(MS_U8 u8Eng, MS_U16 u16ClkBase);
293*53ee8cc1Swenshuai.xi MS_U16      HAL_TSO_MMT_Cfg_Map(MS_U16 u16Cfg);
294*53ee8cc1Swenshuai.xi void        HAL_TSO_PVR_WaitFlush(MS_U8 u8PVRId);
295*53ee8cc1Swenshuai.xi void        HAL_TSO_PVR_SetBuffer(MS_U8 u8PVRId, MS_PHY phyBufStart0, MS_PHY phyBufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1);
296*53ee8cc1Swenshuai.xi MS_PHY      HAL_TSO_PVR_GetBufWrite(MS_U8 u8PVRId);
297*53ee8cc1Swenshuai.xi void        HAL_TSO_PVR_Enable(MS_U8 u8PVRId, MS_BOOL bEnable);
298*53ee8cc1Swenshuai.xi void        HAL_TSO_PVR_PacketMode(MS_U8 u8PVRId, MS_BOOL bSet);
299*53ee8cc1Swenshuai.xi void        HAL_TSO_SetPVRTimeStamp(MS_U8 u8PVRId, MS_U32 u32Stamp);
300*53ee8cc1Swenshuai.xi MS_U32      HAL_TSO_GetPVRTimeStamp(MS_U8 u8PVRId);
301*53ee8cc1Swenshuai.xi void        HAL_TSO_SetPVRTimeStampClk(MS_U8 u8PVRId, MS_U32 u32ClkSrc);
302*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_PVR_IsEnabled(MS_U32 u32EngId);
303*53ee8cc1Swenshuai.xi void        HAL_TSO_PVR_Src(MS_U32 u32Src);
304*53ee8cc1Swenshuai.xi 
305*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX_KERNEL
306*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_SaveRegs(void);
307*53ee8cc1Swenshuai.xi MS_BOOL     HAL_TSO_RestoreRegs(void);
308*53ee8cc1Swenshuai.xi #endif  //MSOS_TYPE_LINUX_KERNEL
309*53ee8cc1Swenshuai.xi 
310*53ee8cc1Swenshuai.xi 
311*53ee8cc1Swenshuai.xi #endif // #ifndef __HAL_TSO_H__
312*53ee8cc1Swenshuai.xi 
313*53ee8cc1Swenshuai.xi 
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