xref: /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/regTSP_MULTI.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)

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////////////////////////////////////////////////////////////////////////////////////////////////////
//
//  File name: regTSP_MULTI.h
//  Description: TSP Multiple Stream Relative Definition
//
////////////////////////////////////////////////////////////////////////////////////////////////////

#ifndef _REG_TSP_MULTI_H_
#define _REG_TSP_MULTI_H_

//--------------------------------------------------------------------------------------------------
//  Abbreviation
//--------------------------------------------------------------------------------------------------
// Addr                             Address
// Buf                              Buffer
// Clr                              Clear
// CmdQ                             Command queue
// Cnt                              Count
// Ctrl                             Control
// Flt                              Filter
// Hw                               Hardware
// Int                              Interrupt
// Len                              Length
// Ovfw                             Overflow
// Pkt                              Packet
// Rec                              Record
// Recv                             Receive
// Rmn                              Remain
// Reg                              Register
// Req                              Request
// Rst                              Reset
// Scmb                             Scramble
// Sec                              Section
// Stat                             Status
// Sw                               Software
// Ts                               Transport Stream
// MMFI                             Multi Media File In

//--------------------------------------------------------------------------------------------------
//  Global Definition
//--------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Harware Capability
//-------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------
//  Type and Structure
//-------------------------------------------------------------------------------------------------

typedef struct _REG_TSP_MULTI_SYNC_Map
{
    REG16       reg_sync_byte[16];
    REG16       reg_source_id[16];

} REG_TSP_MULTI_SYNC_Map;

typedef struct _REG_TSP_MULTI_Ctrl // TSP Multi (Bank:0x3013)
{
    REG16       CFG_TSP_MULTI_00_4F[0x50 - 0x00];                               // reserved

    REG16       CFG_TSP_MULTI_50_6F[0x70 - 0x50];                               // reg_rvu_pid_num
        #define CFG_TSP_MULTI_RVU_PID_NUM_PID_MASK                              0x0FFF
        #define CFG_TSP_MULTI_RVU_PID_NUM_PID_SHIFT                             0
        #define CFG_TSP_MULTI_RVU_PID_NUM_EN                                    0x1000
        #define CFG_TSP_MULTI_RVU_PID_NUM_PATH_SRC_MASK                         0xE000
        #define CFG_TSP_MULTI_RVU_PID_NUM_PATH_SRC_SHIFT                        13

    REG16       CFG_TSP_MULTI_70_77[0x78 - 0x70];                               // reg_rvu_pid_mm0
    REG16       CFG_TSP_MULTI_78_7F[0x80 - 0x78];                               // reg_rvu_pid_mm1
        #define CFG_TSP_MULTI_RVU_PID_MM_PID_MASK                               0x1FFF
        #define CFG_TSP_MULTI_RVU_PID_MM_PID_SHIFT                              0
        #define CFG_TSP_MULTI_RVU_PID_MM_EN                                     0x2000

} REG_TSP_MULTI_Ctrl;

typedef struct _REG_TSP_MULTI_SYNC_Ctrl // TSP Multi-Sync (Bank:0x3015 / Bank: 0x3027)
{
    REG_TSP_MULTI_SYNC_Map  CFG_TSP_MULTI_SYNC_00_7F[4];                        // {reg_sync_byte , reg_source_id}
        #define CFG_TSP_MULTI_SYNC_BYTE_EVEN_MASK                               0x00FF
        #define CFG_TSP_MULTI_SYNC_BYTE_EVEN_SHIFT                              0
        #define CFG_TSP_MULTI_SYNC_BYTE_ODD_MASK                                0xFF00
        #define CFG_TSP_MULTI_SYNC_BYTE_ODD_SHIFT                               8

        #define CFG_TSP_MULTI_SRC_ID_EVEN_MASK                                  0x003F
        #define CFG_TSP_MULTI_SRC_ID_EVEN_SHIFT                                 0
        #define CFG_TSP_MULTI_SRC_ID_ODD_MASK                                   0x3F00
        #define CFG_TSP_MULTI_SRC_ID_ODD_SHIFT                                  8
        #define CFG_TSP_MULTI_SRC_ID_MXL_DSS_MODE_EN                            0x0040
        #define CFG_TSP_MULTI_SRC_ID_MULTI_SYNC_BYTE_EN                         0x0080

} REG_TSP_MULTI_SYNC_Ctrl;

#endif // _REG_TSP_MULTI_H_