xref: /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/halTSO.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi // file   halTSO.h
97*53ee8cc1Swenshuai.xi // @brief  TS I/O (TSO) HAL
98*53ee8cc1Swenshuai.xi // @author MStar Semiconductor,Inc.
99*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
100*53ee8cc1Swenshuai.xi #ifndef __HAL_TSO_H__
101*53ee8cc1Swenshuai.xi #define __HAL_TSO_H__
102*53ee8cc1Swenshuai.xi 
103*53ee8cc1Swenshuai.xi #include "regTSO.h"
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
106*53ee8cc1Swenshuai.xi //  Driver Compiler Option
107*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
108*53ee8cc1Swenshuai.xi 
109*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
110*53ee8cc1Swenshuai.xi //  TSP Hardware Abstraction Layer
111*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
112*53ee8cc1Swenshuai.xi 
113*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
114*53ee8cc1Swenshuai.xi //  Macro of bit operations
115*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
116*53ee8cc1Swenshuai.xi 
117*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
118*53ee8cc1Swenshuai.xi // HAL API
119*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi // TSO in mux select
122*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS0                       0x0000
123*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS1                       0x0001
124*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS2                       0x0002
125*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS3                       0x0003
126*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS4                       0x0004
127*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS5                       0x0005
128*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TS6                       0x0006
129*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TSDEMOD0                  0x000E
130*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_TSDEMOD1                  0x000F  //not supported
131*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_MEM                       0x0008
132*53ee8cc1Swenshuai.xi #define HAL_TSOIN_MUX_MEM1                      0x0009
133*53ee8cc1Swenshuai.xi 
134*53ee8cc1Swenshuai.xi // TSO In Clk select
135*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS0                       0x0000
136*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS1                       0x0001
137*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS2                       0x0002  //not supported
138*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TS3                       0x0003  //not supported
139*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSCB                      0xFFFF  //not supported
140*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSDEMOD0                  0x000E
141*53ee8cc1Swenshuai.xi #define HAL_TSO_CLKIN_TSDEMOD1                  0x000F  //not supported
142*53ee8cc1Swenshuai.xi 
143*53ee8cc1Swenshuai.xi // Pre TsoOut Select
144*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS0IN               0x0000
145*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS1IN               0x0001
146*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS2IN               0x0002
147*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS3IN               0x0003
148*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS4IN               0x0004
149*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS5IN               0x0005
150*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TS6IN               0x0006
151*53ee8cc1Swenshuai.xi #define HAL_PRE_TSO_OUT_SEL_TSCBIN              0xFFFF
152*53ee8cc1Swenshuai.xi 
153*53ee8cc1Swenshuai.xi // TSO ClkOut DivClk Src Select, only 216MHz for Div
154*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_172M_2N             0x0000  //DMPLLDIV5
155*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_288M_2N             0x0040  //DMPLLDIV3
156*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_DIV_SEL_216M_N              0xFFFF  //not supported
157*53ee8cc1Swenshuai.xi 
158*53ee8cc1Swenshuai.xi 
159*53ee8cc1Swenshuai.xi // TSO ClkOut Select
160*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_27MHz           0x0000
161*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_62MHz           0x0001
162*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_108MHz          0x0002
163*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT         0x0003  //live-in
164*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT_DIV8    0x0004  //live-in
165*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_DIV2N           0x0005
166*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_86MHz           0x0006
167*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_123MHz          0x0007
168*53ee8cc1Swenshuai.xi 
169*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_FROM_DEMOD      0x000E
170*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_54MHz           0xFFFE  //not supported
171*53ee8cc1Swenshuai.xi #define HAL_TSO_OUT_SEL_TSO_OUT_DIV             0xFFFF  //not supported
172*53ee8cc1Swenshuai.xi 
173*53ee8cc1Swenshuai.xi 
174*53ee8cc1Swenshuai.xi //TSO Channel IF
175*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE1                      1
176*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE2                      2
177*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE3                      3
178*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE4                      4
179*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE5                      5
180*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_LIVE6                      6
181*53ee8cc1Swenshuai.xi 
182*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_FILE1                      HAL_TSO_TSIF_LIVE5
183*53ee8cc1Swenshuai.xi #define HAL_TSO_TSIF_FILE2                      HAL_TSO_TSIF_LIVE6
184*53ee8cc1Swenshuai.xi 
185*53ee8cc1Swenshuai.xi //TSO SVQ RX packet mode
186*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_OPENCABLE            0
187*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_CIP                  1
188*53ee8cc1Swenshuai.xi #define HAL_TSO_SVQRX_MODE_192                  2
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi typedef struct stDrvTSOOutClk
191*53ee8cc1Swenshuai.xi {
192*53ee8cc1Swenshuai.xi     MS_U16  u16OutClk;
193*53ee8cc1Swenshuai.xi     MS_U16  u16OutDivSrc;
194*53ee8cc1Swenshuai.xi     MS_U16  u16OutDivNum;
195*53ee8cc1Swenshuai.xi     MS_U16  u16PreTsoOutClk;
196*53ee8cc1Swenshuai.xi     MS_BOOL bClkInvert;
197*53ee8cc1Swenshuai.xi     MS_BOOL bEnable;
198*53ee8cc1Swenshuai.xi }HalTSOOutClk;
199*53ee8cc1Swenshuai.xi 
200*53ee8cc1Swenshuai.xi 
201*53ee8cc1Swenshuai.xi //
202*53ee8cc1Swenshuai.xi // General API
203*53ee8cc1Swenshuai.xi void    HAL_TSO_SetBank(MS_VIRT u32BankAddr);
204*53ee8cc1Swenshuai.xi void    HAL_TSO_Init(void);
205*53ee8cc1Swenshuai.xi void    HAL_TSO_Reset_All(MS_U8 u8Eng);
206*53ee8cc1Swenshuai.xi void    HAL_TSO_Reset(MS_U8 u8Eng);
207*53ee8cc1Swenshuai.xi void    HAL_TSO_Reset_SubItem(MS_U8 u8Eng, MS_U16 u16RstItem);
208*53ee8cc1Swenshuai.xi void    HAL_TSO_HWInt_Enable(MS_U8 u8Eng, MS_BOOL bEnable, MS_U16 u16init);
209*53ee8cc1Swenshuai.xi void    HAL_TSO_HWInt_Clear(MS_U8 u8Eng, MS_U16 u16Int);
210*53ee8cc1Swenshuai.xi MS_U16  HAL_TSO_HWInt_Status(MS_U8 u8Eng);
211*53ee8cc1Swenshuai.xi void    HAL_TSO_SaveRegs(void);
212*53ee8cc1Swenshuai.xi void    HAL_TSO_RestoreRegs(void);
213*53ee8cc1Swenshuai.xi void    HAL_TSO_PowerCtrl(MS_BOOL bOn);
214*53ee8cc1Swenshuai.xi 
215*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_3WirePadMapping(MS_U8 u8Pad3WireId, MS_U16 *u16Pad, MS_U16 *u16Clk);
216*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_SelPad(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16 u16InPadSel, MS_BOOL bParallel);
217*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_OutPad(MS_U8 u8Eng, MS_U16* pu16OutPad, MS_BOOL bSet);
218*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_GetInputTSIF_Status(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16* pu16Pad, MS_BOOL* pbClkInvert, MS_BOOL* pbExtSync, MS_BOOL* pbParl);
219*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_InClk(MS_U8 u8Eng, MS_U8 u8TsIf, MS_U16 u16ClkSel, MS_BOOL bClkInvert, MS_BOOL bEnable);
220*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_OutClk_DefSelect(MS_U8 u8Eng, MS_U16 u16PadSel, MS_BOOL bSet, HalTSOOutClk* pstOutClkSet);
221*53ee8cc1Swenshuai.xi void    HAL_TSO_Set_GenOutClk(MS_U8 u8Eng);
222*53ee8cc1Swenshuai.xi 
223*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_OutClk(MS_U8 u8Eng, MS_U16* pu16ClkOutSel, MS_BOOL* pbClkInvert, MS_BOOL* pbEnable, MS_BOOL bSet);
224*53ee8cc1Swenshuai.xi void    HAL_TSO_OutputClk(MS_U8 u8Eng, HalTSOOutClk* pstOutClkSet, MS_BOOL bSet);
225*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_TSOOut_Phase_Tune(MS_U8 u8Eng, MS_U16 u16ClkOutPhase, MS_BOOL bPhaseEnable);
226*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_PreTsoOutClk(MS_U8 u8Eng, MS_U16* pu16PreTsoOutSel, MS_BOOL bSet);
227*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_TSOOutDiv(MS_U8 u8Eng, MS_U16 u16ClkOutDivSrcSel, MS_U16 u16ClkOutDivNum);
228*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_OutClk(MS_U8 u8Eng, MS_U16 u16ClkOutSel, MS_BOOL bClkInvert, MS_BOOL bEnable);
229*53ee8cc1Swenshuai.xi 
230*53ee8cc1Swenshuai.xi 
231*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_PidBypass(MS_U8 u8Eng, MS_BOOL bEnable);
232*53ee8cc1Swenshuai.xi void HAL_TSO_TsioMode_En(MS_BOOL bEnable);
233*53ee8cc1Swenshuai.xi void HAL_TSO_Tsio2Opif_En(MS_BOOL bEnable);
234*53ee8cc1Swenshuai.xi 
235*53ee8cc1Swenshuai.xi //
236*53ee8cc1Swenshuai.xi // File out APIs
237*53ee8cc1Swenshuai.xi //
238*53ee8cc1Swenshuai.xi void    HAL_TSO_Flt_SetPid(MS_U8 u8Eng, MS_U16 u16FltId, MS_U16 u16PID);
239*53ee8cc1Swenshuai.xi void    HAL_TSO_Flt_SetInputSrc(MS_U8 u8Eng, MS_U16 u16FltId, MS_U16 u16InputSrc);
240*53ee8cc1Swenshuai.xi void    HAL_TSO_Flt_SetSid(MS_U8 u8Eng, MS_U16 u16FltId, MS_U8 u8Sid);
241*53ee8cc1Swenshuai.xi void    HAL_TSO_Set_Filein_ReadAddr(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U32 u32Addr);
242*53ee8cc1Swenshuai.xi void    HAL_TSO_Set_Filein_ReadLen(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U32 u32len);
243*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_Filein_ReadAddr(MS_U8 u8Eng, MS_U8 u8FileEng);
244*53ee8cc1Swenshuai.xi void    HAL_TSO_Set_Filein_Ctrl(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U16 u16ctrl);
245*53ee8cc1Swenshuai.xi MS_U16  HAL_TSO_Get_Filein_Ctrl(MS_U8 u8Eng, MS_U8 u8FileEng);
246*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Filein_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
247*53ee8cc1Swenshuai.xi void    HAL_TSO_FileinTimer_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
248*53ee8cc1Swenshuai.xi void    HAL_TSO_Filein_Rate(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U16 u16timer);
249*53ee8cc1Swenshuai.xi void    HAL_TSO_Filein_192Mode_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
250*53ee8cc1Swenshuai.xi void    HAL_TSO_Filein_192BlockMode_Enable(MS_U8 u8Eng, MS_U8 u8FileEng, MS_BOOL bEnable);
251*53ee8cc1Swenshuai.xi MS_U16  HAL_TSO_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng, MS_U8 u8FileEng);
252*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_CmdQ_FIFO_IsFull(MS_U8 u8Eng);
253*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng);
254*53ee8cc1Swenshuai.xi MS_U8   HAL_TSO_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng, MS_U8 u8FileEng);
255*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_CmdQ_Reset(MS_U8 u8Eng, MS_U8 u8FileEng);
256*53ee8cc1Swenshuai.xi void    HAL_TSO_Cfg0_Enable(MS_U8 u8Eng, MS_U16 u16CfglItem, MS_BOOL benable);
257*53ee8cc1Swenshuai.xi void    HAL_TSO_Cfg1_Enable(MS_U8 u8Eng, MS_U16 u16CfglItem, MS_BOOL benable);
258*53ee8cc1Swenshuai.xi void    HAL_TSO_Cfg4_Enable(MS_U8 u8Eng, MS_U32 u32CfgItem, MS_BOOL benable);
259*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_ChIf_Enable(MS_U8 u8Eng, MS_U8 u8ChIf, MS_BOOL bEnable);
260*53ee8cc1Swenshuai.xi void    HAL_TSO_File_Cfg1_Enable(MS_U8 u8Eng, MS_U16 u16CfgItem, MS_BOOL benable);
261*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_ChIf_Cfg(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16 u16Cfg, MS_BOOL bEnable);
262*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Get_ChIf_Cfg(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16* pu16Cfg, MS_BOOL *pbEnable);
263*53ee8cc1Swenshuai.xi void    HAL_TSO_RW_ValidBlock_Count(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16ValidBlockCnt);
264*53ee8cc1Swenshuai.xi void    HAL_TSO_RW_InvalidBlock_Count(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16InvalidBlockCnt);
265*53ee8cc1Swenshuai.xi void    HAL_TSO_RW_OutputPKTSize(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16PktSize);
266*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_CC(MS_U8 u8Eng);
267*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_ADP(MS_U8 u8Eng);
268*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_SCM(MS_U8 u8Eng);
269*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_PID(MS_U8 u8Eng);
270*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_TSPri(MS_U8 u8Eng);
271*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_PSI(MS_U8 u8Eng);
272*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_Get_TsHDInfo_ErrInd(MS_U8 u8Eng);
273*53ee8cc1Swenshuai.xi void    HAL_TSO_Get_Pid_Info(MS_U8 u8Eng, MS_U16 *pu16matchpid, MS_BOOL *pbchanged);
274*53ee8cc1Swenshuai.xi void    HAL_TSO_LPcr2_Set(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U32 u32lpcr2);
275*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_LPcr2_Get(MS_U8 u8Eng, MS_U8 u8FileEng);
276*53ee8cc1Swenshuai.xi MS_U32  HAL_TSO_TimeStamp_Get(MS_U8 u8Eng, MS_U8 u8FileEng);
277*53ee8cc1Swenshuai.xi void    HAL_TSO_PktChkSize_Set(MS_U8 u8Eng, MS_U8 u8If, MS_U8 u8size);
278*53ee8cc1Swenshuai.xi void    HAL_TSO_RW_OutputPktSize(MS_U8 u8Eng, MS_BOOL bWrite, MS_U16 *pu16PktSize);
279*53ee8cc1Swenshuai.xi void    HAL_TSO_Filein_PktChkSize_Set(MS_U8 u8Eng, MS_U8 u8FileEng, MS_U8 u8size);
280*53ee8cc1Swenshuai.xi void    HAL_TSO_Livein_PktChkSize_Set(MS_U8 u8Eng, MS_U8 u8If, MS_U8 u8size);
281*53ee8cc1Swenshuai.xi void    HAL_TSO_Livein_Input_Config(MS_U8 u8Eng, MS_U8 u8PktInputMode, MS_U8 u8PktSyncByte, MS_U8 u8PktHeaderLength);
282*53ee8cc1Swenshuai.xi void    HAL_TSO_Livein_3Wire(MS_U8 u8Eng, MS_U8 u8ChIf, MS_BOOL bEnable);
283*53ee8cc1Swenshuai.xi 
284*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_ChIf_ClrByteCnt(MS_U8 u8Eng, MS_U8 u8ChIf);
285*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_SVQBuf_Set(MS_U8 u8Eng, MS_U8 u8ChIf, MS_PHY phyBufAddr, MS_U32 u32BufSize);
286*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_SVQ_TX_Reset(MS_U8 u8Eng, MS_U8 u8ChIf);
287*53ee8cc1Swenshuai.xi void    HAL_TSO1_SVQ_Rx_Enable(MS_U16 u16CfgItem, MS_BOOL benable);
288*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_SVQRX_PktMode(MS_U8 u8Eng, MS_U16 u16mode);
289*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Get_SVQ_Status(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U16* pu16Status);
290*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_SVQRX_ArbitorMode(MS_U8 u8Eng, MS_U16 u16mode, MS_U16 *pu16SvqRxPri);
291*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_SVQ_LocalSysTimestamp(MS_U8 u8Eng, MS_U32 u32systime);
292*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_LocalStreamID(MS_U8 u8Eng, MS_U8 u8ChIf, MS_U8* pu8StrID, MS_BOOL beSet);
293*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_ReplaceFlt_SetPktPid(MS_U8 u8Eng, MS_U16 u16FltId, MS_U8 u8TsIf, MS_U16 u16OldPid, MS_U16 u16NewPid);
294*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_ReplaceFlt_Enable(MS_U8 u8Eng, MS_U16 u16FltId, MS_BOOL bEnable);
295*53ee8cc1Swenshuai.xi 
296*53ee8cc1Swenshuai.xi 
297*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Set_SvqBypass(MS_BOOL bEnable);
298*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_PcrFlt_Enable(MS_U8 u8ChIf, MS_U16 u16PID, MS_BOOL bEnable);
299*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_Pcr_Get(MS_U8 u8ChIf, MS_U32 *pu32Pcr_H, MS_U32 *pu32Pcr);
300*53ee8cc1Swenshuai.xi MS_BOOL HAL_TSO_PcrClr(MS_U8 u8ChIf, MS_BOOL bEnable);
301*53ee8cc1Swenshuai.xi 
302*53ee8cc1Swenshuai.xi 
303*53ee8cc1Swenshuai.xi #endif // #ifndef __HAL_TSO_H__
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