1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties. 8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all 9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written 10*53ee8cc1Swenshuai.xi // permission has been granted by MStar. 11*53ee8cc1Swenshuai.xi // 12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you 13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to 14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations: 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi // 1. 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If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. 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These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// file drvTSP2.h 98*53ee8cc1Swenshuai.xi /// @brief Transport Stream Processer (TSP) Driver Interface 99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor,Inc. 100*53ee8cc1Swenshuai.xi /// @attention 101*53ee8cc1Swenshuai.xi /// All TSP DDI are not allowed to use in any interrupt context other than TSP ISR and Callback 102*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 103*53ee8cc1Swenshuai.xi 104*53ee8cc1Swenshuai.xi #ifndef __DRV_TSP2_H__ 105*53ee8cc1Swenshuai.xi #define __DRV_TSP2_H__ 106*53ee8cc1Swenshuai.xi 107*53ee8cc1Swenshuai.xi 108*53ee8cc1Swenshuai.xi 109*53ee8cc1Swenshuai.xi #ifdef __cplusplus 110*53ee8cc1Swenshuai.xi extern "C" 111*53ee8cc1Swenshuai.xi { 112*53ee8cc1Swenshuai.xi #endif 113*53ee8cc1Swenshuai.xi 114*53ee8cc1Swenshuai.xi 115*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 116*53ee8cc1Swenshuai.xi // Driver Capability 117*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 118*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 119*53ee8cc1Swenshuai.xi // Macro and Define 120*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 121*53ee8cc1Swenshuai.xi 122*53ee8cc1Swenshuai.xi #define TSP_VER_1_0 0x0100 123*53ee8cc1Swenshuai.xi #define TSP_VER_2_0 0x0200 124*53ee8cc1Swenshuai.xi #define TSP_VER_3_0 0x0300 125*53ee8cc1Swenshuai.xi #define TSP_VER_4_0 0x0400 126*53ee8cc1Swenshuai.xi 127*53ee8cc1Swenshuai.xi 128*53ee8cc1Swenshuai.xi #define TSP_VERSION TSP_VER_4_0 129*53ee8cc1Swenshuai.xi 130*53ee8cc1Swenshuai.xi /// Transport stream null PID 131*53ee8cc1Swenshuai.xi #define MSIF_TSP_LIB_CODE {'T','S','P','4'} // Lib code 132*53ee8cc1Swenshuai.xi #define MSIF_TSP_LIBVER {'0','1'} // LIB version 133*53ee8cc1Swenshuai.xi #define MSIF_TSP_BUILDNUM {'0','0'} // Build Number 134*53ee8cc1Swenshuai.xi #define MSIF_TSP_CHANGELIST {'0','0','5','8','5','9','0','3'} // P4 ChangeList Number 135*53ee8cc1Swenshuai.xi 136*53ee8cc1Swenshuai.xi #define TSP_DRV_VERSION /* Character String for DRV/API version */ \ 137*53ee8cc1Swenshuai.xi MSIF_TAG, /* 'MSIF' */ \ 138*53ee8cc1Swenshuai.xi MSIF_CLASS, /* '00' */ \ 139*53ee8cc1Swenshuai.xi MSIF_CUS, /* 0x0000 */ \ 140*53ee8cc1Swenshuai.xi MSIF_MOD, /* 0x0000 */ \ 141*53ee8cc1Swenshuai.xi MSIF_CHIP, \ 142*53ee8cc1Swenshuai.xi MSIF_CPU, \ 143*53ee8cc1Swenshuai.xi MSIF_TSP_LIB_CODE, /* IP__ */ \ 144*53ee8cc1Swenshuai.xi MSIF_TSP_LIBVER, /* 0.0 ~ Z.Z */ \ 145*53ee8cc1Swenshuai.xi MSIF_TSP_BUILDNUM, /* 00 ~ 99 */ \ 146*53ee8cc1Swenshuai.xi MSIF_TSP_CHANGELIST, /* CL# */ \ 147*53ee8cc1Swenshuai.xi MSIF_OS 148*53ee8cc1Swenshuai.xi 149*53ee8cc1Swenshuai.xi #define __LEGACY__ 1 // only for development 150*53ee8cc1Swenshuai.xi 151*53ee8cc1Swenshuai.xi #define TSP_PID_NULL 0x1FFF 152*53ee8cc1Swenshuai.xi 153*53ee8cc1Swenshuai.xi #define TSP_FILTER_DEPTH 16 // TSP_FILTER_DEPTH 154*53ee8cc1Swenshuai.xi 155*53ee8cc1Swenshuai.xi /// TSP byte address alignment unit 156*53ee8cc1Swenshuai.xi #define TSP_ALIGN_UNIT 16 157*53ee8cc1Swenshuai.xi 158*53ee8cc1Swenshuai.xi /// TSP byte address alignment macro 159*53ee8cc1Swenshuai.xi #define TSP_ALIGN(_x) ALIGN_16((MS_U32)_x) 160*53ee8cc1Swenshuai.xi 161*53ee8cc1Swenshuai.xi // TSP event define 162*53ee8cc1Swenshuai.xi #define TSP_EVENT_SECTION 0x00000001 163*53ee8cc1Swenshuai.xi #define TSP_EVENT_DISABLEFLT 0x00000080 164*53ee8cc1Swenshuai.xi #define TSP_EVENT_FREEFLT 0x00000040 165*53ee8cc1Swenshuai.xi #define TSP_EVENT_TASKEND 0x80000000 166*53ee8cc1Swenshuai.xi 167*53ee8cc1Swenshuai.xi #define TSP_EVENT_SECTION_POLL 0x00000002 168*53ee8cc1Swenshuai.xi 169*53ee8cc1Swenshuai.xi #define TSP_TASK_EVENTS ( TSP_EVENT_SECTION | TSP_EVENT_FREEFLT|TSP_EVENT_DISABLEFLT | TSP_EVENT_TASKEND) 170*53ee8cc1Swenshuai.xi #define TSP_POLL_EVENTS ( TSP_EVENT_SECTION_POLL ) 171*53ee8cc1Swenshuai.xi 172*53ee8cc1Swenshuai.xi #if __LEGACY__ 173*53ee8cc1Swenshuai.xi 174*53ee8cc1Swenshuai.xi #undef TSP_TASK_EVENTS 175*53ee8cc1Swenshuai.xi #define TSP_TASK_EVENTS ( TSP_EVENT_SECTION | TSP_EVENT_FREEFLT |TSP_EVENT_DISABLEFLT | \ 176*53ee8cc1Swenshuai.xi TSP_EVENT_PVR0_RDY | TSP_EVENT_PVR1_RDY | TSP_EVENT_TASKEND ) 177*53ee8cc1Swenshuai.xi 178*53ee8cc1Swenshuai.xi #define TSP_EVENT_PVR0_RDY 0x00000004 179*53ee8cc1Swenshuai.xi #define TSP_EVENT_PVR1_RDY 0x00000008 180*53ee8cc1Swenshuai.xi // @FIXME: remove 181*53ee8cc1Swenshuai.xi #define TSP_EVENT_PVR0_RDY_POLL 0x00000010 182*53ee8cc1Swenshuai.xi #define TSP_EVENT_PVR1_RDY_POLL 0x00000020 183*53ee8cc1Swenshuai.xi 184*53ee8cc1Swenshuai.xi // @FIXME: remove 185*53ee8cc1Swenshuai.xi #undef TSP_POLL_EVENTS 186*53ee8cc1Swenshuai.xi #define TSP_POLL_EVENTS ( TSP_EVENT_SECTION_POLL | \ 187*53ee8cc1Swenshuai.xi TSP_EVENT_PVR0_RDY_POLL | \ 188*53ee8cc1Swenshuai.xi TSP_EVENT_PVR1_RDY_POLL ) 189*53ee8cc1Swenshuai.xi 190*53ee8cc1Swenshuai.xi #endif // __LEGACY__ 191*53ee8cc1Swenshuai.xi 192*53ee8cc1Swenshuai.xi 193*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 194*53ee8cc1Swenshuai.xi // Type and Structure 195*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 196*53ee8cc1Swenshuai.xi 197*53ee8cc1Swenshuai.xi //For Tee 198*53ee8cc1Swenshuai.xi //---------------- 199*53ee8cc1Swenshuai.xi #ifdef SECURE_PVR_ENABLE 200*53ee8cc1Swenshuai.xi typedef enum 201*53ee8cc1Swenshuai.xi { 202*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_NULL, 203*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_FW_LoadCode, //None parameters 204*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_SET_VqBuf, //None parameters 205*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_SET_PvrBuf, //Param1: Engine id, Param2: Option 1 is reset buffer to 0 206*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_SET_FileinBuf, //Param1: Engine id, Param2: Buf address, Param3: Buf size 207*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_GET_PvrWPtr, //Param1: Engine id, Param2: Return Buf address 208*53ee8cc1Swenshuai.xi E_DRVTSP_REE_TO_TEE_CMD_SET_MMFIBuf //Param1: Engine id, Param2: Return Buf address 209*53ee8cc1Swenshuai.xi } TSP_REE_TO_TEE_CMD_TYPE; 210*53ee8cc1Swenshuai.xi 211*53ee8cc1Swenshuai.xi typedef struct __attribute__((__packed__)) 212*53ee8cc1Swenshuai.xi { 213*53ee8cc1Swenshuai.xi MS_U32 u32BufId; 214*53ee8cc1Swenshuai.xi MS_U32 u32BufOpt; 215*53ee8cc1Swenshuai.xi MS_U32 u32BufSize; 216*53ee8cc1Swenshuai.xi MS_PHY phyBufAddr; 217*53ee8cc1Swenshuai.xi }DrvTSP_SecureBuf; 218*53ee8cc1Swenshuai.xi 219*53ee8cc1Swenshuai.xi #endif //SECURE_PVR_ENABLE 220*53ee8cc1Swenshuai.xi 221*53ee8cc1Swenshuai.xi typedef enum _TSP_Id 222*53ee8cc1Swenshuai.xi { 223*53ee8cc1Swenshuai.xi E_TSP_ID_0 = 0, 224*53ee8cc1Swenshuai.xi E_TSP_ID_1, 225*53ee8cc1Swenshuai.xi E_TSP_ID_2, 226*53ee8cc1Swenshuai.xi E_TSP_ID_NULL = 0xFF, 227*53ee8cc1Swenshuai.xi } EN_TSP_Id; 228*53ee8cc1Swenshuai.xi 229*53ee8cc1Swenshuai.xi 230*53ee8cc1Swenshuai.xi /// TSP DDI return value 231*53ee8cc1Swenshuai.xi /// @name TSP_Result 232*53ee8cc1Swenshuai.xi /// @ref TSP_Result 233*53ee8cc1Swenshuai.xi /// return value 234*53ee8cc1Swenshuai.xi /// @{ 235*53ee8cc1Swenshuai.xi typedef enum 236*53ee8cc1Swenshuai.xi { 237*53ee8cc1Swenshuai.xi E_TSP_FAIL = 0, 238*53ee8cc1Swenshuai.xi E_TSP_OK, 239*53ee8cc1Swenshuai.xi E_TSP_FAIL_PARAMETER, 240*53ee8cc1Swenshuai.xi E_TSP_FAIL_FUNCTION, 241*53ee8cc1Swenshuai.xi E_TSP_FAIL_NOT_SUPPORTED, 242*53ee8cc1Swenshuai.xi E_TSP_FAIL_INVALID, 243*53ee8cc1Swenshuai.xi E_TSP_FAIL_NODATA, 244*53ee8cc1Swenshuai.xi 245*53ee8cc1Swenshuai.xi } TSP_Result; 246*53ee8cc1Swenshuai.xi /// @} 247*53ee8cc1Swenshuai.xi 248*53ee8cc1Swenshuai.xi /// TSP Init Parameter 249*53ee8cc1Swenshuai.xi /// @name TSP_InitParam 250*53ee8cc1Swenshuai.xi /// @{ 251*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED _TSP_InitParam 252*53ee8cc1Swenshuai.xi { 253*53ee8cc1Swenshuai.xi MS_PHYADDR phyFWAddr; /// Firmware source physical address 254*53ee8cc1Swenshuai.xi #if !defined (__aarch64__) 255*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy0; //align size for MI init share mem size check fail 256*53ee8cc1Swenshuai.xi #endif 257*53ee8cc1Swenshuai.xi MS_U32 u32FWSize; 258*53ee8cc1Swenshuai.xi 259*53ee8cc1Swenshuai.xi MS_PHYADDR phyVQAddr; /// Internal buffer physical address 260*53ee8cc1Swenshuai.xi #if !defined (__aarch64__) 261*53ee8cc1Swenshuai.xi MS_U32 u32AlignDummy1; //align size for MI init share mem size check fail 262*53ee8cc1Swenshuai.xi #endif 263*53ee8cc1Swenshuai.xi MS_U32 u32VQSize; 264*53ee8cc1Swenshuai.xi 265*53ee8cc1Swenshuai.xi } TSP_InitParam; 266*53ee8cc1Swenshuai.xi /// @} 267*53ee8cc1Swenshuai.xi 268*53ee8cc1Swenshuai.xi 269*53ee8cc1Swenshuai.xi // @NOTE should be Exclusive usage 270*53ee8cc1Swenshuai.xi typedef MS_U32 TSP_TSIFCfg; 271*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_EN 0x0001 // 1: enable ts interface 0 and vice versa 272*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_DIS 0x0000 273*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_SERL 0x0000 274*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_PARL 0x0002 275*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_EXTSYNC 0x0004 276*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_BITSWAP 0x0008 277*53ee8cc1Swenshuai.xi #define E_TSP_TSIF_3WIRE 0x0010 278*53ee8cc1Swenshuai.xi 279*53ee8cc1Swenshuai.xi 280*53ee8cc1Swenshuai.xi /// TSP TS Input Source 281*53ee8cc1Swenshuai.xi typedef enum _TSP_TSPad 282*53ee8cc1Swenshuai.xi { 283*53ee8cc1Swenshuai.xi E_TSP_TS_PAD0, 284*53ee8cc1Swenshuai.xi E_TSP_TS_PAD1, 285*53ee8cc1Swenshuai.xi E_TSP_TS_PAD2, 286*53ee8cc1Swenshuai.xi E_TSP_TS_PAD3, 287*53ee8cc1Swenshuai.xi E_TSP_TS_PAD4, 288*53ee8cc1Swenshuai.xi E_TSP_TS_PAD5, 289*53ee8cc1Swenshuai.xi E_TSP_TS_PAD6, 290*53ee8cc1Swenshuai.xi E_TSP_TS_PAD7, 291*53ee8cc1Swenshuai.xi 292*53ee8cc1Swenshuai.xi E_TSP_TS_DEMOD0, 293*53ee8cc1Swenshuai.xi E_TSP_TS_DEMOD1, 294*53ee8cc1Swenshuai.xi 295*53ee8cc1Swenshuai.xi E_TSP_TS_PAD_TSO0, 296*53ee8cc1Swenshuai.xi E_TSP_TS_PAD_TSO1, 297*53ee8cc1Swenshuai.xi 298*53ee8cc1Swenshuai.xi E_TSP_TS_PAD0_3WIRE, 299*53ee8cc1Swenshuai.xi E_TSP_TS_PAD1_3WIRE, 300*53ee8cc1Swenshuai.xi E_TSP_TS_PAD2_3WIRE, 301*53ee8cc1Swenshuai.xi E_TSP_TS_PAD3_3WIRE, 302*53ee8cc1Swenshuai.xi E_TSP_TS_PAD4_3WIRE, 303*53ee8cc1Swenshuai.xi E_TSP_TS_PAD5_3WIRE, 304*53ee8cc1Swenshuai.xi E_TSP_TS_PAD6_3WIRE, 305*53ee8cc1Swenshuai.xi E_TSP_TS_PAD7_3WIRE, 306*53ee8cc1Swenshuai.xi 307*53ee8cc1Swenshuai.xi E_TSP_TS_PAD_TSIO0, 308*53ee8cc1Swenshuai.xi 309*53ee8cc1Swenshuai.xi E_TSP_TS_INVALID, 310*53ee8cc1Swenshuai.xi } TSP_TSPad; 311*53ee8cc1Swenshuai.xi 312*53ee8cc1Swenshuai.xi typedef enum _TSP_TSId // for k3 TSP Path //@FIXME modify _TSP_TSId -> _TSP_TSPATH 313*53ee8cc1Swenshuai.xi { 314*53ee8cc1Swenshuai.xi E_TSP_TSID_TSIF0 = 0 , 315*53ee8cc1Swenshuai.xi E_TSP_TSID_TSIF1 = 1 , 316*53ee8cc1Swenshuai.xi E_TSP_TSID_TSIF2 = 2 , 317*53ee8cc1Swenshuai.xi E_TSP_TSID_TSIF3 = 3 , 318*53ee8cc1Swenshuai.xi E_TSP_TSID_MMFI0 = 4 , 319*53ee8cc1Swenshuai.xi E_TSP_TSID_MMFI1 = 5 , 320*53ee8cc1Swenshuai.xi 321*53ee8cc1Swenshuai.xi E_TSP_TSID_INVALID, 322*53ee8cc1Swenshuai.xi 323*53ee8cc1Swenshuai.xi } TSP_TSId; //@FIXME modify TSP_TSId -> TSP_TSPath 324*53ee8cc1Swenshuai.xi 325*53ee8cc1Swenshuai.xi typedef enum _TSP_TSIF // for HW TSIF 326*53ee8cc1Swenshuai.xi { 327*53ee8cc1Swenshuai.xi E_TSP_TSIF_0 = 0 , 328*53ee8cc1Swenshuai.xi E_TSP_TSIF_1 = 1 , 329*53ee8cc1Swenshuai.xi E_TSP_TSIF_2 = 2 , 330*53ee8cc1Swenshuai.xi E_TSP_TSIF_3 = 3 , 331*53ee8cc1Swenshuai.xi E_TSP_TSIF_4 = 4 , 332*53ee8cc1Swenshuai.xi E_TSP_TSIF_5 = 5 , 333*53ee8cc1Swenshuai.xi E_TSP_TSIF_6 = 6 , 334*53ee8cc1Swenshuai.xi E_TSP_TSIF_TSP_MAX = 6 , 335*53ee8cc1Swenshuai.xi E_TSP_TSIF_CB = 7 , 336*53ee8cc1Swenshuai.xi E_TSP_TSIF_TSO0 = 8 , 337*53ee8cc1Swenshuai.xi E_TSP_TSIF_TSO1 = 9 , 338*53ee8cc1Swenshuai.xi E_TSP_TSIF_EMMFLT = 10 , 339*53ee8cc1Swenshuai.xi // @NOTE There are no real TSIFs for TSIF_PVRx , just use those for PVR backward competiable. 340*53ee8cc1Swenshuai.xi E_TSP_TSIF_PVR0 = 11 , 341*53ee8cc1Swenshuai.xi E_TSP_TSIF_PVR1 = 12 , 342*53ee8cc1Swenshuai.xi E_TSP_TSIF_PVR2 = 13 , 343*53ee8cc1Swenshuai.xi E_TSP_TSIF_PVR3 = 14 , 344*53ee8cc1Swenshuai.xi E_TSP_TSIF_INVALID, 345*53ee8cc1Swenshuai.xi 346*53ee8cc1Swenshuai.xi } TSP_TSIF; 347*53ee8cc1Swenshuai.xi 348*53ee8cc1Swenshuai.xi typedef enum _TSP_FLOW // for Dst type 349*53ee8cc1Swenshuai.xi { 350*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK0, 351*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK1, 352*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK2, 353*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK3, 354*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK4, 355*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK5, 356*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PLAYBACK6, 357*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PVR0, 358*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PVR1, 359*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PVR2, 360*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_PVR3, 361*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_TSO0, 362*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_TSO1, 363*53ee8cc1Swenshuai.xi E_DRV_TSP_FLOW_INVALID, 364*53ee8cc1Swenshuai.xi } DRV_TSP_FLOW; 365*53ee8cc1Swenshuai.xi 366*53ee8cc1Swenshuai.xi typedef enum // merge this with drvtsp2.h->TSP_TSIF 367*53ee8cc1Swenshuai.xi { 368*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF0 = 0x0, 369*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF1 = 0x1, 370*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF2 = 0x2, 371*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF3 = 0x3, 372*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF4 = 0x4, 373*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF5 = 0x5, 374*53ee8cc1Swenshuai.xi E_DRVTSP_IF_TSIF6 = 0x6, 375*53ee8cc1Swenshuai.xi 376*53ee8cc1Swenshuai.xi E_DRVTSP_IF_NUM, 377*53ee8cc1Swenshuai.xi } DrvTSP_If; 378*53ee8cc1Swenshuai.xi 379*53ee8cc1Swenshuai.xi typedef enum 380*53ee8cc1Swenshuai.xi { 381*53ee8cc1Swenshuai.xi E_DRV_TSP_PATH_LIVE, 382*53ee8cc1Swenshuai.xi E_DRV_TSP_PATH_FILE, 383*53ee8cc1Swenshuai.xi 384*53ee8cc1Swenshuai.xi E_DRV_TSP_PATH_INVALID 385*53ee8cc1Swenshuai.xi } DRV_TSP_PATH_TYPE; 386*53ee8cc1Swenshuai.xi 387*53ee8cc1Swenshuai.xi //---------------------------------- 388*53ee8cc1Swenshuai.xi /// DMX debug table information structure 389*53ee8cc1Swenshuai.xi //---------------------------------- 390*53ee8cc1Swenshuai.xi typedef enum 391*53ee8cc1Swenshuai.xi { 392*53ee8cc1Swenshuai.xi E_DRVTSP_DEBUG_CMD_NONE, 393*53ee8cc1Swenshuai.xi E_DRVTSP_DEBUG_CMD_CLEAR, 394*53ee8cc1Swenshuai.xi E_DRVTSP_DEBUG_CMD_ENABLE, 395*53ee8cc1Swenshuai.xi E_DRVTSP_DEBUG_CMD_DISABLE, 396*53ee8cc1Swenshuai.xi 397*53ee8cc1Swenshuai.xi } DrvTSP_Debug_Cmd; 398*53ee8cc1Swenshuai.xi 399*53ee8cc1Swenshuai.xi typedef enum 400*53ee8cc1Swenshuai.xi { 401*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE0, 402*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE1, 403*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE2, 404*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE3, 405*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE4, 406*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE5, 407*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_LIVE6, 408*53ee8cc1Swenshuai.xi 409*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE0, 410*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE1, 411*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE2, 412*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE3, 413*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE4, 414*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE5, 415*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_FILE6, 416*53ee8cc1Swenshuai.xi 417*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_MMFI0, 418*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_MMFI1, 419*53ee8cc1Swenshuai.xi 420*53ee8cc1Swenshuai.xi E_DRVTSP_FLOW_INVALID, 421*53ee8cc1Swenshuai.xi 422*53ee8cc1Swenshuai.xi } DrvTSP_Flow; 423*53ee8cc1Swenshuai.xi 424*53ee8cc1Swenshuai.xi typedef enum 425*53ee8cc1Swenshuai.xi { 426*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO, 427*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO3D, 428*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO3, 429*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO4, 430*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO5, 431*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO6, 432*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO7, 433*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_VIDEO8, 434*53ee8cc1Swenshuai.xi 435*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIO, 436*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIOB, 437*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIOC, 438*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIOD, 439*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIOE, 440*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_AUDIOF, 441*53ee8cc1Swenshuai.xi 442*53ee8cc1Swenshuai.xi E_DRVTSP_AVFIFO_INVALID, 443*53ee8cc1Swenshuai.xi 444*53ee8cc1Swenshuai.xi } DrvTSP_AVFIFO; 445*53ee8cc1Swenshuai.xi 446*53ee8cc1Swenshuai.xi // @TODO : add flag number define in each chip hal 447*53ee8cc1Swenshuai.xi #ifndef TSP_MAX_PVRSIGFLAG_NUM 448*53ee8cc1Swenshuai.xi #define TSP_MAX_PVRSIGFLAG_NUM 10 449*53ee8cc1Swenshuai.xi #endif 450*53ee8cc1Swenshuai.xi #ifndef TSP_MAX_SIGFLAG_NUM 451*53ee8cc1Swenshuai.xi #define TSP_MAX_SIGFLAG_NUM 16 452*53ee8cc1Swenshuai.xi #endif 453*53ee8cc1Swenshuai.xi 454*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 455*53ee8cc1Swenshuai.xi { 456*53ee8cc1Swenshuai.xi MS_U32 u32Eng; 457*53ee8cc1Swenshuai.xi MS_U32 u32EvtWaitOpt; 458*53ee8cc1Swenshuai.xi MS_U32 u32DmxEvt; 459*53ee8cc1Swenshuai.xi MS_U32 u32TspEvt; 460*53ee8cc1Swenshuai.xi 461*53ee8cc1Swenshuai.xi MS_U32 u32PvrBufFullFlag[TSP_MAX_PVRSIGFLAG_NUM]; 462*53ee8cc1Swenshuai.xi 463*53ee8cc1Swenshuai.xi MS_U32 u32SecRdyFlag[TSP_MAX_SIGFLAG_NUM]; 464*53ee8cc1Swenshuai.xi MS_U32 u32SecOvfFlag[TSP_MAX_SIGFLAG_NUM]; 465*53ee8cc1Swenshuai.xi MS_U32 u32SecCrcErrFlag[TSP_MAX_SIGFLAG_NUM]; 466*53ee8cc1Swenshuai.xi 467*53ee8cc1Swenshuai.xi MS_S32 s32KerModeTspEvtId; //For kernel mode, every user callback process must has itself eventid in multiple process support 468*53ee8cc1Swenshuai.xi MS_U32 u32TblIndex; 469*53ee8cc1Swenshuai.xi }DrvTSP_IoSignal; 470*53ee8cc1Swenshuai.xi 471*53ee8cc1Swenshuai.xi 472*53ee8cc1Swenshuai.xi // @TODO: ? 473*53ee8cc1Swenshuai.xi #define TSP_FltType MS_U32 474*53ee8cc1Swenshuai.xi /// TS stream fifo type 475*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_MASK 0x000000FF 476*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_INVALID 0x00000000 477*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_REC 0x00000001 478*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR0 0x00000002 479*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR E_TSP_FLT_FIFO_PVR0 480*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR1 0x00000003 481*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR2 0x00000004 482*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR3 0x00000005 483*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR4 0x00000006 484*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR5 0x00000007 485*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR6 0x00000008 486*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR7 0x00000009 487*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR8 0x0000000A 488*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_PVR9 0x0000000B 489*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO 0x0000000C 490*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO2 0x0000000D 491*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO3 0x0000000E 492*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO4 0x0000000F 493*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO5 0x00000010 494*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_AUDIO6 0x00000011 495*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO 0x00000012 496*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO3D 0x00000013 497*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO3 0x00000014 498*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO4 0x00000015 499*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO5 0x00000016 500*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO6 0x00000017 501*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO7 0x00000018 502*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FIFO_VIDEO8 0x00000019 503*53ee8cc1Swenshuai.xi 504*53ee8cc1Swenshuai.xi /// Section user filter type (Exclusive Usage) 505*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_MASK 0x00000F00 ///<\n 506*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_SHFT 8 ///<\n 507*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_NULL 0x00000000 508*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_SEC 0x00000100 ///<\n 509*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_PES 0x00000200 ///<\n 510*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_PKT 0x00000300 //[Reserved] 511*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_PCR 0x00000400 ///<\n 512*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_TTX 0x00000500 513*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_EMM 0x00000600 //NDS 514*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_ECM 0x00000700 //NDS 515*53ee8cc1Swenshuai.xi #define E_TSP_FLT_USER_OAD 0x00000800 //[Reserved] 516*53ee8cc1Swenshuai.xi 517*53ee8cc1Swenshuai.xi 518*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FLAG_MASK 0x0000F000 519*53ee8cc1Swenshuai.xi #define E_TSP_FLT_FLAG_CA 0x00001000 520*53ee8cc1Swenshuai.xi 521*53ee8cc1Swenshuai.xi /// TSIF Source (Exclusive Usage) 522*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_MASK 0xF00F0000 523*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE0 0x00000000 524*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE1 0x00010000 525*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE2 0x00020000 526*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE3 0x00030000 527*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE4 0x00040000 528*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE5 0x00050000 529*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_LIVE6 0x00060000 530*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE0 0x00070000 531*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE1 0x00080000 532*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE2 0x00090000 533*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE3 0x000A0000 534*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE4 0x000B0000 535*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE5 0x000C0000 536*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRC_FILE6 0x000D0000 537*53ee8cc1Swenshuai.xi 538*53ee8cc1Swenshuai.xi 539*53ee8cc1Swenshuai.xi /// Source ID define. For merge stream 540*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_MASK 0x01F00000 541*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_SHIFT 20 542*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_0 0x00000000 543*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_1 0x00100000 544*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_2 0x00200000 545*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_3 0x00300000 546*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_4 0x00400000 547*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_5 0x00500000 548*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_6 0x00600000 549*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_7 0x00700000 550*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_8 0x00800000 551*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_9 0x00900000 552*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_10 0x00a00000 553*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_11 0x00b00000 554*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_12 0x00c00000 555*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_13 0x00d00000 556*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_14 0x00e00000 557*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_15 0x00f00000 558*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_16 0x01000000 559*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_17 0x01100000 560*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_18 0x01200000 561*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_19 0x01300000 562*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_20 0x01400000 563*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_21 0x01500000 564*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_22 0x01600000 565*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_23 0x01700000 566*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_24 0x01800000 567*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_25 0x01900000 568*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_26 0x01a00000 569*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_27 0x01b00000 570*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_28 0x01c00000 571*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_29 0x01d00000 572*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_30 0x01e00000 573*53ee8cc1Swenshuai.xi #define E_TSP_FLT_SRCID_31 0x01f00000 574*53ee8cc1Swenshuai.xi 575*53ee8cc1Swenshuai.xi 576*53ee8cc1Swenshuai.xi /// I frame LUT define. 577*53ee8cc1Swenshuai.xi #define E_TSP_DST_IFRAME_LUT 0x08000000 578*53ee8cc1Swenshuai.xi 579*53ee8cc1Swenshuai.xi #define TSP_FltMode MS_U32 580*53ee8cc1Swenshuai.xi #define E_TSP_FLT_MODE_CONTI 0x00000000 581*53ee8cc1Swenshuai.xi #define E_TSP_FLT_MODE_ONESHOT 0x00000001 582*53ee8cc1Swenshuai.xi 583*53ee8cc1Swenshuai.xi // optional 584*53ee8cc1Swenshuai.xi #define E_TSP_FLT_MODE_CRCCHK 0x00000002 585*53ee8cc1Swenshuai.xi //#define E_TSP_FLT_MODE_AUTO_ADDR 0x00000004 // auto move read point mode 586*53ee8cc1Swenshuai.xi #define E_TSP_FLT_MODE_AUTO_CRCCHK 0x00000008 //not really for setting, mapped to TSP_SECFLT_MODE_AUTO_CRCCHK 587*53ee8cc1Swenshuai.xi 588*53ee8cc1Swenshuai.xi /// TSP channel state bit flags 589*53ee8cc1Swenshuai.xi typedef enum //_DrvTSP_FltState // @FIXME we current use this enum with == not &. doesn't have to be exclusive use 590*53ee8cc1Swenshuai.xi { 591*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_FREE = 0x00000000, ///<\n 592*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_ALLOC = 0x00000001, ///<\n 593*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_ENABLE = 0x00000002, ///<\n 594*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_SCRAMBLED = 0x00000004, //[TODO] 595*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_STREAM_AVAIL = 0x00000008, //[TODO] 596*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_SCRAMBLED_ORG = 0x00000010, 597*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_ISR_FREE = 0x00000020, ///<\n 598*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_OVERFLOW = 0x00010000, //[Reserved] 599*53ee8cc1Swenshuai.xi E_TSP_FLT_STATE_NA = 0xFFFFFFFF, 600*53ee8cc1Swenshuai.xi } TSP_FltState; 601*53ee8cc1Swenshuai.xi 602*53ee8cc1Swenshuai.xi 603*53ee8cc1Swenshuai.xi /// TSP record mode 604*53ee8cc1Swenshuai.xi typedef enum //_DrvTSP_RecMode 605*53ee8cc1Swenshuai.xi { 606*53ee8cc1Swenshuai.xi //[TODO] rename REC_MODE to PVR_MODE 607*53ee8cc1Swenshuai.xi 608*53ee8cc1Swenshuai.xi /// Record ENG0 by @ref E_DRVTSP_FLT_TYPE_PVR 609*53ee8cc1Swenshuai.xi E_TSP_REC_MODE_ENG0_FLTTYPE = 0x00000000, // TSP_PVR_CTRL_ENG(0) 610*53ee8cc1Swenshuai.xi /// Record ENG1 by @ref E_DRVTSP_FLT_TYPE_PVR 611*53ee8cc1Swenshuai.xi E_TSP_REC_MODE_ENG1_FLTTYPE = 0x00000001, // TSP_PVR_CTRL_ENG(1) 612*53ee8cc1Swenshuai.xi /// Record ENG0 bypass PID fliter 613*53ee8cc1Swenshuai.xi E_TSP_REC_MODE_ENG0_BYPASS = 0x00000002, // TSP_PVR_CTRL_ENG(0) + TSP_PVR_CTRL_BYPASS 614*53ee8cc1Swenshuai.xi /// Record ENG1 bypass PID fliter 615*53ee8cc1Swenshuai.xi E_TSP_REC_MODE_ENG1_BYPASS = 0x00000003, // TSP_PVR_CTRL_ENG(1) + TSP_PVR_CTRL_BYPASS 616*53ee8cc1Swenshuai.xi 617*53ee8cc1Swenshuai.xi } TSP_RecMode; 618*53ee8cc1Swenshuai.xi 619*53ee8cc1Swenshuai.xi 620*53ee8cc1Swenshuai.xi /// TSP Control Mode 621*53ee8cc1Swenshuai.xi typedef enum //_DrvTSP_CtrlMode 622*53ee8cc1Swenshuai.xi { 623*53ee8cc1Swenshuai.xi /// Input From Stream Source 0 624*53ee8cc1Swenshuai.xi E_TSP_CTRL_MODE_TS0, 625*53ee8cc1Swenshuai.xi /// Input From Stream Source 1 626*53ee8cc1Swenshuai.xi E_TSP_CTRL_MODE_TS1, 627*53ee8cc1Swenshuai.xi /// Input From Memory 628*53ee8cc1Swenshuai.xi E_TSP_CTRL_MODE_MEM, 629*53ee8cc1Swenshuai.xi } TSP_CtrlMode; 630*53ee8cc1Swenshuai.xi 631*53ee8cc1Swenshuai.xi 632*53ee8cc1Swenshuai.xi typedef enum 633*53ee8cc1Swenshuai.xi { 634*53ee8cc1Swenshuai.xi /// Streaming to TSP 635*53ee8cc1Swenshuai.xi E_TSP_FILE_2_TSP = 0x00000000, //TSP_TSDMA_CTRL_ENG0 636*53ee8cc1Swenshuai.xi /// Streaming to AUDIO FIFO 637*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO = 0x00000001, //TSP_TSDMA_CTRL_APES0 638*53ee8cc1Swenshuai.xi /// Streaming to AUDIO2 FIFO 639*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO2 = 0x00000002, //TSP_TSDMA_CTRL_A2PES0 640*53ee8cc1Swenshuai.xi /// Streaming to AUDIO3 FIFO 641*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO3 = 0x00000003, //TSP_TSDMA_CTRL_A3PES0 642*53ee8cc1Swenshuai.xi /// Streaming to AUDIO4 FIFO 643*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO4 = 0x00000004, //TSP_TSDMA_CTRL_A4PES0 644*53ee8cc1Swenshuai.xi /// Streaming to AUDIO5 FIFO 645*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO5 = 0x00000005, //TSP_TSDMA_CTRL_A5PES0 646*53ee8cc1Swenshuai.xi /// Streaming to AUDIO6 FIFO 647*53ee8cc1Swenshuai.xi E_TSP_FILE_2_AUDIO6 = 0x00000006, //TSP_TSDMA_CTRL_A6PES0 648*53ee8cc1Swenshuai.xi /// Streaming to VIDEO FIFO 649*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO = 0x00000007, //TSP_TSDMA_CTRL_VPES0 650*53ee8cc1Swenshuai.xi /// Streaming to VIDEO3D FIFO 651*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO3D = 0x00000008, //TSP_TSDMA_CTRL_V3DPES0 652*53ee8cc1Swenshuai.xi /// Streaming to VIDEO3 FIFO 653*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO3 = 0x00000009, //TSP_TSDMA_CTRL_V3PES0 654*53ee8cc1Swenshuai.xi /// Streaming to VIDEO4 FIFO 655*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO4 = 0x0000000A, //TSP_TSDMA_CTRL_V4PES0 656*53ee8cc1Swenshuai.xi /// Streaming to VIDEO5 FIFO 657*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO5 = 0x0000000B, //TSP_TSDMA_CTRL_V5PES0 658*53ee8cc1Swenshuai.xi /// Streaming to VIDEO6 FIFO 659*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO6 = 0x0000000C, //TSP_TSDMA_CTRL_V6PES0 660*53ee8cc1Swenshuai.xi /// Streaming to VIDEO7 FIFO 661*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO7 = 0x0000000D, //TSP_TSDMA_CTRL_V7PES0 662*53ee8cc1Swenshuai.xi /// Streaming to VIDEO8 FIFO 663*53ee8cc1Swenshuai.xi E_TSP_FILE_2_VIDEO8 = 0x0000000E, //TSP_TSDMA_CTRL_V8PES0 664*53ee8cc1Swenshuai.xi 665*53ee8cc1Swenshuai.xi } TSP_FileMode; 666*53ee8cc1Swenshuai.xi 667*53ee8cc1Swenshuai.xi 668*53ee8cc1Swenshuai.xi typedef enum _TSP_FileinState 669*53ee8cc1Swenshuai.xi { 670*53ee8cc1Swenshuai.xi /// Command Queue is Idle 671*53ee8cc1Swenshuai.xi E_TSP_FILE_STATE_IDLE = 0000000000, 672*53ee8cc1Swenshuai.xi /// Command Queue is Busy 673*53ee8cc1Swenshuai.xi E_TSP_FILE_STATE_BUSY = 0x00000001, 674*53ee8cc1Swenshuai.xi /// Command Queue is Paused. 675*53ee8cc1Swenshuai.xi E_TSP_FILE_STATE_PAUSE = 0x00000002, 676*53ee8cc1Swenshuai.xi } TSP_FileState; 677*53ee8cc1Swenshuai.xi 678*53ee8cc1Swenshuai.xi 679*53ee8cc1Swenshuai.xi #define TSP_Event MS_U32 680*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_DATA_IDLE 0x00000000 681*53ee8cc1Swenshuai.xi /// Section Data Ready 682*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_DATA_READY 0x00000001 683*53ee8cc1Swenshuai.xi /// Section data CRC Error 684*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_SEC_CRCERROR 0x00000004 685*53ee8cc1Swenshuai.xi /// Section Buffer Overflow 686*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_BUF_OVERFLOW 0x00000002 687*53ee8cc1Swenshuai.xi /// PVR Buffer is Full 688*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_PVRBUF_FULL 0x00000010 689*53ee8cc1Swenshuai.xi /// PVR Double Buffer Overflow 690*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_PVRBUF_OVERFLOW 0x00000020 691*53ee8cc1Swenshuai.xi 692*53ee8cc1Swenshuai.xi /// TSP self task callback // optional --> default is CB by poll 693*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_CB_MASK 0x80000000 694*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_CB_POLL 0x00000000 695*53ee8cc1Swenshuai.xi #define E_TSP_EVENT_CB_AUTO 0x80000000 696*53ee8cc1Swenshuai.xi 697*53ee8cc1Swenshuai.xi /// TSP file in Engine 698*53ee8cc1Swenshuai.xi typedef enum 699*53ee8cc1Swenshuai.xi { 700*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF0 = 0, 701*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF1 = 1, 702*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF2 = 2, 703*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF3 = 3, 704*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF4 = 4, 705*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF5 = 5, 706*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_TSIF6 = 6, 707*53ee8cc1Swenshuai.xi E_TSP_FILE_ENG_INVALID, 708*53ee8cc1Swenshuai.xi } TSP_FILE_ENG; 709*53ee8cc1Swenshuai.xi 710*53ee8cc1Swenshuai.xi /// TSP file in Packet mode 711*53ee8cc1Swenshuai.xi typedef enum 712*53ee8cc1Swenshuai.xi { 713*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_188 = 0x00000000, 714*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_192 = 0x00000001, 715*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_204 = 0x00000002, 716*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_130 = 0x00000003, // RVU 717*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_134 = 0x00000004, // RVU with timestamp 718*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_FILEIN_MIN = E_TSP_PKTMODE_188, 719*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_FILEIN_MAX = E_TSP_PKTMODE_134, 720*53ee8cc1Swenshuai.xi 721*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_CIPLUS = 0x00000005, // CI+ (188 bytes) 722*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_ATS = 0x00000006, // ATS (192 bytes) 723*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_OPENCABLE = 0x00000007, // OpenCable (200 bytes) 724*53ee8cc1Swenshuai.xi 725*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_MXL192 = 0x00000008, // MxL (192 bytes) 726*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_MXL196 = 0x00000009, // MxL (196 bytes) 727*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_MXL200 = 0x0000000A, // MxL (200 bytes) 728*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_LIVEIN_MIN = E_TSP_PKTMODE_CIPLUS, 729*53ee8cc1Swenshuai.xi E_TSP_PKTMODE_LIVEIN_MAX = E_TSP_PKTMODE_MXL200 730*53ee8cc1Swenshuai.xi 731*53ee8cc1Swenshuai.xi } TSP_PktMode; 732*53ee8cc1Swenshuai.xi 733*53ee8cc1Swenshuai.xi /// TSP notification event message 734*53ee8cc1Swenshuai.xi typedef struct _TSP_EventMsg 735*53ee8cc1Swenshuai.xi { 736*53ee8cc1Swenshuai.xi /// Union data type of message 737*53ee8cc1Swenshuai.xi union 738*53ee8cc1Swenshuai.xi { 739*53ee8cc1Swenshuai.xi /// FltInfo message 740*53ee8cc1Swenshuai.xi /// - Byte[0] : Section filter id 741*53ee8cc1Swenshuai.xi /// - Byte[1] : TSP id 742*53ee8cc1Swenshuai.xi MS_U32 FltInfo; 743*53ee8cc1Swenshuai.xi /// PvrBufId 744*53ee8cc1Swenshuai.xi /// - Byte[0] : PVR buffer id 745*53ee8cc1Swenshuai.xi MS_U32 PvrBufId; 746*53ee8cc1Swenshuai.xi }; 747*53ee8cc1Swenshuai.xi 748*53ee8cc1Swenshuai.xi } TSP_EventMsg; 749*53ee8cc1Swenshuai.xi 750*53ee8cc1Swenshuai.xi typedef enum 751*53ee8cc1Swenshuai.xi { 752*53ee8cc1Swenshuai.xi E_TSP_DBG_NONE, // display no message 753*53ee8cc1Swenshuai.xi E_TSP_DBG_MUST, // display must print message 754*53ee8cc1Swenshuai.xi E_TSP_DBG_ERROR, // display error message 755*53ee8cc1Swenshuai.xi E_TSP_DBG_WARNING, // display warning message 756*53ee8cc1Swenshuai.xi E_TSP_DBG_FAIL, // display more info and while(1) 757*53ee8cc1Swenshuai.xi E_TSP_DBG_INFO, // display info, callee, while(1) 758*53ee8cc1Swenshuai.xi E_TSP_DBG_TRACK, 759*53ee8cc1Swenshuai.xi E_TSP_DBG_ALL, 760*53ee8cc1Swenshuai.xi 761*53ee8cc1Swenshuai.xi 762*53ee8cc1Swenshuai.xi } TSP_DbgLevel; 763*53ee8cc1Swenshuai.xi 764*53ee8cc1Swenshuai.xi /// @name TSP_EventMsg 765*53ee8cc1Swenshuai.xi /// Macro definitions for manipulating TSP_EventMsg 766*53ee8cc1Swenshuai.xi /// @{ 767*53ee8cc1Swenshuai.xi #define TSP_MSG_FLTID_MASK 0x000000FF 768*53ee8cc1Swenshuai.xi #define TSP_MSG_FLTID_SHFT 0 769*53ee8cc1Swenshuai.xi #define TSP_MSG_GETFLTID(msg) ((msg) & TSP_MSG_FLTID_MASK) 770*53ee8cc1Swenshuai.xi #define TSP_MSG_SETFLTID(msg, fltid) (((msg) & ~TSP_MSG_FLTID_MASK)) | ((fltid) << TSP_MSG_FLTID_SHFT)) 771*53ee8cc1Swenshuai.xi #define TSP_MSG_ENGID_MASK 0x0000FF00 772*53ee8cc1Swenshuai.xi #define TSP_MSG_ENGID_SHFT 8 773*53ee8cc1Swenshuai.xi #define TSP_MSG_PVRID_MASK 0x000000FF 774*53ee8cc1Swenshuai.xi #define TSP_MSG_PVRID_SHFT 0 775*53ee8cc1Swenshuai.xi #define TSP_MSG_PVRID_NULL 0xFF 776*53ee8cc1Swenshuai.xi /// @} 777*53ee8cc1Swenshuai.xi 778*53ee8cc1Swenshuai.xi typedef enum 779*53ee8cc1Swenshuai.xi { 780*53ee8cc1Swenshuai.xi E_TSP_CAP_PIDFLT_NUM = 0, 781*53ee8cc1Swenshuai.xi E_TSP_CAP_SECFLT_NUM = 1, 782*53ee8cc1Swenshuai.xi E_TSP_CAP_SECBUF_NUM = 2, 783*53ee8cc1Swenshuai.xi 784*53ee8cc1Swenshuai.xi E_TSP_CAP_RECENG_NUM = 3, 785*53ee8cc1Swenshuai.xi E_TSP_CAP_RECFLT_NUM = 4, 786*53ee8cc1Swenshuai.xi E_TSP_CAP_RECFLT1_NUM = 5, 787*53ee8cc1Swenshuai.xi 788*53ee8cc1Swenshuai.xi E_TSP_CAP_MMFI_AUDIO_FILTER_NUM = 6, 789*53ee8cc1Swenshuai.xi E_TSP_CAP_MMFI_V3D_FILTER_NUM = 7, 790*53ee8cc1Swenshuai.xi 791*53ee8cc1Swenshuai.xi E_TSP_CAP_TSIF_NUM = 8, 792*53ee8cc1Swenshuai.xi E_TSP_CAP_DEMOD_NUM = 9, 793*53ee8cc1Swenshuai.xi E_TSP_CAP_TSPAD_NUM = 10, 794*53ee8cc1Swenshuai.xi E_TSP_CAP_VQ_NUM = 11, 795*53ee8cc1Swenshuai.xi 796*53ee8cc1Swenshuai.xi E_TSP_CAP_CAFLT_NUM = 12, 797*53ee8cc1Swenshuai.xi E_TSP_CAP_CAKEY_NUM = 13, 798*53ee8cc1Swenshuai.xi 799*53ee8cc1Swenshuai.xi E_TSP_CAP_FW_ALIGN = 14, 800*53ee8cc1Swenshuai.xi E_TSP_CAP_VQ_ALIGN = 15, 801*53ee8cc1Swenshuai.xi E_TSP_CAP_VQ_PITCH = 16, 802*53ee8cc1Swenshuai.xi E_TSP_CAP_SECBUF_ALIGN = 17, 803*53ee8cc1Swenshuai.xi E_TSP_CAP_PVR_ALIGN = 18, 804*53ee8cc1Swenshuai.xi 805*53ee8cc1Swenshuai.xi E_TSP_CAP_PVRCA_PATH_NUM = 19, 806*53ee8cc1Swenshuai.xi E_TSP_CAP_SHAREKEY_FLT_RANGE = 20, 807*53ee8cc1Swenshuai.xi E_TSP_CAP_PVRCA0_FLT_RANGE = 21, 808*53ee8cc1Swenshuai.xi E_TSP_CAP_PVRCA1_FLT_RANGE = 22, 809*53ee8cc1Swenshuai.xi E_TSP_CAP_PVRCA2_FLT_RANGE = 23, 810*53ee8cc1Swenshuai.xi E_TSP_CAP_SHAREKEY_FLT1_RANGE = 24, 811*53ee8cc1Swenshuai.xi E_TSP_CAP_SHAREKEY_FLT2_RANGE = 25, 812*53ee8cc1Swenshuai.xi 813*53ee8cc1Swenshuai.xi E_TSP_CAP_HW_TYPE = 26, 814*53ee8cc1Swenshuai.xi 815*53ee8cc1Swenshuai.xi E_TSP_CAP_RESOURCE_SIZE = 27, // Get the data structure size of private resource (share resource) 816*53ee8cc1Swenshuai.xi 817*53ee8cc1Swenshuai.xi E_TSP_CAP_VFIFO_NUM = 28, 818*53ee8cc1Swenshuai.xi E_TSP_CAP_AFIFO_NUM = 29, 819*53ee8cc1Swenshuai.xi 820*53ee8cc1Swenshuai.xi E_TSP_CAP_HWPCR_SUPPORT = 30, 821*53ee8cc1Swenshuai.xi E_TSP_CAP_PCRFLT_START_IDX = 31, 822*53ee8cc1Swenshuai.xi 823*53ee8cc1Swenshuai.xi E_TSP_CAP_HWWP_SET_NUM = 32, // Get TSP write protect set numbers 824*53ee8cc1Swenshuai.xi 825*53ee8cc1Swenshuai.xi E_TSP_CAP_CAP_DSCMB_ENG_NUM = 33, // Get DSCMB engine numbers 826*53ee8cc1Swenshuai.xi 827*53ee8cc1Swenshuai.xi E_TSP_CAP_MAX_MERGESTR_NUM = 34, // Get Maxumum merge stream number 828*53ee8cc1Swenshuai.xi E_TSP_CAP_MAX_SEC_FLT_DEPTH = 35, 829*53ee8cc1Swenshuai.xi E_TSP_CAP_FW_BUF_SIZE = 36, 830*53ee8cc1Swenshuai.xi E_TSP_CAP_FW_BUF_RANGE = 37, 831*53ee8cc1Swenshuai.xi E_TSP_CAP_VQ_BUF_RANGE = 38, 832*53ee8cc1Swenshuai.xi E_TSP_CAP_SEC_BUF_RANGE = 39, 833*53ee8cc1Swenshuai.xi E_TSP_CAP_FIQ_NUM = 40, 834*53ee8cc1Swenshuai.xi E_TSP_CAP_RECFLT_IDX = 41, // [NOTE] internal usage 835*53ee8cc1Swenshuai.xi E_TSP_CAP_NULL, 836*53ee8cc1Swenshuai.xi } TSP_Caps; 837*53ee8cc1Swenshuai.xi 838*53ee8cc1Swenshuai.xi 839*53ee8cc1Swenshuai.xi 840*53ee8cc1Swenshuai.xi typedef enum 841*53ee8cc1Swenshuai.xi { 842*53ee8cc1Swenshuai.xi E_TSP_HW_STATUS = 0, 843*53ee8cc1Swenshuai.xi E_TSP_HW_INIT, 844*53ee8cc1Swenshuai.xi E_TSP_HW_ALIVE, 845*53ee8cc1Swenshuai.xi E_TSP_HW_DEALIVE, 846*53ee8cc1Swenshuai.xi } TSP_HW_Status; 847*53ee8cc1Swenshuai.xi 848*53ee8cc1Swenshuai.xi typedef enum 849*53ee8cc1Swenshuai.xi { 850*53ee8cc1Swenshuai.xi E_TSP_SW_INIT = 0, 851*53ee8cc1Swenshuai.xi E_TSP_SW_INIT_FAIL, 852*53ee8cc1Swenshuai.xi E_TSP_SW_SUSPEND, 853*53ee8cc1Swenshuai.xi E_TSP_SW_RESUME, 854*53ee8cc1Swenshuai.xi E_TSP_SW_POWEROFF, 855*53ee8cc1Swenshuai.xi E_TSP_SW_CLOSE, 856*53ee8cc1Swenshuai.xi E_TSP_SW_EXIT, 857*53ee8cc1Swenshuai.xi } TSP_SW_Status; 858*53ee8cc1Swenshuai.xi 859*53ee8cc1Swenshuai.xi 860*53ee8cc1Swenshuai.xi typedef enum 861*53ee8cc1Swenshuai.xi { 862*53ee8cc1Swenshuai.xi E_TSP_DRV_PVR_RecMode_PID, 863*53ee8cc1Swenshuai.xi E_TSP_DRV_PVR_RecMode_ALL, 864*53ee8cc1Swenshuai.xi } TSP_DRV_PVR_RecMode; 865*53ee8cc1Swenshuai.xi 866*53ee8cc1Swenshuai.xi 867*53ee8cc1Swenshuai.xi typedef struct 868*53ee8cc1Swenshuai.xi { 869*53ee8cc1Swenshuai.xi TSP_TSPad ePad; 870*53ee8cc1Swenshuai.xi MS_BOOL bClkInv; 871*53ee8cc1Swenshuai.xi MS_BOOL bExtSync; 872*53ee8cc1Swenshuai.xi MS_BOOL bParallel; 873*53ee8cc1Swenshuai.xi } DrvTSP_TsIf_Set; 874*53ee8cc1Swenshuai.xi 875*53ee8cc1Swenshuai.xi typedef enum 876*53ee8cc1Swenshuai.xi { 877*53ee8cc1Swenshuai.xi E_TSP_PIDFLT_FIFO_FULL_LV_100 = 0x00000000, 878*53ee8cc1Swenshuai.xi E_TSP_PIDFLT_FIFO_FULL_LV_50 = 0x60000000 879*53ee8cc1Swenshuai.xi } TSP_FltFIFOFullLV; 880*53ee8cc1Swenshuai.xi 881*53ee8cc1Swenshuai.xi /// Cmd for DSCMB to do DSCMB functionality accessing registers which are shared with TSP 882*53ee8cc1Swenshuai.xi typedef enum//DSCMB owner plz add enum if needed 883*53ee8cc1Swenshuai.xi { 884*53ee8cc1Swenshuai.xi E_TSP_DSCMB_CMD_NUM 885*53ee8cc1Swenshuai.xi } TSP_DSCMB_FuncCMD; 886*53ee8cc1Swenshuai.xi 887*53ee8cc1Swenshuai.xi 888*53ee8cc1Swenshuai.xi /// TSP TEI Remove Error Packet Infomation 889*53ee8cc1Swenshuai.xi typedef enum 890*53ee8cc1Swenshuai.xi { 891*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_AUDIO_PKT, ///< DMX TEI Remoce Audio Packet 892*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_VIDEO_PKT, ///< DMX TEI Remoce Video Packet 893*53ee8cc1Swenshuai.xi 894*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_PKT0_LIVE, 895*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_PKT0_FILE, 896*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_PKT1, 897*53ee8cc1Swenshuai.xi E_TSP_DRV_TEI_REMOVE_PKT2, 898*53ee8cc1Swenshuai.xi 899*53ee8cc1Swenshuai.xi }TSP_DRV_TEI_RmPktType; 900*53ee8cc1Swenshuai.xi 901*53ee8cc1Swenshuai.xi /// FQ interface 902*53ee8cc1Swenshuai.xi typedef enum 903*53ee8cc1Swenshuai.xi { 904*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF0 = 0x00, 905*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF1 = 0x01, 906*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF2 = 0x02, 907*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF3 = 0x03, 908*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF4 = 0x04, 909*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF5 = 0x05, 910*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIF6 = 0x06, 911*53ee8cc1Swenshuai.xi 912*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_TSIFFI = 0x07, 913*53ee8cc1Swenshuai.xi E_DRVFQ_SRC_DEFAULT = 0xFF, 914*53ee8cc1Swenshuai.xi } DrvFQ_SrcIf; 915*53ee8cc1Swenshuai.xi 916*53ee8cc1Swenshuai.xi /// TSP TimeStamp Clk Select 917*53ee8cc1Swenshuai.xi typedef enum 918*53ee8cc1Swenshuai.xi { 919*53ee8cc1Swenshuai.xi E_TSP_TIMESTAMP_CLK_90K = 0, 920*53ee8cc1Swenshuai.xi E_TSP_TIMESTAMP_CLK_27M = 1, 921*53ee8cc1Swenshuai.xi E_TSP_TIMESTAMP_CLK_INVALID = 2 922*53ee8cc1Swenshuai.xi 923*53ee8cc1Swenshuai.xi } TSP_TimeStamp_Clk; 924*53ee8cc1Swenshuai.xi 925*53ee8cc1Swenshuai.xi 926*53ee8cc1Swenshuai.xi 927*53ee8cc1Swenshuai.xi /// TSP notification function 928*53ee8cc1Swenshuai.xi typedef void (*P_TSP_Callback)(TSP_Event eEvent, TSP_EventMsg *pMsg); 929*53ee8cc1Swenshuai.xi 930*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 931*53ee8cc1Swenshuai.xi // Function Prototype 932*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 933*53ee8cc1Swenshuai.xi 934*53ee8cc1Swenshuai.xi // TSP Setting DDIs 935*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_InitLibResource(void *pu32ResMemAddr); 936*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Init(TSP_InitParam *pParam); 937*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PowerOff(void); 938*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Exit(void); 939*53ee8cc1Swenshuai.xi 940*53ee8cc1Swenshuai.xi TSP_TSIF MDrv_TSP_TsifMapping(TSP_TSIF eTSIF); 941*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetFlowSource(DRV_TSP_FLOW eDst, TSP_TSId eTid); 942*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_SetFlowSource(MS_U32 u32PvrEng, MS_U32 u32PvrSrc); 943*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SelPad(TSP_TSIF eTSIF, TSP_TSPad eTSPad); 944*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SelPad_ClkInv(TSP_TSIF eTSIF ,MS_BOOL bClkInv); 945*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SelPad_ClkDis(TSP_TSIF eTSIF ,MS_BOOL bClkDis); 946*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_TSO_ConfigPad(MS_U32 u32TSOEng, TSP_TSPad eTSPad); 947*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetTSIF(TSP_TSIF eTSIF, TSP_TSIFCfg u16Cfg, MS_BOOL bFileIn); 948*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FIFO_Reset(TSP_FltType eFltType, MS_BOOL bFlush); 949*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FIFO_BlockEnable(TSP_FltType eFltType, MS_BOOL bDisable); 950*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FIFO_GetStatus(TSP_FltType eFltType, MS_U32 *u32FifoLevel); 951*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FIFO_SourceSelect(TSP_TSId eTspTSid, TSP_FileMode eFifoType); 952*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FIFO_Overflow_Status(TSP_FltType eFltType, MS_BOOL *pbOverflow); 953*53ee8cc1Swenshuai.xi //TSP_Result MDrv_TSP_Scmb_Status(MS_U32 u32EngId, TSP_Scmb_Level* pScmbLevel); 954*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_AU_BD_Mode_Enable(MS_BOOL bEnable); 955*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetTSIFStatus(TSP_TSIF eTSIF, TSP_TSPad* ePad, MS_BOOL* pbClkInv, MS_BOOL* pbExtSyc, MS_BOOL* pbParl); 956*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PARL_BitOrderSwap(MS_U16 u16TSIF, MS_BOOL bInvert); 957*53ee8cc1Swenshuai.xi 958*53ee8cc1Swenshuai.xi 959*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetLastErr(void); 960*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_CmdSTC(MS_U32 u32TSPId, MS_U32 u32STC_H, MS_U32 u32STC); 961*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetPCR(MS_U32 u32TSPId, MS_U32 *pu32PCR_32, MS_U32 *pu32PCR); 962*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_GetState(MS_U32 u32FltId, TSP_FltState *pState); 963*53ee8cc1Swenshuai.xi 964*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Proc(MS_U32 u32TSPId, MS_U32 u32FltId, TSP_Event* pEvt); 965*53ee8cc1Swenshuai.xi 966*53ee8cc1Swenshuai.xi // TSP FLT DDis 967*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_Alloc(MS_U32 u32TSPId, TSP_FltType eFltType, MS_U32 *pu32FltId); 968*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_Alloc_Ex(MS_U32 u32TSPId, TSP_FltType eFltType, MS_U32 *pu32FltId); 969*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_Alloc_Common(MS_U32 u32TSPId, TSP_FltType eFltType, MS_U32 *pu32FltId); 970*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_Free(MS_U32 u32FltId); 971*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetPID(MS_U32 u32FltId, MS_U32 u32PID); 972*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_GetPID(MS_U32 u32FltId, MS_U32 *pu32PID); ///RESERVED 973*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SelSEC(MS_U32 u32FltId, MS_U32 u32BufId); 974*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_GetSEC(MS_U32 u32FltId, MS_U32 *pu32BufId); ///RESERVED 975*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetCallback(MS_U32 u32FltId, TSP_Event eEvents, P_TSP_Callback pfCallback); 976*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetMode(MS_U32 u32FltId, TSP_FltMode eFltMode); 977*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetMatch(MS_U32 u32FltId, MS_U8 *pu8Match, MS_U8 *pu8Mask, MS_U8 *pu8NMask); 978*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_Enable(MS_U32 u32FltId, MS_BOOL bEnable); 979*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetPCRSrc(MS_U32 u32FltId,MS_U32 u32PCRSrc); 980*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetFltRushPass(MS_U32 u32FltId, MS_U8 u8Enable); 981*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Flt_GetScmbSts(TSP_FltType eFltType, MS_U32 u32FltGroupId, MS_U32 PidFltId, MS_U32 *pu32ScmbSts); 982*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_DropScmbPkt(TSP_FltType eFilterType, MS_BOOL bEnable); 983*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_RemapFltId(MS_BOOL bNewApi); 984*53ee8cc1Swenshuai.xi 985*53ee8cc1Swenshuai.xi // TSP SEC DDIs 986*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_Alloc(MS_U32 u32TSPId, MS_U32 *pu32BufId); 987*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_Free(MS_U32 u32BufId); 988*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_SetBuffer(MS_U32 u32BufId, MS_PHYADDR u32Start, MS_U32 u32Size); 989*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_GetSize(MS_U32 u32BufId, MS_U32 *pu32Size); 990*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_GetStart(MS_U32 u32BufId, MS_PHY *pStart); 991*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_SetRead(MS_U32 u32BufId, MS_PHY u32Read); 992*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_GetRead(MS_U32 u32BufId, MS_PHY *pu32Read); 993*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_GetWrite(MS_U32 u32BufId, MS_PHY *pu32Write); 994*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_Reset(MS_U32 u32BufId); 995*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SECFLT_BurstLen(MS_U32 u32BurstMode); 996*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX_KERNEL 997*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_ClrEvent(MS_U32 u32BufId); 998*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_GetEvent(MS_U32 u32BufId, MS_U32 *pu32Event); 999*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SEC_SetEvent(MS_U32 u32BufId, MS_U32 u32Event); 1000*53ee8cc1Swenshuai.xi #endif 1001*53ee8cc1Swenshuai.xi 1002*53ee8cc1Swenshuai.xi // TSP FILE DDIs 1003*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_SetPktMode(TSP_PktMode mode); 1004*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_SetRate(MS_U32 u32Div2); 1005*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_CmdAddr(MS_U32 u32Addr); 1006*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_CmdSize(MS_U32 u32Size); 1007*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_CmdSTC(MS_U32 u32EngId, MS_U32 u32STC_H, MS_U32 u32STC); 1008*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_CmdStart(TSP_FileMode mode); 1009*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_GetCmdSlot(MS_U32 *pu32EmptySlot); 1010*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Pause(void); 1011*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Resume(void); 1012*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Stop(void); 1013*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_GetState(TSP_FileState *pState); 1014*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Reset(void); 1015*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_File_192BlockScheme_En(MS_BOOL bEnable); 1016*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_PS_Path_Enable(TSP_FileMode mode); 1017*53ee8cc1Swenshuai.xi 1018*53ee8cc1Swenshuai.xi // TSP FILE Eng 1019*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_SetPktMode(TSP_FILE_ENG Eng, TSP_PktMode mode); 1020*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_SetRate(TSP_FILE_ENG Eng, MS_U32 u32Div2); 1021*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_CmdAddr(TSP_FILE_ENG Eng, MS_U32 u32Addr); 1022*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_CmdSize(TSP_FILE_ENG Eng, MS_U32 u32Size); 1023*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_CmdSTC(TSP_FILE_ENG Eng, MS_U32 u32EngId, MS_U32 u32STC_H, MS_U32 u32STC); 1024*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_CmdStart(TSP_FILE_ENG Eng, TSP_FileMode mode); 1025*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_GetCmdSlot(TSP_FILE_ENG Eng, MS_U32 *pu32EmptySlot); 1026*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_Pause(TSP_FILE_ENG Eng); 1027*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_Resume(TSP_FILE_ENG Eng); 1028*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_Stop(TSP_FILE_ENG Eng); 1029*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_GetState(TSP_FILE_ENG Eng, TSP_FileState *pState); 1030*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_Reset(TSP_FILE_ENG Eng); 1031*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_192BlockScheme_En(TSP_FILE_ENG Eng, MS_BOOL bEnable); 1032*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_PS_Path_Enable(TSP_FILE_ENG Eng, TSP_FileMode mode); 1033*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_CmdQFifo_Status(TSP_FILE_ENG Eng, MS_U8 *pu8FifoLevel); 1034*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_GetFileInTimeStamp(TSP_FILE_ENG Eng, MS_U32* u32TSLen); 1035*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_TimeStampEnablePlaybackStamp(TSP_FILE_ENG Eng,MS_BOOL bEnable); 1036*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_TimeStampSetPlaybackStamp(TSP_FILE_ENG Eng, MS_U32 u32Stamp); 1037*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_TimeStampSetPlaybackStampClk(TSP_FILE_ENG Eng, TSP_TimeStamp_Clk eClk); 1038*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_TimeStampGetPlaybackStamp(TSP_FILE_ENG Eng, MS_U32* u32Stamp); 1039*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_GetFileInCurReadAddr(TSP_FILE_ENG Eng, MS_PHY* pu32Addr); 1040*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FILE_Eng_MOBF_Enable(TSP_FILE_ENG eEng, MS_BOOL bEnable, MS_U32 u32Key); 1041*53ee8cc1Swenshuai.xi 1042*53ee8cc1Swenshuai.xi // Merge stream 1043*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_MStr_SyncByte(DrvTSP_If eTsIf, MS_U8 u8StrId, MS_U8 *pu8SyncByte, MS_BOOL bSet); 1044*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetPacketMode(TSP_TSIF u32TSIf, TSP_PktMode eDrvPktMode); 1045*53ee8cc1Swenshuai.xi 1046*53ee8cc1Swenshuai.xi // FQ 1047*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FQ_SetMuxSwitch(MS_U32 u32FQEng, DrvFQ_SrcIf eTsSrc); 1048*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FQ_GetMuxSwitch(MS_U32 u32FQEng, DrvFQ_SrcIf* peTsSrc); 1049*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FQ_FltNullPkt(MS_U32 u32FQEng, MS_BOOL bFltNull); 1050*53ee8cc1Swenshuai.xi 1051*53ee8cc1Swenshuai.xi // Debug table 1052*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Get_DisContiCnt(DrvTSP_Debug_Cmd eCmd, DrvTSP_AVFIFO eAvType, DrvTSP_Flow eFlow, MS_U32* pu32Cnt); 1053*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Get_DropPktCnt(DrvTSP_Debug_Cmd eCmd, DrvTSP_AVFIFO eAvType, DrvTSP_Flow eFlow, MS_U32* pu32Cnt); 1054*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Get_LockPktCnt(DrvTSP_Debug_Cmd eCmd, DrvTSP_Flow eFlow, MS_U32* pu32Cnt); 1055*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Get_AVPktCnt(DrvTSP_Debug_Cmd eCmd, DrvTSP_AVFIFO eAvType, DrvTSP_Flow eFlow, MS_U32* pu32Cnt); 1056*53ee8cc1Swenshuai.xi // @TODO ErrPktCnt Implement 1057*53ee8cc1Swenshuai.xi //TSP_Result MDrv_TSP_Get_ErrPktCnt(DrvTSP_Debug_Cmd eCmd, DrvTSP_Flow eFlow, MS_U32* pu32Cnt); 1058*53ee8cc1Swenshuai.xi 1059*53ee8cc1Swenshuai.xi // Protection range 1060*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_WriteProtect_Enable(MS_BOOL bEnable, MS_PHY *pphyStartAddr, MS_PHY *pphyEndAddr); 1061*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_OrzWriteProtect_Enable(MS_BOOL bEnable, MS_PHY phyStartAddr, MS_PHY phyEndAddr); 1062*53ee8cc1Swenshuai.xi 1063*53ee8cc1Swenshuai.xi // Utopia 2K relative functions 1064*53ee8cc1Swenshuai.xi //------- For 2K kernel mode, user mode callback thread using events 1065*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Create_IoSignal(DrvTSP_IoSignal *pstIoSignal); 1066*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Close_IoSignal(DrvTSP_IoSignal *pstIoSignal); 1067*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Wait_IoSignal(DrvTSP_IoSignal *pstIoSignal); 1068*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Proc_IoSignal(DrvTSP_IoSignal *pstIoSignal); 1069*53ee8cc1Swenshuai.xi 1070*53ee8cc1Swenshuai.xi // @TODO 1071*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_TimeStampSetPlaybackStamp(MS_U32 u32Stamp); 1072*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_TimeStampGetPlaybackStamp(MS_U32* u32Stamp); 1073*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_TimeStamp(MS_BOOL bEnable); 1074*53ee8cc1Swenshuai.xi 1075*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_FltAlloc(MS_U32 u32Eng, MS_U32* pu32FltId); 1076*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_FltFree(MS_U32 u32Eng, MS_U32 u32FltId); 1077*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_FltSetPID(MS_U32 u32Eng, MS_U32 u32FltId, MS_U32 u32PID); 1078*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_SetBuffer(MS_U32 u32Eng, MS_PHYADDR u32Start0, MS_PHYADDR u32Start1, MS_U32 u32Size0, MS_U32 u32Size1); 1079*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_Start(MS_U32 u32Eng, MS_BOOL bPvrAll, MS_BOOL bStart); 1080*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_Pause(MS_U32 u32Eng, MS_BOOL bPause); 1081*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_GetWriteAddr(MS_U32 u32Eng, MS_PHY *pu32WriteAddr); 1082*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_Notify(MS_U32 u32Eng, TSP_Event eEvents, P_TSP_Callback pfCallback); 1083*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_SetPacketMode(MS_U32 u32Eng, MS_BOOL bSet); 1084*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_TimeStampSetRecordStamp(MS_U32 u32Eng, MS_U32 u32Stamp); 1085*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_TimeStampGetRecordStamp(MS_U32 u32Eng, MS_U32* u32Stamp); 1086*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_FltEnable(MS_U32 u32Eng, MS_U32 u32FltId, MS_BOOL bEnable); 1087*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_FltGetPID(MS_U32 u32Eng, MS_U32 u32FltId, MS_U32* u32PID); 1088*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_SetCaMode(MS_U32 u32EngId, MS_U16 u16CaMode, MS_BOOL bSpsEnable); 1089*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PVR_Eng_MOBF_Enable(MS_U32 u32Eng, MS_BOOL bEnable, MS_U32 u32Key); 1090*53ee8cc1Swenshuai.xi 1091*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetFileInTimeStamp(MS_U32* u32TSLen); 1092*53ee8cc1Swenshuai.xi 1093*53ee8cc1Swenshuai.xi //TSP_Result MDrv_TSP_File_SetPacketMode(TSP_PktMode PKT_Mode); 1094*53ee8cc1Swenshuai.xi 1095*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_DBG_GetDBGStatus(MS_U32 u32Sel, MS_U32* u32Status); 1096*53ee8cc1Swenshuai.xi 1097*53ee8cc1Swenshuai.xi // TSP Info DDIs 1098*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetCaps(TSP_Caps eCap, MS_U32 *pu32CapInfo); 1099*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetStatus(TSP_HW_Status *HW_Status, TSP_SW_Status *SW_Status); 1100*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetLibVer(const MSIF_Version **ppVersion); 1101*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetDbgLevel(TSP_DbgLevel DbgLevel); 1102*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetFWVER(MS_U32 *u32FWVer); 1103*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_CmdQFifo_Status(MS_U8 *pu8FifoLevel); 1104*53ee8cc1Swenshuai.xi 1105*53ee8cc1Swenshuai.xi 1106*53ee8cc1Swenshuai.xi 1107*53ee8cc1Swenshuai.xi // ----- Shold be OBSOLETED when U03 return ---- 1108*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_DropEnable(MS_BOOL bSet); 1109*53ee8cc1Swenshuai.xi //------------------------------------------- 1110*53ee8cc1Swenshuai.xi 1111*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_RemoveDupAVPkt(MS_BOOL bEnable); 1112*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_TEI_RemoveErrorPkt(TSP_DRV_TEI_RmPktType eDrvPktType, MS_BOOL bEnable); 1113*53ee8cc1Swenshuai.xi 1114*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_ChangeSource(MS_U32 u32FltId, TSP_FltType eTSPFltTypeSrc); 1115*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_LiveSrcSwitch(TSP_FltType TgtFlow); 1116*53ee8cc1Swenshuai.xi 1117*53ee8cc1Swenshuai.xi // ------ Common API for TSP mode setting ------ 1118*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_CMD_Run(MS_U32 u32Cmd, MS_U32 u32Config0, MS_U32 u32Config1, void *pData); 1119*53ee8cc1Swenshuai.xi #define DRV_DMX_CMD_STC_ADJUST_UNIT 0x00000020UL //[u32Config]: data 1120*53ee8cc1Swenshuai.xi 1121*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_DSCMB_Functionality(TSP_DSCMB_FuncCMD eCmd, MS_U32 u32Config0, MS_U32 u32Config1 ,void *pData); 1122*53ee8cc1Swenshuai.xi 1123*53ee8cc1Swenshuai.xi 1124*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1125*53ee8cc1Swenshuai.xi // OBSOLETED 1126*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1127*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_SetOwner(MS_U32 u32EngId, MS_U32 u32FltIdStart, MS_U32 u32FltIdEnd, MS_BOOL bOwner) __attribute__ ((deprecated)); // Set/Get the ranges of filters used, which is for AEON/MHEG5 share TSP filters resource. 1128*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_FLT_ChkOwner(MS_U32 u32EngId, MS_U32 u32PidFltId) __attribute__ ((deprecated)); 1129*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetHK(MS_BOOL bIsHK) __attribute__ ((deprecated)) __attribute__ ((deprecated)); 1130*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_IsAccess(MS_U32 u32Try) __attribute__ ((deprecated)); 1131*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_UnlockAccess(void) __attribute__ ((deprecated)); 1132*53ee8cc1Swenshuai.xi 1133*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_TTX_SecFlt_GetWriteAddr(MS_U32 u32EngId, MS_U32 u32SecFltId, MS_PHYADDR *pu32WriteAddr) __attribute__ ((deprecated)); // special case for TTX 1134*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetDbgPortInfo(MS_U32 u32DbgSel,MS_U32* u32DbgInfo) __attribute__ ((deprecated)); 1135*53ee8cc1Swenshuai.xi 1136*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_BurstLen(MS_U32 u32Len) __attribute__ ((deprecated)); 1137*53ee8cc1Swenshuai.xi 1138*53ee8cc1Swenshuai.xi #ifdef STC64_SUPPORT 1139*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_STC64_Mode_Enable(MS_BOOL bEnable); 1140*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetSTC64(MS_U32 u32EngId, MS_U32 u32STC_32, MS_U32 u32STC); 1141*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_GetSTC64(MS_U32 u32EngId, MS_U32 *pu32STC_32, MS_U32 *pu32STC); 1142*53ee8cc1Swenshuai.xi #endif 1143*53ee8cc1Swenshuai.xi 1144*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_STC_UpdateCtrl(MS_U8 u8Eng, MS_U8 u8Mode); 1145*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_SetSTCOffset(MS_U32 u32EngId, MS_U32 u32Offset, MS_BOOL bAdd); 1146*53ee8cc1Swenshuai.xi 1147*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_STC_Alloc(MS_U32 *pu32EngId); 1148*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_STC_Free(MS_U32 u32EngId); 1149*53ee8cc1Swenshuai.xi 1150*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_STCClk_Adjust(MS_U32 u32EngId, MS_BOOL bUpClk, MS_U32 u32Percentage); 1151*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_PcrId_To_StcId(MS_U32 u32PcrFltId,MS_U32 *pu32EngId); 1152*53ee8cc1Swenshuai.xi 1153*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Path_Alloc(DRV_TSP_PATH_TYPE eResType, MS_U32 *pu32PathId); 1154*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Path_Free(DRV_TSP_PATH_TYPE eResType, TSP_TSIF ePath); 1155*53ee8cc1Swenshuai.xi 1156*53ee8cc1Swenshuai.xi #ifdef SECURE_PVR_ENABLE 1157*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Ree_TeeCmdSystem_Init(void); 1158*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Ree_TeeCmdSystem_Exit(void); 1159*53ee8cc1Swenshuai.xi TSP_Result MDrv_TSP_Ree_SendTeeCmd(TSP_REE_TO_TEE_CMD_TYPE cmd_type, void* param, size_t datasize); 1160*53ee8cc1Swenshuai.xi #endif //SECURE_PVR_ENABLE 1161*53ee8cc1Swenshuai.xi 1162*53ee8cc1Swenshuai.xi #ifdef __cplusplus 1163*53ee8cc1Swenshuai.xi } // closing brace for extern "C" 1164*53ee8cc1Swenshuai.xi #endif 1165*53ee8cc1Swenshuai.xi 1166*53ee8cc1Swenshuai.xi 1167*53ee8cc1Swenshuai.xi #endif // __DRV_TSP2_H__ 1168*53ee8cc1Swenshuai.xi 1169