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77 //<MStar Software>
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93 ///////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvTSO.c
98 /// @brief TS I/O Driver Interface
99 /// @author MStar Semiconductor,Inc.
100 /// @attention
101 /// All TSO DDI are not allowed to use in any interrupt context other than TSO ISR and Callback
102 ///////////////////////////////////////////////////////////////////////////////////////////////////
103
104 //-------------------------------------------------------------------------------------------------
105 // Include Files
106 //-------------------------------------------------------------------------------------------------
107
108 // Common Definition
109 #include "MsCommon.h"
110 #include "MsVersion.h"
111 #include "drvMMIO.h"
112
113 // Internal Definition
114 #include "asmCPU.h"
115 #include "regTSO.h"
116 #include "halTSO.h"
117 #include "drvTSO.h"
118
119 #include "ULog.h"
120
121 #ifdef MSOS_TYPE_LINUX
122 #include <sys/ioctl.h>
123 #include <unistd.h>
124 #include <fcntl.h> // O_RDWR
125 #endif
126
127 #ifdef MSOS_TYPE_LINUX_KERNEL
128 #include <linux/string.h>
129 #endif
130
131 //-------------------------------------------------------------------------------------------------
132 // Driver Compiler Options
133 //-------------------------------------------------------------------------------------------------
134
135
136 //-------------------------------------------------------------------------------------------------
137 // Local Defines
138 //-------------------------------------------------------------------------------------------------
139 #define TSO_MUTEX_WAIT_TIME 0xFFFFFFFFUL
140
141 #define TSO_DBGERR(x) {if(_tsodbglevel >= E_DRVTSO_DBG_ERR) x; }
142 #define TSO_DBGINFO(x) {if(_tsodbglevel >= E_DRVTSO_DBG_INFO) x; }
143
144 #define TSO_ASSERT(_bool) if(!(_bool)) \
145 { \
146 if(_tsodbglevel >= E_DRVTSO_DBG_INFO) \
147 { ULOGD("TSO", "ASSERT ERR\n"); } \
148 return DRVTSO_FAIL; \
149 }
150
151 #define _TSO_ENTRY() if (!MsOS_ObtainMutex(_ptso_res->_s32TSOMutexId, TSO_MUTEX_WAIT_TIME)) \
152 { \
153 return DRVTSO_FAIL; \
154 }
155
156 #define _TSO_RETURN(_ret) do{ \
157 MsOS_ReleaseMutex(_ptso_res->_s32TSOMutexId); \
158 return _ret; \
159 }while(0);
160
161 //-------------------------------------------------------------------------------------------------
162 // Local Structures
163 //-------------------------------------------------------------------------------------------------
164
165 typedef struct _TSO_RESOURCE_PRIVATE
166 {
167 MS_S32 _s32TSOMutexId;
168
169 DrvTSO_FltState _FltState[TSO_ENGINE_NUM][TSO_PIDFLT_NUM];
170 MS_U32 _u32FltChSrc[TSO_ENGINE_NUM][TSO_PIDFLT_NUM];
171 MS_U16 _u16FltPid[TSO_ENGINE_NUM][TSO_PIDFLT_NUM];
172
173 DrvTSO_FltState _RepFltState[TSO_ENGINE_NUM][TSO_REP_PIDFLT_NUM];
174 MS_U16 _u16RepFltOrgPid[TSO_ENGINE_NUM][TSO_REP_PIDFLT_NUM];
175 MS_U16 _u16RepFltNewPid[TSO_ENGINE_NUM][TSO_REP_PIDFLT_NUM];
176 MS_U16 _u16RepFltChSrc[TSO_ENGINE_NUM][TSO_REP_PIDFLT_NUM];
177
178 MS_BOOL _bSWInit;
179 }TSO_RESOURCE_PRIVATE;
180
181 //-------------------------------------------------------------------------------------------------
182 // Global Variables
183 //-------------------------------------------------------------------------------------------------
184 #ifndef TSO_UTOPIA_20
185 static TSO_RESOURCE_PRIVATE _tso_res = {
186 ._s32TSOMutexId = -1,
187 ._bSWInit = FALSE,
188 };
189
190 static TSO_RESOURCE_PRIVATE* _ptso_res = &_tso_res;
191 #else
192 static TSO_RESOURCE_PRIVATE* _ptso_res = NULL;
193 #endif
194
195 //-------------------------------------------------------------------------------------------------
196 // Local Variables
197 //-------------------------------------------------------------------------------------------------
198 static DrvTSO_DbgLevel _tsodbglevel = E_DRVTSO_DBG_Release;
199 static MS_BOOL _bBankInit = FALSE;
200
201 //-------------------------------------------------------------------------------------------------
202 // Local Functions
203 //-------------------------------------------------------------------------------------------------
_TSO_InitResource(TSO_RESOURCE_PRIVATE * presource)204 static MS_BOOL _TSO_InitResource(TSO_RESOURCE_PRIVATE* presource)
205 {
206 if(presource == NULL)
207 {
208 return FALSE;
209 }
210
211 presource->_s32TSOMutexId = -1;
212 presource->_bSWInit = FALSE;
213
214 return TRUE;
215 }
216
_TSO_TSIF2ChID(DrvTSO_If eIf)217 static MS_U8 _TSO_TSIF2ChID(DrvTSO_If eIf)
218 {
219 switch(eIf)
220 {
221 case E_DRVTSO_IF_LIVE0:
222 return HAL_TSO_TSIF_LIVE1;
223 case E_DRVTSO_IF_LIVE1:
224 return HAL_TSO_TSIF_LIVE2;
225 case E_DRVTSO_IF_LIVE2:
226 return HAL_TSO_TSIF_LIVE3;
227 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
228 case E_DRVTSO_IF_LIVE3:
229 return HAL_TSO_TSIF_LIVE4;
230 case E_DRVTSO_IF_LIVE4:
231 return HAL_TSO_TSIF_LIVE5;
232 case E_DRVTSO_IF_LIVE5:
233 return HAL_TSO_TSIF_LIVE6;
234 #endif
235 case E_DRVTSO_IF_FILE0:
236 return HAL_TSO_TSIF_FILE1;
237 case E_DRVTSO_IF_FILE1:
238 return HAL_TSO_TSIF_FILE2;
239 #ifdef TSO_PVR_SUPPORT
240 case E_DRVTSO_IF_MMT0:
241 return HAL_TSO_TSIF_LIVE_MMT;
242 #endif
243 default:
244 return 0xFF;
245 }
246 }
247
248 //-------------------------------------------------------------------------------------------------
249 // Function and Variable
250 //-------------------------------------------------------------------------------------------------
251 //-------------------------------------------------------------------------------------------------
252 /// Initialize lib resource API
253 /// @param pResMemAddr \b IN: Pointer to store resource memory address
254 /// @return MMFI_Result
255 /// @note
256 //-------------------------------------------------------------------------------------------------
MDrv_TSO_InitLibResource(void * pResMemAddr)257 TSO_Result MDrv_TSO_InitLibResource(void* pResMemAddr)
258 {
259 MS_VIRT virtBank;
260 MS_PHY u32BankSize;
261
262 if(pResMemAddr == 0)
263 return DRVTSO_FAIL;
264
265 _ptso_res = (TSO_RESOURCE_PRIVATE*)pResMemAddr;
266
267 if(_ptso_res->_bSWInit != TRUE)
268 {
269 if(_TSO_InitResource(_ptso_res) == FALSE)
270 return DRVTSO_FAIL;
271 }
272
273 // For multi-process use case. (different process should set the value of bank again)
274 if(_bBankInit == FALSE)
275 {
276 if (FALSE == MDrv_MMIO_GetBASE(&virtBank, &u32BankSize, MS_MODULE_TSO))
277 {
278 TSO_DBGERR(ULOGE("TSO", "MDrv_TSO_GetBASE failed\n"));
279 return DRVTSO_FAIL;
280 }
281 TSO_DBGINFO((ULOGD("TSO", "TSO Base Bank 0x%08x\n", (unsigned int)virtBank)));
282 HAL_TSO_SetBank(virtBank);
283 _bBankInit = TRUE;
284 }
285
286 return DRVTSO_OK;
287 }
288
289 //-------------------------------------------------------------------------------------------------
290 /// Initialize TSO driver
291 /// @return TSO_Result
292 /// @note
293 /// It should be called before calling any other TSO DDI functions.
294 /// Driver task is in @ref E_TASK_PRI_SYS level.
295 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Init(void)296 TSO_Result MDrv_TSO_Init(void)
297 {
298 MS_VIRT virtBank;
299 MS_PHY u32BankSize;
300 MS_U16 u16ii;
301 MS_U8 u8jj;
302
303 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
304
305 if (FALSE == MDrv_MMIO_GetBASE(&virtBank, &u32BankSize, MS_MODULE_TSO))
306 {
307 TSO_DBGERR(ULOGE("TSO", "MDrv_TSO_GetBASE failed\n"));
308 return DRVTSO_FAIL;
309 }
310 TSO_DBGINFO((ULOGD("TSO", "TSO Base Bank 0x%08x\n", (unsigned int)virtBank)));
311 HAL_TSO_SetBank(virtBank);
312
313 _ptso_res->_s32TSOMutexId = MsOS_CreateMutex(E_MSOS_FIFO, "Mutex TSO", MSOS_PROCESS_SHARED);
314 if(_ptso_res->_s32TSOMutexId == -1)
315 {
316 TSO_DBGERR(ULOGE("TSO", "MsOS_CreateMutex failed\n"));
317 return DRVTSO_FAIL;
318 }
319
320 _TSO_ENTRY();
321
322 HAL_TSO_PowerCtrl(TRUE);
323
324 HAL_TSO_Init();
325
326 for(u8jj = 0; u8jj < (MS_U8)TSO_ENGINE_NUM; u8jj++)
327 {
328 HAL_TSO_Reset_All(u8jj);
329 HAL_TSO_Set_SVQRX_PktMode(u8jj, TSO_SVQ_RX_CFG_MODE_CIPL);
330 HAL_TSO_Set_SVQRX_ArbitorMode(u8jj, TSO_SVQ_RX_CFG_ARBMODE_RUNROBIN, NULL);
331
332 for(u16ii = 0; u16ii < (MS_U16)TSO_PIDFLT_NUM; u16ii++)
333 {
334 HAL_TSO_Flt_SetInputSrc(u8jj, u16ii, 0);
335 HAL_TSO_Flt_SetPid(u8jj, u16ii, TSO_PID_NULL);
336 _ptso_res->_FltState[u8jj][u16ii] = E_DRVTSO_FLT_STATE_FREE;
337 _ptso_res->_u32FltChSrc[u8jj][u16ii] = 0;
338 _ptso_res->_u16FltPid[u8jj][u16ii] = TSO_PID_NULL;
339 }
340
341 for(u16ii = 0; u16ii < (MS_U16)TSO_REP_PIDFLT_NUM; u16ii++)
342 {
343 _ptso_res->_RepFltState[u8jj][u16ii] = E_DRVTSO_FLT_STATE_FREE;
344 _ptso_res->_u16RepFltOrgPid[u8jj][u16ii] = TSO_PID_NULL;
345 _ptso_res->_u16RepFltNewPid[u8jj][u16ii] = TSO_PID_NULL;
346 _ptso_res->_u16RepFltChSrc[u8jj][u16ii] = 0;
347 }
348
349 for(u16ii = 0; u16ii < (MS_U16)TSO_FILE_IF_NUM; u16ii++)
350 {
351 HAL_TSO_Filein_Rate(u8jj, (MS_U8)u16ii, 0x0A);
352 }
353 }
354
355 _ptso_res->_bSWInit = TRUE;
356
357 _TSO_RETURN(DRVTSO_OK);
358
359 }
360
361 //-------------------------------------------------------------------------------------------------
362 /// Close TSO driver
363 /// @return TSO_Result
364 /// @note
365 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Exit(void)366 TSO_Result MDrv_TSO_Exit(void)
367 {
368 MS_U8 u8ii, u8jj;
369 MS_U8 u8TsIf[TSO_TSIF_NUM] = {HAL_TSO_TSIF_LIVE1, HAL_TSO_TSIF_LIVE2, HAL_TSO_TSIF_LIVE3};
370 MS_BOOL bFlag = FALSE;
371 MS_U16 u16Data = 0;
372
373 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
374
375 _TSO_ENTRY();
376
377 for(u8jj = 0; u8jj < TSO_ENGINE_NUM; u8jj++)
378 {
379 HAL_TSO_Cfg1_Enable(u8jj, (TSO_CFG1_TSO_OUT_EN|TSO_CFG1_TSO_TSIF1_EN|TSO_CFG1_TSO_TSIF5_EN|TSO_CFG1_TSO_TSIF6_EN), FALSE);
380
381 for(u8ii = 0; u8ii < TSO_TSIF_NUM; u8ii++)
382 {
383 HAL_TSO_Set_InClk(u8jj, u8TsIf[u8ii], 0, FALSE, FALSE);
384 }
385 HAL_TSO_OutClk(u8jj, &u16Data, &bFlag, &bFlag, TRUE);
386 }
387
388 MsOS_ReleaseMutex(_ptso_res->_s32TSOMutexId);
389 MsOS_DeleteMutex(_ptso_res->_s32TSOMutexId);
390
391 _ptso_res->_s32TSOMutexId = -1;
392 _ptso_res->_bSWInit = FALSE;
393
394 HAL_TSO_PowerCtrl(FALSE);
395
396 return DRVTSO_OK;
397 }
398
399 //-------------------------------------------------------------------------------------------------
400 /// Get TSO HW interrupt status
401 /// @param u8Eng \b IN: TSO engine ID
402 /// @param pu16status \b OUT: pointer of storing HW interrupt status value
403 /// @return TSO_Result
404 /// @note
405 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Get_HWIntStatus(MS_U8 u8Eng,MS_U16 * pu16status)406 TSO_Result MDrv_TSO_Get_HWIntStatus(MS_U8 u8Eng, MS_U16* pu16status)
407 {
408 *pu16status = HAL_TSO_HWInt_Status(u8Eng);
409 return DRVTSO_OK;
410 }
411
412 //-------------------------------------------------------------------------------------------------
413 /// Set debug level of TSO
414 /// @param DbgLevel \b IN: Debug Level Value
415 //-------------------------------------------------------------------------------------------------
MDrv_TSO_SetDbgLevel(DrvTSO_DbgLevel DbgLevel)416 TSO_Result MDrv_TSO_SetDbgLevel(DrvTSO_DbgLevel DbgLevel)
417 {
418 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
419
420 _tsodbglevel = DbgLevel;
421 return DRVTSO_OK;
422 }
423
424 //-------------------------------------------------------------------------------------------------
425 /// Set TSO operation mode
426 /// @param u8Eng \b IN: TSO engine ID
427 /// @param TSOCtrlMode \b IN: Ctrol mode
428 /// @param bClkInv \b IN: TSO_IN_Clk Invert
429 /// @param bParallel \b IN: TSO_IN_Interface paralleled
430 /// @return TSO_Result
431 //-------------------------------------------------------------------------------------------------
MDrv_TSO_SetOperateMode(MS_U8 u8Eng,DrvTSO_CtrlMode TSOCtrlMode,MS_BOOL bBypassAll,MS_BOOL bEnable)432 TSO_Result MDrv_TSO_SetOperateMode(MS_U8 u8Eng, DrvTSO_CtrlMode TSOCtrlMode, MS_BOOL bBypassAll, MS_BOOL bEnable)
433 {
434 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
435 TSO_ASSERT((u8Eng < TSO_ENGINE_NUM));
436 _TSO_ENTRY();
437
438 MS_U8 u8TsIf = HAL_TSO_TSIF_LIVE1;
439 MS_U16 u16ValidCount = 0xBB;
440 MS_U16 u16InValidCount = 0x0;
441
442 switch(TSOCtrlMode)
443 {
444 case E_DRVTSO_CTRL_MODE_TS0:
445 u8TsIf = HAL_TSO_TSIF_LIVE1;
446 HAL_TSO_PktChkSize_Set(u8Eng, HAL_TSO_TSIF_LIVE1, 0xBB);
447 break;
448 case E_DRVTSO_CTRL_MODE_TS1:
449 u8TsIf = HAL_TSO_TSIF_LIVE2;
450 HAL_TSO_PktChkSize_Set(u8Eng, HAL_TSO_TSIF_LIVE2, 0xBB);
451 HAL_TSO_Filein_Enable(u8Eng, 0, FALSE);
452 break;
453 case E_DRVTSO_CTRL_MODE_TS2:
454 u8TsIf = HAL_TSO_TSIF_LIVE3;
455 HAL_TSO_PktChkSize_Set(u8Eng, HAL_TSO_TSIF_LIVE3, 0xBB);
456 HAL_TSO_Filein_Enable(u8Eng, 1, FALSE);
457 break;
458 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
459 case E_DRVTSO_CTRL_MODE_TS3:
460 u8TsIf = HAL_TSO_TSIF_LIVE4;
461 HAL_TSO_PktChkSize_Set(u8Eng, HAL_TSO_TSIF_LIVE4, 0xBB);
462 break;
463 #endif
464 case E_DRVTSO_CTRL_MODE_MEM:
465 u8TsIf = HAL_TSO_TSIF_FILE1;
466 HAL_TSO_Filein_PktChkSize_Set(u8Eng, 0, 0xBB);
467 HAL_TSO_Filein_Enable(u8Eng, 0, TRUE);
468 break;
469
470 case E_DRVTSO_CTRL_MODE_MEM1:
471 u8TsIf = HAL_TSO_TSIF_FILE2;
472 HAL_TSO_Filein_PktChkSize_Set(u8Eng, 1, 0xBB);
473 HAL_TSO_Filein_Enable(u8Eng, 1, TRUE);
474 break;
475
476 #ifdef TSO_PVR_SUPPORT
477 case E_DRVTSO_CTRL_MODE_MMT:
478 u8TsIf = HAL_TSO_TSIF_LIVE_MMT;
479 HAL_TSO_PVR_Src(HAL_TSO_PVR_MMT);
480 break;
481 #endif
482
483 default:
484 ULOGE("TSO", "Not supported TSOCtrlMode = %d! \n", TSOCtrlMode);
485 _TSO_RETURN(DRVTSO_INVALID_PARAM);
486 }
487
488 if(TSOCtrlMode != E_DRVTSO_CTRL_MODE_MMT)
489 {
490 HAL_TSO_RW_ValidBlock_Count(0, TRUE, &u16ValidCount);
491 HAL_TSO_RW_InvalidBlock_Count(0, TRUE, &u16InValidCount);
492 HAL_TSO_Cfg4_Enable(u8Eng, TSO_CFG4_ENABLE_SYS_TIMESTAMP, bEnable);
493
494 HAL_TSO_ChIf_Cfg(u8Eng, u8TsIf, TSO_CHCFG_PIDFLT_REC_ALL|TSO_CHCFG_PIDFLT_REC_NULL, bBypassAll); //PID bypass mode
495
496 HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_TSO_OUT_EN, bEnable);
497 }
498
499 HAL_TSO_ChIf_Enable(u8Eng, u8TsIf, bEnable);
500
501 _TSO_RETURN(DRVTSO_OK);
502 }
503
504 //-------------------------------------------------------------------------------------------------
505 /// Set TSIF Input enable
506 /// @param u8Eng \b IN: TSO engine ID
507 /// @param eIf \b IN: TSO TS interface
508 /// @param bEnable \b IN: TRUE is enabled; FALSE is disabled
509 /// @return TSO_Result
510 /// @note
511 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Ch_InputEnable(MS_U8 u8Eng,DrvTSO_If eIf,MS_BOOL bEnable)512 TSO_Result MDrv_TSO_Ch_InputEnable(MS_U8 u8Eng, DrvTSO_If eIf, MS_BOOL bEnable)
513 {
514 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
515
516 MS_U8 u8ChId = 0;
517
518 if((u8ChId = _TSO_TSIF2ChID(eIf)) == 0xFF)
519 {
520 return DRVTSO_INVALID_PARAM;
521 }
522
523 _TSO_ENTRY();
524 HAL_TSO_ChIf_Enable(u8Eng, u8ChId, bEnable);
525 _TSO_RETURN(DRVTSO_OK);
526 }
527
528 //-------------------------------------------------------------------------------------------------
529 /// Set TSO Output enable
530 /// @param u8Eng \b IN: TSO engine ID
531 /// @param bEnable \b IN: TRUE is enabled; FALSE is disabled
532 /// @return TSO_Result
533 /// @note
534 //-------------------------------------------------------------------------------------------------
MDrv_TSO_OutputEnable(MS_U8 u8Eng,MS_BOOL bEnable)535 TSO_Result MDrv_TSO_OutputEnable(MS_U8 u8Eng, MS_BOOL bEnable)
536 {
537 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
538
539 _TSO_ENTRY();
540 HAL_TSO_Cfg4_Enable(u8Eng, TSO_CFG4_ENABLE_SYS_TIMESTAMP, bEnable);
541 HAL_TSO_Cfg1_Enable(u8Eng, TSO_CFG1_TSO_OUT_EN, bEnable);
542 _TSO_RETURN(DRVTSO_OK);
543 }
544
545 //-------------------------------------------------------------------------------------------------
546 /// Set TSO File-in Byte Timer
547 /// @param u8Eng \b IN: TSO engine ID
548 /// @param u8FileEng \b IN: Filein Engine
549 /// @param u16timer \b IN: Timer value
550 /// @return TSO_Result
551 /// @note
552 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_Rate(MS_U8 u8FileEng,MS_U16 u16timer)553 TSO_Result MDrv_TSO_Filein_Rate(MS_U8 u8FileEng, MS_U16 u16timer)
554 {
555 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
556
557 _TSO_ENTRY();
558
559 HAL_TSO_Filein_Rate(0, u8FileEng, u16timer);
560 HAL_TSO_FileinTimer_Enable(0, u8FileEng, (u16timer != 0));
561
562 _TSO_RETURN(DRVTSO_OK);
563 }
564
565 //-------------------------------------------------------------------------------------------------
566 /// Set TSO Out Clock
567 /// @param u8Eng \b IN: TSO engine ID
568 /// @param eOutClk \b IN: TSO out clock select
569 /// @param eOutClkSrc \b IN: TSO out clock source select
570 /// @param u16DivNum \b IN: If select DMPLLDIV source, setting Divide number
571 /// @param bClkInv \b IN: If Out Clock invert
572 /// @return TSO_Result
573 /// @note
574 /// Out Clk 5.4M,
575 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
576 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
577 /// u16DivNum = 15
578 /// Out Clk 6.17M,
579 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
580 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
581 /// u16DivNum = 13
582 /// Out Clk 6.64M,
583 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
584 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
585 /// u16DivNum = 12
586 //-------------------------------------------------------------------------------------------------
MDrv_TSO_SetOutClk(MS_U8 u8Eng,DrvTSO_OutClk eOutClk,DrvTSO_OutClkSrc eOutClkSrc,MS_U16 u16DivNum,MS_BOOL bClkInv)587 TSO_Result MDrv_TSO_SetOutClk(MS_U8 u8Eng, DrvTSO_OutClk eOutClk, DrvTSO_OutClkSrc eOutClkSrc, MS_U16 u16DivNum, MS_BOOL bClkInv)
588 {
589 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
590
591 _TSO_ENTRY();
592
593 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
594 if(eOutClk == E_DRVTSO_OUTCLK_DIVN)
595 {
596 TSO_DBGERR(ULOGE("TSO", "[%d]%s TSO not support selected clk. \n", __LINE__, __FUNCTION__));
597 _TSO_RETURN(DRVTSO_NOT_SUPPORT);
598 }
599 #endif
600
601 MS_U16 u16OutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
602 HalTSOOutClk stTsoOutClk = {0xFFFF, 0xFFFF, 0, 0xFFFF, bClkInv, TRUE};
603
604 //ULOGD("TSO", "[%s] eOutClk %x, eOutClkSrc %x, u16DivNum %x\n", __FUNCTION__, eOutClk, eOutClkSrc, u16DivNum);
605
606 switch(eOutClkSrc)
607 {
608 case E_DRVTSO_OUTCLKSRC_172M_2N:
609 u16OutClkSrc = HAL_TSO_OUT_DIV_SEL_172M_2N;
610 break;
611 case E_DRVTSO_OUTCLKSRC_288M_2N:
612 u16OutClkSrc = HAL_TSO_OUT_DIV_SEL_288M_2N;
613 break;
614 case E_DRVTSO_OUTCLKSRC_216M_N:
615 u16OutClkSrc = HAL_TSO_OUT_DIV_SEL_216M_N;
616 break;
617 case E_DRVTSO_OUTCLKSRC_P_TS0IN:
618 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS0IN;
619 break;
620 case E_DRVTSO_OUTCLKSRC_P_TS1IN:
621 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS1IN;
622 break;
623 case E_DRVTSO_OUTCLKSRC_P_TS2IN:
624 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS2IN;
625 break;
626 case E_DRVTSO_OUTCLKSRC_P_TS3IN:
627 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS3IN;
628 break;
629 case E_DRVTSO_OUTCLKSRC_P_TS4IN:
630 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS4IN;
631 break;
632 case E_DRVTSO_OUTCLKSRC_P_TS5IN:
633 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS5IN;
634 break;
635 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
636 case E_DRVTSO_OUTCLKSRC_P_TS6IN:
637 u16OutClkSrc = HAL_PRE_TSO_OUT_SEL_TS6IN;
638 break;
639 #endif
640 default:
641 break;
642 }
643
644 stTsoOutClk.bClkInvert = bClkInv;
645 switch(eOutClk)
646 {
647 case E_DRVTSO_OUTCLK_DIV2N:
648 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_DIV2N;
649 stTsoOutClk.u16OutDivSrc = u16OutClkSrc;
650 stTsoOutClk.u16OutDivNum = u16DivNum;
651 break;
652 case E_DRVTSO_OUTCLK_DIVN:
653 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_DIV;
654 stTsoOutClk.u16OutDivSrc = u16OutClkSrc;
655 stTsoOutClk.u16OutDivNum = u16DivNum;
656 break;
657 case E_DRVTSO_OUTCLK_62M:
658 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_62MHz;
659 break;
660 case E_DRVTSO_OUTCLK_54M:
661 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_54MHz;
662 break;
663 case E_DRVTSO_OUTCLK_PTSOOUT:
664 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT;
665 stTsoOutClk.u16PreTsoOutClk = u16OutClkSrc;
666 break;
667 case E_DRVTSO_OUTCLK_PTSOOUT_DIV8:
668 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT_DIV8;
669 stTsoOutClk.u16PreTsoOutClk = u16OutClkSrc;
670 break;
671 case E_DRVTSO_OUTCLK_Dmd:
672 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_FROM_DEMOD;
673 break;
674 case E_DRVTSO_OUTCLK_27M:
675 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_27MHz;
676 break;
677 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
678 case E_DRVTSO_OUTCLK_86M:
679 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_86MHz;
680 break;
681 case E_DRVTSO_OUTCLK_108M:
682 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_108MHz;
683 break;
684 case E_DRVTSO_OUTCLK_123M:
685 stTsoOutClk.u16OutClk = HAL_TSO_OUT_SEL_TSO_OUT_123MHz;
686 break;
687 #endif
688 default:
689 _TSO_RETURN(DRVTSO_INVALID_PARAM);
690 }
691
692 //ULOGD("TSO", "[%s] u16OutClk %x, u16PreTsoOutClk %x\n", __FUNCTION__, stTsoOutClk.u16OutClk, stTsoOutClk.u16PreTsoOutClk );
693
694 HAL_TSO_OutputClk(u8Eng, &stTsoOutClk, TRUE);
695
696 _TSO_RETURN(DRVTSO_OK);
697 }
698
699 //-------------------------------------------------------------------------------------------------
700 /// Get TSO Out Clock
701 /// @param u8Eng \b IN: TSO engine ID
702 /// @param eOutClk \b IN: TSO out clock select
703 /// @param eOutClkSrc \b IN: TSO out clock source select
704 /// @param u16DivNum \b IN: If select DMPLLDIV source, setting Divide number
705 /// @param bClkInv \b IN: If Out Clock invert
706 /// @return TSO_Result
707 /// @note
708 /// Out Clk 5.4M,
709 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
710 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
711 /// u16DivNum = 15
712 /// Out Clk 6.17M,
713 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
714 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
715 /// u16DivNum = 13
716 /// Out Clk 6.64M,
717 /// eOutClkSrc = E_DRVTSO_OUTCLK_DIV2N
718 /// eOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N
719 /// u16DivNum = 12
720 //-------------------------------------------------------------------------------------------------
MDrv_TSO_GetOutClk(MS_U8 u8Eng,DrvTSO_OutClk * peOutClk,DrvTSO_OutClkSrc * peOutClkSrc,MS_U16 * pu16DivNum,MS_BOOL * pbClkInv)721 TSO_Result MDrv_TSO_GetOutClk(MS_U8 u8Eng, DrvTSO_OutClk* peOutClk, DrvTSO_OutClkSrc* peOutClkSrc, MS_U16* pu16DivNum, MS_BOOL* pbClkInv)
722 {
723 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
724
725 _TSO_ENTRY();
726
727 HalTSOOutClk stTsoOutClk = {0xFFFF, 0xFFFF, 0, 0xFFFF, FALSE, TRUE};
728
729 //ULOGD("TSO", "[%s] eOutClk %x, eOutClkSrc %x, u16DivNum %x\n", __FUNCTION__, eOutClk, eOutClkSrc, u16DivNum);
730
731 HAL_TSO_OutputClk(u8Eng, &stTsoOutClk, FALSE);
732 *pbClkInv = stTsoOutClk.bClkInvert;
733
734 switch(stTsoOutClk.u16OutClk)
735 {
736 case HAL_TSO_OUT_SEL_TSO_OUT_DIV2N:
737 *peOutClk = E_DRVTSO_OUTCLK_DIV2N;
738 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_172M_2N;
739 *pu16DivNum = stTsoOutClk.u16OutDivNum;
740 break;
741 case HAL_TSO_OUT_SEL_TSO_OUT_DIV:
742 *peOutClk = E_DRVTSO_OUTCLK_DIVN;
743 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_216M_N;
744 *pu16DivNum = stTsoOutClk.u16OutDivNum;
745 break;
746 case HAL_TSO_OUT_SEL_TSO_OUT_62MHz:
747 *peOutClk = E_DRVTSO_OUTCLK_62M;
748 break;
749 case HAL_TSO_OUT_SEL_TSO_OUT_54MHz:
750 *peOutClk = E_DRVTSO_OUTCLK_54M;
751 break;
752 case HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT:
753 *peOutClk = E_DRVTSO_OUTCLK_PTSOOUT;
754 break;
755 case HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT_DIV8:
756 *peOutClk = E_DRVTSO_OUTCLK_PTSOOUT_DIV8;
757 break;
758 case HAL_TSO_OUT_SEL_TSO_OUT_FROM_DEMOD:
759 *peOutClk = E_DRVTSO_OUTCLK_Dmd;
760 break;
761 case HAL_TSO_OUT_SEL_TSO_OUT_27MHz:
762 *peOutClk = E_DRVTSO_OUTCLK_27M;
763 break;
764 default:
765 *peOutClk = 0xFF;
766 break;
767 }
768
769 *peOutClkSrc = 0xFF;
770 if((stTsoOutClk.u16OutClk == HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT) || (stTsoOutClk.u16OutClk == HAL_TSO_OUT_SEL_TSO_OUT_PTSOOUT_DIV8))
771 {
772 switch(stTsoOutClk.u16PreTsoOutClk)
773 {
774 case HAL_PRE_TSO_OUT_SEL_TS0IN:
775 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS0IN;
776 break;
777 case HAL_PRE_TSO_OUT_SEL_TS1IN:
778 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS1IN;
779 break;
780 case HAL_PRE_TSO_OUT_SEL_TS2IN:
781 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS2IN;
782 break;
783 case HAL_PRE_TSO_OUT_SEL_TS3IN:
784 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS3IN;
785 break;
786 case HAL_PRE_TSO_OUT_SEL_TS4IN:
787 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS4IN;
788 break;
789 case HAL_PRE_TSO_OUT_SEL_TS5IN:
790 *peOutClkSrc = E_DRVTSO_OUTCLKSRC_P_TS5IN;
791 break;
792 default:
793 break;
794 }
795 }
796
797 _TSO_RETURN(DRVTSO_OK);
798 }
799
800 //-------------------------------------------------------------------------------------------------
801 /// Get TSO Interface status
802 /// @param u8Eng \b IN: TSO engine ID
803 /// @param eIf \b IN: TSO input IF, enum item of DrvTSO_If
804 /// @param pIfSet \b OUT: Pointer to store TSO interface status
805 /// @param pbBypassAll \b OUT: Pointer to store bypass mode status of TSO Channel interface
806 /// @param pbEnable \b OUT: Pointer to store enable status of TSO Channel interface
807 /// @return TSO_Result
808 /// @note
809 //-------------------------------------------------------------------------------------------------
MDrv_TSO_GetTSIFStatus(MS_U8 u8Eng,DrvTSO_If eIf,DrvTSO_If_Set * pIfSet,MS_BOOL * pbBypassAll,MS_BOOL * pbEnable)810 TSO_Result MDrv_TSO_GetTSIFStatus(MS_U8 u8Eng, DrvTSO_If eIf, DrvTSO_If_Set* pIfSet, MS_BOOL* pbBypassAll, MS_BOOL* pbEnable)
811 {
812 MS_U8 u8Id = 0;
813 MS_U16 u16Data = 0;
814
815 TSO_DBGERR(ULOGE("TSO", "[%d][%s]\n", __LINE__, __FUNCTION__));
816
817 if((eIf == E_DRVTSO_IF_FILE0) || (eIf == E_DRVTSO_IF_FILE1))
818 {
819 pIfSet->ePad = E_DRVTSO_MEM;
820 pIfSet->bClkInv = FALSE;
821 pIfSet->bExtSync = FALSE;
822 pIfSet->bParallel = FALSE;
823 return DRVTSO_OK;
824 }
825
826 if((u8Id = _TSO_TSIF2ChID(eIf)) == 0xFF)
827 {
828 return DRVTSO_INVALID_PARAM;
829 }
830
831 _TSO_ENTRY();
832
833 HAL_TSO_GetInputTSIF_Status(u8Eng, u8Id, &u16Data, &(pIfSet->bClkInv), &(pIfSet->bExtSync), &(pIfSet->bParallel));
834
835 switch(u16Data)
836 {
837 case HAL_TSOIN_MUX_TS0:
838 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT0;
839 break;
840 case HAL_TSOIN_MUX_TS1:
841 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT1;
842 break;
843 case HAL_TSOIN_MUX_TS2:
844 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT2;
845 break;
846 case HAL_TSOIN_MUX_TS3:
847 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT3;
848 break;
849 case HAL_TSOIN_MUX_TS4:
850 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT4;
851 break;
852 case HAL_TSOIN_MUX_TS5:
853 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT5;
854 break;
855 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
856 case HAL_TSOIN_MUX_TS6:
857 pIfSet->ePad = E_DRVTSO_PAD_EXT_INPUT6;
858 break;
859 #endif
860 case HAL_TSOIN_MUX_TSDEMOD0:
861 pIfSet->ePad = E_DRVTSO_PAD_DEMOD;
862 break;
863 default:
864 pIfSet->ePad = HAL_TSOIN_MUX_MEM;
865 break;
866 }
867
868 HAL_TSO_Get_ChIf_Cfg(u8Eng, u8Id, &u16Data, pbEnable);
869
870 *pbBypassAll = ((u16Data & TSO_CHCFG_PIDFLT_REC_ALL) == TSO_CHCFG_PIDFLT_REC_ALL);
871
872 _TSO_RETURN(DRVTSO_OK);
873 }
874
875 //-------------------------------------------------------------------------------------------------
876 /// Allocate TSO PID filter
877 /// @param u8Eng \b IN: TSO engine ID
878 /// @param pu16PidFltId \b OUT: pointer of PID filter ID for return
879 /// @return TSO_Result
880 /// @note
881 //-------------------------------------------------------------------------------------------------
MDrv_TSO_PidFlt_Alloc(MS_U8 u8Eng,MS_U16 * pu16PidFltId)882 TSO_Result MDrv_TSO_PidFlt_Alloc(MS_U8 u8Eng, MS_U16 *pu16PidFltId)
883 {
884 MS_U16 u16ii;
885 *pu16PidFltId = 0xFF;
886
887 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
888
889 _TSO_ENTRY();
890 for(u16ii = 0; u16ii < TSO_PIDFLT_NUM; u16ii++)
891 {
892 if(_ptso_res->_FltState[u8Eng][u16ii] == E_DRVTSO_FLT_STATE_FREE)
893 {
894 TSO_DBGERR(ULOGE("TSO", "Allocate PID Filter %d\n", u16ii));
895 _ptso_res->_FltState[u8Eng][u16ii] = E_DRVTSO_FLT_STATE_ALLOC;
896 *pu16PidFltId = u16ii;
897 _TSO_RETURN(DRVTSO_OK);
898 }
899 }
900
901 _TSO_RETURN(DRVTSO_FAIL);
902 }
903
904 //-------------------------------------------------------------------------------------------------
905 /// Free TSO PID filter
906 /// @param u16PidFltId \b IN: PID filter ID
907 /// @return TSO_Result
908 /// @note
909 //-------------------------------------------------------------------------------------------------
MDrv_TSO_PidFlt_Free(MS_U8 u8Eng,MS_U16 u16PidFltId)910 TSO_Result MDrv_TSO_PidFlt_Free(MS_U8 u8Eng, MS_U16 u16PidFltId)
911 {
912 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
913
914 _TSO_ENTRY();
915
916 if(_ptso_res->_FltState[u8Eng][u16PidFltId] == E_DRVTSO_FLT_STATE_FREE)
917 {
918 _TSO_RETURN(DRVTSO_OK);
919 }
920
921 HAL_TSO_Flt_SetPid(u8Eng, u16PidFltId, TSO_PID_NULL);
922 HAL_TSO_Flt_SetInputSrc(u8Eng, u16PidFltId, 0);
923
924 //reset resource parameters
925 _ptso_res->_u16FltPid[u8Eng][u16PidFltId] = TSO_PID_NULL;
926 _ptso_res->_u32FltChSrc[u8Eng][u16PidFltId] = 0;
927 _ptso_res->_FltState[u8Eng][u16PidFltId] = E_DRVTSO_FLT_STATE_FREE;
928
929 _TSO_RETURN(DRVTSO_OK);
930 }
931
932 //-------------------------------------------------------------------------------------------------
933 /// Set PID to PID filter
934 /// @param u8Eng \b IN: TSO engine ID
935 /// @param u16PidFltId \b IN: PID filter ID
936 /// @param u16Pid \b IN: Enable Flag
937 /// @return TSO_Result
938 /// @note
939 //-------------------------------------------------------------------------------------------------
MDrv_TSO_PidFlt_SetPid(MS_U8 u8Eng,MS_U16 u16PidFltId,MS_U16 u16Pid)940 TSO_Result MDrv_TSO_PidFlt_SetPid(MS_U8 u8Eng, MS_U16 u16PidFltId, MS_U16 u16Pid)
941 {
942 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
943
944 _TSO_ENTRY();
945
946 if(_ptso_res->_FltState[u8Eng][u16PidFltId] != E_DRVTSO_FLT_STATE_ALLOC)
947 {
948 _TSO_RETURN(DRVTSO_FAIL);
949 }
950
951 HAL_TSO_Flt_SetPid(u8Eng, u16PidFltId, u16Pid);
952 _ptso_res->_u16FltPid[u8Eng][u16PidFltId] = u16Pid;
953 _TSO_RETURN(DRVTSO_OK);
954 }
955
956 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
957 //-------------------------------------------------------------------------------------------------
958 /// Set Channel source to PID filter
959 /// @param u8Eng \b IN: TSO engine ID
960 /// @param u16PidFltId \b IN: PID filter ID
961 /// @param u8Sid \b IN: Service ID
962 /// @return TSO_Result
963 /// @note
964 //-------------------------------------------------------------------------------------------------
MDrv_TSO_PidFlt_SetSid(MS_U8 u8Eng,MS_U16 u16PidFltId,MS_U8 u8Sid)965 TSO_Result MDrv_TSO_PidFlt_SetSid(MS_U8 u8Eng, MS_U16 u16PidFltId, MS_U8 u8Sid)
966 {
967 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
968
969 _TSO_ENTRY();
970
971 if(_ptso_res->_FltState[u8Eng][u16PidFltId] != E_DRVTSO_FLT_STATE_ALLOC)
972 {
973 _TSO_RETURN(DRVTSO_FAIL);
974 }
975
976 HAL_TSO_Flt_SetSid(u8Eng, u16PidFltId, u8Sid);
977 _TSO_RETURN(DRVTSO_OK);
978 }
979 #endif
980
981 //-------------------------------------------------------------------------------------------------
982 /// Set Channel source to PID filter
983 /// @param u8Eng \b IN: TSO engine ID
984 /// @param u16PidFltId \b IN: PID filter ID
985 /// @param eIf \b IN: PID filter source from which TSIF
986 /// @return TSO_Result
987 /// @note
988 //-------------------------------------------------------------------------------------------------
MDrv_TSO_PidFlt_SetChSrc(MS_U8 u8Eng,MS_U16 u16PidFltId,DrvTSO_If eIf)989 TSO_Result MDrv_TSO_PidFlt_SetChSrc(MS_U8 u8Eng, MS_U16 u16PidFltId, DrvTSO_If eIf)
990 {
991 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
992
993 MS_U16 u16ChSrc = 0;
994
995 if((u16ChSrc = (MS_U16)_TSO_TSIF2ChID(eIf)) == 0xFF)
996 {
997 return DRVTSO_FAIL;
998 }
999
1000 _TSO_ENTRY();
1001
1002 if(_ptso_res->_FltState[u8Eng][u16PidFltId] != E_DRVTSO_FLT_STATE_ALLOC)
1003 {
1004 _TSO_RETURN(DRVTSO_FAIL);
1005 }
1006
1007 HAL_TSO_Flt_SetInputSrc(u8Eng, u16PidFltId, u16ChSrc);
1008 _ptso_res->_u32FltChSrc[u8Eng][u16PidFltId] = u16ChSrc;
1009 _TSO_RETURN(DRVTSO_OK);
1010 }
1011
1012 //-------------------------------------------------------------------------------------------------
1013 /// Allocate TSO Replace PID filter
1014 /// @param u8Eng \b IN: TSO engine ID
1015 /// @param pu16PidFltId \b OUT: pointer of PID filter ID for return
1016 /// @return TSO_Result
1017 /// @note
1018 //-------------------------------------------------------------------------------------------------
MDrv_TSO_RepPidFlt_Alloc(MS_U8 u8Eng,MS_U16 * pu16PidFltId)1019 TSO_Result MDrv_TSO_RepPidFlt_Alloc(MS_U8 u8Eng, MS_U16 *pu16PidFltId)
1020 {
1021 MS_U16 u16ii;
1022 *pu16PidFltId = 0xFF;
1023
1024 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1025
1026 _TSO_ENTRY();
1027 for(u16ii = 0; u16ii < TSO_REP_PIDFLT_NUM; u16ii++)
1028 {
1029 if(_ptso_res->_RepFltState[u8Eng][u16ii] == E_DRVTSO_FLT_STATE_FREE)
1030 {
1031 TSO_DBGERR(ULOGE("TSO", "Allocate PID Filter %d\n", u16ii));
1032 _ptso_res->_RepFltState[u8Eng][u16ii] = E_DRVTSO_FLT_STATE_ALLOC;
1033 *pu16PidFltId = u16ii;
1034 _TSO_RETURN(DRVTSO_OK);
1035 }
1036 }
1037
1038 _TSO_RETURN(DRVTSO_FAIL);
1039 }
1040
1041 //-------------------------------------------------------------------------------------------------
1042 /// Set Original PID and new PID to replace PID filter
1043 /// @param u8Eng \b IN: TSO engine ID
1044 /// @param u16PidFltId \b IN: PID filter ID
1045 /// @param eIf \b IN: PID filter source from which TSIF
1046 /// @param u16OrgPid \b IN: Original PID
1047 /// @param u16NewPid \b IN: New PID
1048 /// @return TSO_Result
1049 /// @note
1050 //-------------------------------------------------------------------------------------------------
MDrv_TSO_RepPidFlt_Set(MS_U8 u8Eng,MS_U16 u16PidFltId,DrvTSO_If eIf,MS_U16 u16OrgPid,MS_U16 u16NewPid)1051 TSO_Result MDrv_TSO_RepPidFlt_Set(MS_U8 u8Eng, MS_U16 u16PidFltId, DrvTSO_If eIf, MS_U16 u16OrgPid, MS_U16 u16NewPid)
1052 {
1053 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1054
1055 MS_U8 u8ChSrc = 0;
1056 if((u8ChSrc = _TSO_TSIF2ChID(eIf)) == 0xFF)
1057 {
1058 return DRVTSO_INVALID_PARAM;
1059 }
1060
1061 _TSO_ENTRY();
1062
1063 if(_ptso_res->_RepFltState[u8Eng][u16PidFltId] != E_DRVTSO_FLT_STATE_ALLOC)
1064 {
1065 _TSO_RETURN(DRVTSO_FAIL);
1066 }
1067
1068 if(HAL_TSO_ReplaceFlt_SetPktPid(u8Eng, u16PidFltId, u8ChSrc, u16OrgPid, u16NewPid) == FALSE)
1069 {
1070 _TSO_RETURN(DRVTSO_FAIL);
1071 }
1072
1073 _ptso_res->_u16RepFltOrgPid[u8Eng][u16PidFltId] = u16OrgPid;
1074 _ptso_res->_u16RepFltNewPid[u8Eng][u16PidFltId] = u16NewPid;
1075 _ptso_res->_u16RepFltChSrc[u8Eng][u16PidFltId] = (MS_U16)u8ChSrc;
1076
1077 _TSO_RETURN(DRVTSO_OK);
1078 }
1079
1080 //-------------------------------------------------------------------------------------------------
1081 /// Replace PID filter enable
1082 /// @param u8Eng \b IN: TSO engine ID
1083 /// @param u16PidFltId \b IN: PID filter ID
1084 /// @param bEnable \b IN: TRUE is enabled; FALSE is disabled
1085 /// @return TSO_Result
1086 /// @note
1087 //-------------------------------------------------------------------------------------------------
MDrv_TSO_RepPidFlt_Enable(MS_U8 u8Eng,MS_U16 u16PidFltId,MS_BOOL bEnable)1088 TSO_Result MDrv_TSO_RepPidFlt_Enable(MS_U8 u8Eng, MS_U16 u16PidFltId, MS_BOOL bEnable)
1089 {
1090 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1091
1092 _TSO_ENTRY();
1093
1094 if(_ptso_res->_RepFltState[u8Eng][u16PidFltId] != E_DRVTSO_FLT_STATE_ALLOC)
1095 {
1096 _TSO_RETURN(DRVTSO_FAIL);
1097 }
1098
1099 if(HAL_TSO_ReplaceFlt_Enable(u8Eng, u16PidFltId, bEnable) == TRUE)
1100 {
1101 _ptso_res->_RepFltState[u8Eng][u16PidFltId] = E_DRVTSO_FLT_STATE_ENABLE;
1102 _TSO_RETURN(DRVTSO_OK);
1103 }
1104 else
1105 {
1106 _TSO_RETURN(DRVTSO_FAIL);
1107 }
1108 }
1109
1110 //-------------------------------------------------------------------------------------------------
1111 /// Free TSO Replace PID filter
1112 /// @param u16PidFltId \b IN: PID filter ID
1113 /// @return TSO_Result
1114 /// @note
1115 //-------------------------------------------------------------------------------------------------
MDrv_TSO_RepPidFlt_Free(MS_U8 u8Eng,MS_U16 u16PidFltId)1116 TSO_Result MDrv_TSO_RepPidFlt_Free(MS_U8 u8Eng, MS_U16 u16PidFltId)
1117 {
1118 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1119
1120 _TSO_ENTRY();
1121
1122 if(_ptso_res->_RepFltState[u8Eng][u16PidFltId] == E_DRVTSO_FLT_STATE_FREE)
1123 {
1124 _TSO_RETURN(DRVTSO_OK);
1125 }
1126
1127 if(_ptso_res->_RepFltState[u8Eng][u16PidFltId] == E_DRVTSO_FLT_STATE_ENABLE)
1128 {
1129 if(HAL_TSO_ReplaceFlt_Enable(u8Eng, u16PidFltId, FALSE) == FALSE)
1130 {
1131 _TSO_RETURN(DRVTSO_FAIL);
1132 }
1133 _ptso_res->_RepFltState[u8Eng][u16PidFltId] = E_DRVTSO_FLT_STATE_ALLOC;
1134 }
1135 if(HAL_TSO_ReplaceFlt_SetPktPid(u8Eng, u16PidFltId, 0, TSO_PID_NULL, TSO_PID_NULL) == FALSE)
1136 {
1137 _TSO_RETURN(DRVTSO_FAIL);
1138 }
1139
1140 //reset resource parameters
1141 _ptso_res->_u16RepFltOrgPid[u8Eng][u16PidFltId] = TSO_PID_NULL;
1142 _ptso_res->_u16RepFltNewPid[u8Eng][u16PidFltId] = TSO_PID_NULL;
1143 _ptso_res->_u16RepFltChSrc[u8Eng][u16PidFltId] = 0;
1144 _ptso_res->_RepFltState[u8Eng][u16PidFltId] = E_DRVTSO_FLT_STATE_FREE;
1145
1146 _TSO_RETURN(DRVTSO_OK);
1147 }
1148
1149 //-------------------------------------------------------------------------------------------------
1150 /// Command Queue Reset
1151 /// @param u8FileEng \b IN: Finein Engine
1152 /// @return TSO_Result
1153 /// @note
1154 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_CmdQ_Reset(MS_U8 u8FileEng)1155 TSO_Result MDrv_TSO_Filein_CmdQ_Reset(MS_U8 u8FileEng)
1156 {
1157 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1158
1159 _TSO_ENTRY();
1160 HAL_TSO_CmdQ_Reset(0, u8FileEng);
1161 _TSO_RETURN(DRVTSO_OK);
1162 }
1163
1164 //-------------------------------------------------------------------------------------------------
1165 /// Get Command Queue Write Level value
1166 /// @param u8FileEng \b IN: Finein Engine
1167 /// @param pu8FifoLevel \b OUT: pointer of Command Queue Write Level value for return
1168 /// @return TSO_Result
1169 /// @note
1170 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_CmdQFifo_Status(MS_U8 u8FileEng,MS_U8 * pu8FifoLevel)1171 TSO_Result MDrv_TSO_Filein_CmdQFifo_Status(MS_U8 u8FileEng, MS_U8 *pu8FifoLevel)
1172 {
1173 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1174
1175 *pu8FifoLevel = HAL_TSO_CmdQ_FIFO_Get_WRLevel(0, u8FileEng);
1176 return DRVTSO_OK;
1177 }
1178
1179 //-------------------------------------------------------------------------------------------------
1180 /// Get Command Queue Empty Slot value
1181 /// @param u8FileEng \b IN: Finein Engine
1182 /// @param pu32EmptySlot \b OUT: pointer of Command Queue Empty Slot value for return
1183 /// @return TSO_Result
1184 /// @note
1185 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_CmdQ_GetSlot(MS_U8 u8FileEng,MS_U32 * pu32EmptySlot)1186 TSO_Result MDrv_TSO_Filein_CmdQ_GetSlot(MS_U8 u8FileEng, MS_U32 *pu32EmptySlot)
1187 {
1188 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1189
1190 *pu32EmptySlot = 0;
1191 *pu32EmptySlot = (MS_U32)((TSO_CMDQ_SIZE - HAL_TSO_CmdQ_FIFO_Get_WRCnt(0, u8FileEng)) & 0xFFFF);
1192 return DRVTSO_OK;
1193 }
1194
1195 //-------------------------------------------------------------------------------------------------
1196 /// Set playback timestamp
1197 /// @param u8FileEng \b IN: Finein Engine
1198 /// @param u32timestamp \b IN: timestamp value
1199 /// @return TSO_Result
1200 /// @note
1201 //-------------------------------------------------------------------------------------------------
MDrv_TSO_SetPlaybackTimeStamp(MS_U8 u8FileEng,MS_U32 u32timestamp)1202 TSO_Result MDrv_TSO_SetPlaybackTimeStamp(MS_U8 u8FileEng, MS_U32 u32timestamp)
1203 {
1204 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1205
1206 _TSO_ENTRY();
1207 HAL_TSO_LPcr2_Set(0, u8FileEng, u32timestamp);
1208 _TSO_RETURN(DRVTSO_OK);
1209 }
1210
1211 //-------------------------------------------------------------------------------------------------
1212 /// Get playback timestamp
1213 /// @param u8Eng \b IN: TSO engine ID
1214 /// @param u8FileEng \b IN: Finein Engine
1215 /// @param pu32timestamp \b OUT: pointer of timestamp value for return
1216 /// @return MMFI_Result
1217 /// @note
1218 //-------------------------------------------------------------------------------------------------
MDrv_TSO_GetPlaybackTimeStamp(MS_U8 u8FileEng,MS_U32 * pu32timestamp)1219 TSO_Result MDrv_TSO_GetPlaybackTimeStamp(MS_U8 u8FileEng, MS_U32 *pu32timestamp)
1220 {
1221 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1222 TSO_ASSERT((pu32timestamp != 0));
1223
1224 _TSO_ENTRY();
1225 *pu32timestamp = HAL_TSO_LPcr2_Get(0, u8FileEng);
1226 _TSO_RETURN(DRVTSO_OK);
1227 }
1228
1229 //-------------------------------------------------------------------------------------------------
1230 /// Get File-in timestamp value
1231 /// @param u8FileEng \b IN: Finein Engine
1232 /// @param pu32Timestamp \b OUT: pointer of Timestamp value for return
1233 /// @return TSO_Result
1234 /// @note
1235 //-------------------------------------------------------------------------------------------------
MDrv_TSO_GetFileInTimeStamp(MS_U8 u8FileEng,MS_U32 * pu32Timestamp)1236 TSO_Result MDrv_TSO_GetFileInTimeStamp(MS_U8 u8FileEng, MS_U32* pu32Timestamp)
1237 {
1238 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1239 TSO_ASSERT((pu32Timestamp != 0));
1240
1241 _TSO_ENTRY();
1242 *pu32Timestamp = HAL_TSO_TimeStamp_Get(0, u8FileEng);
1243 _TSO_RETURN(DRVTSO_OK);
1244 }
1245
1246 //-------------------------------------------------------------------------------------------------
1247 /// Get TSO File-in read address
1248 /// @param u8FileEng \b IN: Finein Engine
1249 /// @param pphyReadAddr \b OUT: Pointer to store file-in current reand pointer
1250 /// @return TSP_Result
1251 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_GetReadAddr(MS_U8 u8FileEng,MS_PHY * pphyReadAddr)1252 TSO_Result MDrv_TSO_Filein_GetReadAddr(MS_U8 u8FileEng, MS_PHY *pphyReadAddr)
1253 {
1254 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1255 TSO_ASSERT((pphyReadAddr != 0));
1256
1257 _TSO_ENTRY();
1258 *pphyReadAddr = HAL_TSO_Get_Filein_ReadAddr(0, u8FileEng);
1259 _TSO_RETURN(DRVTSO_OK);
1260 }
1261
1262 //-------------------------------------------------------------------------------------------------
1263 /// Set File-in Read Start Address
1264 /// @param u8FileEng \b IN: Finein Engine
1265 /// @param phyStreamAddr \b IN: MIU Physical Address of File-in Read Start Address.
1266 /// @return TSO_Result
1267 /// @note
1268 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_SetAddr(MS_U8 u8FileEng,MS_PHY phyStreamAddr)1269 TSO_Result MDrv_TSO_Filein_SetAddr(MS_U8 u8FileEng, MS_PHY phyStreamAddr)
1270 {
1271 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1272
1273 _TSO_ENTRY();
1274 HAL_TSO_Set_Filein_ReadAddr(0, u8FileEng, phyStreamAddr);
1275 _TSO_RETURN(DRVTSO_OK);
1276 }
1277
1278 //-------------------------------------------------------------------------------------------------
1279 /// Set File-in Packet Mode
1280 /// @param u8FileEng \b IN: Finein Engine
1281 /// @param ePktMode \b IN: Select packet mode
1282 /// @return TSO_Result
1283 /// @note
1284 //-------------------------------------------------------------------------------------------------
MDrv_TSO_SetPacketMode(MS_U8 u8FileEng,DrvTSO_PacketMode ePktMode)1285 TSO_Result MDrv_TSO_SetPacketMode(MS_U8 u8FileEng, DrvTSO_PacketMode ePktMode)
1286 {
1287 //MS_U16 u16OutPktSize = 0xBB;
1288 MS_U16 u16ValidCount = 0xBB;
1289 MS_U16 u16InValidCount = 0x0;
1290 MS_U8 u8Size = 0;
1291
1292 switch (ePktMode)
1293 {
1294 case E_DRVTSO_PKTMODE_188:
1295 u8Size = 0xBB;
1296 break;
1297 case E_DRVTSO_PKTMODE_192:
1298 u8Size = 0xBF;
1299 break;
1300 case E_DRVTSO_PKTMODE_204:
1301 u8Size = 0xCB;
1302 break;
1303 default:
1304 return DRVTSO_INVALID_PARAM;
1305 }
1306
1307 u16ValidCount = (MS_U16)u8Size;
1308
1309 _TSO_ENTRY();
1310
1311 HAL_TSO_Filein_PktChkSize_Set(0, u8FileEng, u8Size);
1312 HAL_TSO_RW_ValidBlock_Count(0, TRUE, &u16ValidCount);
1313 HAL_TSO_RW_InvalidBlock_Count(0, TRUE, &u16InValidCount);
1314 ///HAL_TSO_RW_OutputPktSize(0, TRUE, &u16OutPktSize);
1315
1316 _TSO_RETURN(DRVTSO_OK);
1317
1318 }
1319
1320 //-------------------------------------------------------------------------------------------------
1321 /// Set File-in Read Size
1322 /// @param u8FileEng \b IN: Finein Engine
1323 /// @param u32StreamSize \b IN: File-in Read Size.
1324 /// @return TSO_Result
1325 // @note u32StreamSize must be larger than 16
1326 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_SetSize(MS_U8 u8FileEng,MS_U32 u32StreamSize)1327 TSO_Result MDrv_TSO_Filein_SetSize(MS_U8 u8FileEng, MS_U32 u32StreamSize)
1328 {
1329 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1330
1331 if(u32StreamSize <= 16) //HW limitation
1332 return DRVTSO_FAIL;
1333
1334 _TSO_ENTRY();
1335 HAL_TSO_Set_Filein_ReadLen(0, u8FileEng, u32StreamSize);
1336 _TSO_RETURN(DRVTSO_OK);
1337 }
1338
1339 //-------------------------------------------------------------------------------------------------
1340 /// Set Input packet size
1341 /// @param u8Eng \b IN: TSO engine ID
1342 /// @param eIf \b IN: Enum of Input TSO IF
1343 /// @param u16InPktSize \b IN: Input packet size (192, 204, 188)
1344 /// @return TSO_Result
1345 /// @note
1346 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Set_InputPktSize(MS_U8 u8Eng,DrvTSO_If eIf,MS_U16 u16InPktSize)1347 TSO_Result MDrv_TSO_Set_InputPktSize(MS_U8 u8Eng, DrvTSO_If eIf, MS_U16 u16InPktSize)
1348 {
1349 MS_U8 u8Id = 0;
1350 MS_U16 u16ValidCount = u16InPktSize - 1;
1351 MS_U16 u16InValidCount = 0x0;
1352
1353 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1354
1355 if((u8Id = _TSO_TSIF2ChID(eIf)) == 0xFF)
1356 {
1357 return DRVTSO_INVALID_PARAM;
1358 }
1359
1360 _TSO_ENTRY();
1361
1362 if(eIf >= E_DRVTSO_IF_FILE0)
1363 {
1364 u8Id = (MS_U8)(eIf - E_DRVTSO_IF_FILE0);
1365 HAL_TSO_Filein_PktChkSize_Set(u8Eng, u8Id, u16InPktSize-1);
1366 }
1367 else
1368 {
1369 HAL_TSO_PktChkSize_Set(u8Eng, u8Id, u16InPktSize-1);
1370 }
1371 HAL_TSO_RW_ValidBlock_Count(0, TRUE, &u16ValidCount);
1372 HAL_TSO_RW_InvalidBlock_Count(0, TRUE, &u16InValidCount);
1373
1374 _TSO_RETURN(DRVTSO_OK);
1375 }
1376
1377 //-------------------------------------------------------------------------------------------------
1378 /// Set/Get output packet size
1379 /// @param u8Eng \b IN: TSO engine ID
1380 /// @param u16OutPktSize \b IN: Output packet size (192, 204, 188)
1381 /// @return TSO_Result
1382 /// @note
1383 //-------------------------------------------------------------------------------------------------
MDrv_TSO_OutputPktSize(MS_U8 u8Eng,MS_U16 * pu16OutPktSize,MS_BOOL bSet)1384 TSO_Result MDrv_TSO_OutputPktSize(MS_U8 u8Eng, MS_U16* pu16OutPktSize, MS_BOOL bSet)
1385 {
1386 MS_U16 u16PktMode = HAL_TSO_SVQRX_MODE_CIP;
1387 MS_U16 u16OutSize = *pu16OutPktSize-1;
1388
1389 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1390
1391 if(bSet == TRUE)
1392 {
1393 switch(*pu16OutPktSize)
1394 {
1395 case 188:
1396 u16PktMode = HAL_TSO_SVQRX_MODE_CIP;
1397 break;
1398 case 192:
1399 u16PktMode = HAL_TSO_SVQRX_MODE_192;
1400 break;
1401 case 200:
1402 u16PktMode = HAL_TSO_SVQRX_MODE_OPENCABLE;
1403 break;
1404 default:
1405 return DRVTSO_INVALID_PARAM;
1406 }
1407 _TSO_ENTRY();
1408 HAL_TSO_Set_SVQRX_PktMode(u8Eng, u16PktMode);
1409 HAL_TSO_RW_OutputPktSize(u8Eng, TRUE, &u16OutSize);
1410 _TSO_RETURN(DRVTSO_OK);
1411 }
1412 else
1413 {
1414 HAL_TSO_RW_OutputPktSize(u8Eng, FALSE, &u16OutSize);
1415 *pu16OutPktSize = u16OutSize + 1;
1416 return DRVTSO_OK;
1417 }
1418 }
1419
1420 //-------------------------------------------------------------------------------------------------
1421 /// TSO configuration
1422 /// @param u32TsoEng \b IN: TSO engine ID
1423 /// @param eCfgCmd \b IN: Configure command.
1424 /// @param pu32CmdData0 \b IN/OUT: General data parameter depend on eCfgCmd.
1425 /// @param bSet \b IN: TRUE: (set), FALSE: (get)
1426 /// @return TSO_Result
1427 /// @note
1428 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Configure(DrvTSO_Cfg * pstTsoCfg)1429 TSO_Result MDrv_TSO_Configure(DrvTSO_Cfg* pstTsoCfg)
1430 {
1431 TSO_DBGERR(printf("[%d]%s\n", __LINE__, __FUNCTION__));
1432
1433 TSO_Result eRes = DRVTSO_OK;
1434 MS_U16 u16OpifValue = (MS_U16)pstTsoCfg->u32CmdData0;
1435
1436 _TSO_ENTRY();
1437
1438 switch(pstTsoCfg->eCfgCmd)
1439 {
1440 case E_DRVTSO_CFG_OPIF:
1441 HAL_TSO_RW_OutputPktSize((MS_U8)pstTsoCfg->u32TsoEng, pstTsoCfg->bSet, &u16OpifValue);
1442 break;
1443 default:
1444 printf("Not supported TSO configure Cmd = 0x%x! \n", pstTsoCfg->eCfgCmd);
1445 eRes = DRVTSO_INVALID_PARAM;
1446 break;
1447 }
1448
1449 if(pstTsoCfg->bSet == FALSE)
1450 {
1451 switch(pstTsoCfg->eCfgCmd)
1452 {
1453 case E_DRVTSO_CFG_OPIF:
1454 pstTsoCfg->u32CmdData0 = ((MS_U32)u16OpifValue) & 0xFFFFUL;
1455 break;
1456 default:
1457 eRes = DRVTSO_INVALID_PARAM;
1458 break;
1459 }
1460 }
1461
1462 _TSO_RETURN(eRes);
1463
1464 }
1465
1466 //-------------------------------------------------------------------------------------------------
1467 /// Enable/Disable File-in 192 Mode
1468 /// @param u8FileEng \b IN: Finein Engine
1469 /// @param bEnable \b IN: Enable Flag
1470 /// @return TSO_Result
1471 /// @note
1472 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_192Mode_En(MS_U8 u8FileEng,MS_BOOL bEnable)1473 TSO_Result MDrv_TSO_Filein_192Mode_En(MS_U8 u8FileEng, MS_BOOL bEnable)
1474 {
1475 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1476
1477 _TSO_ENTRY();
1478 HAL_TSO_Filein_192Mode_Enable(0, u8FileEng, bEnable);
1479 _TSO_RETURN(DRVTSO_OK);
1480 }
1481
1482 //-------------------------------------------------------------------------------------------------
1483 /// Enable/Disable File-in 192 Block Scheme
1484 /// @param u8FileEng \b IN: Finein Engine
1485 /// @param bEnable \b IN: Enable Flag
1486 /// @return TSO_Result
1487 /// @note
1488 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_192BlockScheme_En(MS_U8 u8FileEng,MS_BOOL bEnable)1489 TSO_Result MDrv_TSO_Filein_192BlockScheme_En(MS_U8 u8FileEng, MS_BOOL bEnable)
1490 {
1491 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1492
1493 _TSO_ENTRY();
1494 HAL_TSO_Filein_192BlockMode_Enable(0, u8FileEng, bEnable);
1495 _TSO_RETURN(DRVTSO_OK);
1496 }
1497
1498 //-------------------------------------------------------------------------------------------------
1499 /// Enable/Disable Skip TEL packet
1500 /// @param u8Eng \b IN: TSO engine ID
1501 /// @param eIf \b IN: TSO IF
1502 /// @param bEnable \b IN: Enable Flag
1503 /// @return TSO_Result
1504 /// @note
1505 //-------------------------------------------------------------------------------------------------
MDrv_TSO_TEI_SkipPkt(MS_U8 u8Eng,DrvTSO_If eIf,MS_BOOL bEnable)1506 TSO_Result MDrv_TSO_TEI_SkipPkt(MS_U8 u8Eng, DrvTSO_If eIf, MS_BOOL bEnable)
1507 {
1508 MS_U8 u8If = 0;
1509
1510 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1511
1512 if((u8If = _TSO_TSIF2ChID(eIf)) == 0xFF)
1513 {
1514 return DRVTSO_INVALID_PARAM;
1515 }
1516
1517 _TSO_ENTRY();
1518 HAL_TSO_ChIf_Cfg(u8Eng, u8If, TSO_CHCFG_SKIP_TEI_PKT, bEnable);
1519 _TSO_RETURN(DRVTSO_OK);
1520 }
1521
1522 //-------------------------------------------------------------------------------------------------
1523 /// Clear PID filter byte counter
1524 /// @param u8Eng \b IN: TSO engine ID
1525 /// @return TSO_Result
1526 /// @note
1527 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Clr_ByteCnt(MS_U8 u8Eng,DrvTSO_If eIf)1528 TSO_Result MDrv_TSO_Clr_ByteCnt(MS_U8 u8Eng, DrvTSO_If eIf)
1529 {
1530 MS_U8 u8If = 0;
1531
1532 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1533
1534 if((u8If = _TSO_TSIF2ChID(eIf)) == 0xFF)
1535 {
1536 return DRVTSO_INVALID_PARAM;
1537 }
1538
1539 _TSO_ENTRY();
1540 HAL_TSO_ChIf_ClrByteCnt(u8Eng, u8If);
1541 _TSO_RETURN(DRVTSO_OK);
1542 }
1543
1544 //-------------------------------------------------------------------------------------------------
1545 /// Get TSO Hardware capability
1546 /// @param eCap \b IN: Capability item to get
1547 /// @param pOutput \b IN: Pointer to store getting result
1548 /// @return TSO_Result
1549 /// @note
1550 //-------------------------------------------------------------------------------------------------
MDrv_TSO_GetCap(DrvTSO_Cap eCap,void * pOutput)1551 TSO_Result MDrv_TSO_GetCap(DrvTSO_Cap eCap, void* pOutput)
1552 {
1553 *((MS_U32*)pOutput) = 0;
1554
1555 switch (eCap)
1556 {
1557 case E_DRVTSO_CAP_FILTER_NUM:
1558 *((MS_U32*)pOutput) = TSO_PIDFLT_NUM_ALL;
1559 break;
1560 case E_DRVTSO_CAP_RESOURCE_SIZE:
1561 *((MS_U32*)pOutput) = (MS_U32)sizeof(TSO_RESOURCE_PRIVATE);
1562 break;
1563 case E_DRVTSO_CAP_ENGINE_NUM:
1564 *((MS_U32*)pOutput) = TSO_ENGINE_NUM;
1565 break;
1566 case E_DRVTSO_CAP_ENGINE_TSIF_NUM:
1567 *((MS_U32*)pOutput) = TSO_TSIF_NUM;
1568 break;
1569 default:
1570 return DRVTSO_INVALID_PARAM;
1571 }
1572
1573 return DRVTSO_OK;
1574 }
1575
1576 //-------------------------------------------------------------------------------------------------
1577 /// Get Command queue state
1578 /// @param u8FileEng \b IN: File engine ID
1579 /// @param peFileinState \b OUT: Pointer of Filein state to return
1580 /// @return MMFI_Result
1581 /// @note
1582 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_GetState(MS_U8 u8FileEng,DrvTSO_FileinState * peFileinState)1583 TSO_Result MDrv_TSO_Filein_GetState(MS_U8 u8FileEng, DrvTSO_FileinState *peFileinState)
1584 {
1585 MS_U16 u16state = 0xFF, u16cmdcnt = 0;
1586
1587 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1588
1589 _TSO_ENTRY();
1590
1591 u16state = HAL_TSO_Get_Filein_Ctrl(0, u8FileEng);
1592 u16cmdcnt = HAL_TSO_CmdQ_FIFO_Get_WRCnt(0, u8FileEng);
1593
1594 if((u16state & TSO_FILEIN_RSTART) || u16cmdcnt)
1595 *peFileinState = E_DRVTSO_STATE_BUSY;
1596 else
1597 *peFileinState = E_DRVTSO_STATE_IDLE;
1598 _TSO_RETURN(DRVTSO_OK);
1599 }
1600
1601 //-------------------------------------------------------------------------------------------------
1602 /// Get Command queue interrupt state
1603 /// @param u8Eng \b IN: TSO engine ID
1604 /// @param u8FileEng \b IN: Filein engine
1605 /// @param pStatus \b OUT: Pointer of Filein status to return
1606 /// @return TSO_Result
1607 /// @note
1608 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_ChkStatus(MS_U8 u8Eng,MS_U8 u8FileEng,DrvTSO_Status * pStatus)1609 TSO_Result MDrv_TSO_Filein_ChkStatus(MS_U8 u8Eng, MS_U8 u8FileEng, DrvTSO_Status* pStatus)
1610 {
1611 MS_U16 u32temp = 0;
1612
1613 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1614
1615 u32temp = HAL_TSO_HWInt_Status(u8Eng);
1616
1617 *pStatus = E_DRVTSO_STATUS_UNKNOWN;
1618
1619 if(u8FileEng == 0)
1620 {
1621 if(u32temp & TSO_INT_DMA_DONE)
1622 *pStatus |= E_DRVTSO_STATUS_FILEINDONE;
1623 }
1624 else if(u8FileEng == 1)
1625 {
1626 if(u32temp & TSO_INT_DMA_DONE1)
1627 *pStatus |= E_DRVTSO_STATUS_FILEINDONE;
1628 }
1629
1630 return DRVTSO_OK;
1631 }
1632
1633 //-------------------------------------------------------------------------------------------------
1634 /// Clear Command queue interrupt state
1635 /// @param u8Eng \b IN: TSO engine ID
1636 /// @param u16int \b OUT: Interrupt bit to clear
1637 /// @return MMFI_Result
1638 /// @note
1639 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_ClearHWInt(MS_U8 u8Eng,MS_U16 u16int)1640 TSO_Result MDrv_TSO_Filein_ClearHWInt(MS_U8 u8Eng, MS_U16 u16int)
1641 {
1642 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1643
1644 _TSO_ENTRY();
1645 HAL_TSO_HWInt_Clear(u8Eng, u16int);
1646 _TSO_RETURN(DRVTSO_OK);
1647 }
1648
1649 //-------------------------------------------------------------------------------------------------
1650 /// Control Filein to Start
1651 /// @param u8FileEng \b IN: Filein engine
1652 /// @return TSO_Result
1653 /// @note
1654 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_Start(MS_U8 u8FileEng)1655 TSO_Result MDrv_TSO_Filein_Start(MS_U8 u8FileEng)
1656 {
1657 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1658
1659 _TSO_ENTRY();
1660
1661 //HAL_TSO_FileinTimer_Enable(0, u8FileEng, TRUE);
1662
1663 //valid cfg parameters
1664 HAL_TSO_Cfg1_Enable(0, TSO_CFG1_PKT_PARAM_LD, TRUE);
1665 HAL_TSO_Cfg1_Enable(0, TSO_CFG1_PKT_PARAM_LD, FALSE);
1666
1667 HAL_TSO_Set_Filein_Ctrl(0, u8FileEng, TSO_FILEIN_RSTART);
1668 _TSO_RETURN(DRVTSO_OK);
1669 }
1670
1671 //-------------------------------------------------------------------------------------------------
1672 /// Control Filein to Stop
1673 /// @param u8FileEng \b IN: Filein engine
1674 /// @return TSO_Result
1675 /// @note
1676 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_Stop(MS_U8 u8FileEng)1677 TSO_Result MDrv_TSO_Filein_Stop(MS_U8 u8FileEng)
1678 {
1679 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1680
1681 MS_U8 u8TsIf = ((u8FileEng == 0)?HAL_TSO_TSIF_FILE1 : HAL_TSO_TSIF_FILE2);
1682
1683 _TSO_ENTRY();
1684
1685 HAL_TSO_ChIf_Enable(0, u8TsIf, FALSE);
1686 HAL_TSO_Cfg1_Enable(0, TSO_CFG1_TSO_OUT_EN, FALSE);
1687
1688 _TSO_RETURN(DRVTSO_OK);
1689 }
1690
1691 //-------------------------------------------------------------------------------------------------
1692 /// Control Filein to Abort
1693 /// @param u8FileEng \b IN: Filein engine
1694 /// @return TSO_Result
1695 /// @note
1696 //-------------------------------------------------------------------------------------------------
MDrv_TSO_Filein_Abort(MS_U8 u8FileEng)1697 TSO_Result MDrv_TSO_Filein_Abort(MS_U8 u8FileEng)
1698 {
1699 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1700
1701 _TSO_ENTRY();
1702 HAL_TSO_Set_Filein_Ctrl(0, u8FileEng, TSO_FILEIN_ABORT);
1703 _TSO_RETURN(DRVTSO_OK);
1704 }
1705
MDrv_TSO_ResetAll(MS_U8 u8Eng)1706 TSO_Result MDrv_TSO_ResetAll(MS_U8 u8Eng)
1707 {
1708 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1709
1710 _TSO_ENTRY();
1711 HAL_TSO_Reset_All(u8Eng);
1712 _TSO_RETURN(DRVTSO_OK);
1713 }
1714
MDrv_TSO_SelPad(MS_U8 u8Eng,DrvTSO_If eIf,DrvTSO_If_Set * pIfSet)1715 TSO_Result MDrv_TSO_SelPad(MS_U8 u8Eng, DrvTSO_If eIf, DrvTSO_If_Set* pIfSet)
1716 {
1717 MS_U8 u8ChId = 0;
1718 MS_U16 u16Pad = 0, u16clk = 0;
1719 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
1720 MS_BOOL bIs3Wire = FALSE;
1721 #endif
1722
1723 if((u8ChId = _TSO_TSIF2ChID(eIf)) == 0xFF)
1724 {
1725 return DRVTSO_INVALID_PARAM;
1726 }
1727
1728 TSO_DBGERR(ULOGE("TSO", "[%s] eIf %d, ePad %x\n", __FUNCTION__, (int)eIf, (int)pIfSet->ePad));
1729
1730 switch(pIfSet->ePad)
1731 {
1732 case E_DRVTSO_PAD_EXT_INPUT0:
1733 u16Pad = HAL_TSOIN_MUX_TS0;
1734 u16clk = TSO_CLKIN_TS0;
1735 break;
1736 case E_DRVTSO_PAD_EXT_INPUT1:
1737 u16Pad = HAL_TSOIN_MUX_TS1;
1738 u16clk = TSO_CLKIN_TS1;
1739 break;
1740 case E_DRVTSO_PAD_EXT_INPUT2:
1741 u16Pad = HAL_TSOIN_MUX_TS2;
1742 u16clk = TSO_CLKIN_TS2;
1743 break;
1744 case E_DRVTSO_PAD_EXT_INPUT3:
1745 u16Pad = HAL_TSOIN_MUX_TS3;
1746 u16clk = TSO_CLKIN_TS3;
1747 break;
1748 case E_DRVTSO_PAD_EXT_INPUT4:
1749 u16Pad = HAL_TSOIN_MUX_TS4;
1750 u16clk = TSO_CLKIN_TS4;
1751 break;
1752 #ifdef TSO_CLKIN_TS5
1753 case E_DRVTSO_PAD_EXT_INPUT5:
1754 u16Pad = HAL_TSOIN_MUX_TS5;
1755 u16clk = TSO_CLKIN_TS5;
1756 break;
1757 #endif
1758 case E_DRVTSO_PAD_DEMOD:
1759 u16Pad = HAL_TSOIN_MUX_TSDEMOD0;
1760 u16clk = TSO_CLKIN_DMD;
1761 break;
1762 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
1763 case E_DRVTSO_PAD_EXT_INPUT0_3WIRE:
1764 HAL_TSO_3WirePadMapping(0, &u16Pad, &u16clk);
1765 bIs3Wire = TRUE;
1766 break;
1767 case E_DRVTSO_PAD_EXT_INPUT1_3WIRE:
1768 HAL_TSO_3WirePadMapping(1, &u16Pad, &u16clk);
1769 bIs3Wire = TRUE;
1770 break;
1771 case E_DRVTSO_PAD_EXT_INPUT2_3WIRE:
1772 HAL_TSO_3WirePadMapping(2, &u16Pad, &u16clk);
1773 bIs3Wire = TRUE;
1774 break;
1775 case E_DRVTSO_PAD_EXT_INPUT3_3WIRE:
1776 HAL_TSO_3WirePadMapping(3, &u16Pad, &u16clk);
1777 bIs3Wire = TRUE;
1778 break;
1779 case E_DRVTSO_PAD_EXT_INPUT4_3WIRE:
1780 HAL_TSO_3WirePadMapping(4, &u16Pad, &u16clk);
1781 bIs3Wire = TRUE;
1782 break;
1783 case E_DRVTSO_PAD_EXT_INPUT5_3WIRE:
1784 HAL_TSO_3WirePadMapping(5, &u16Pad, &u16clk);
1785 bIs3Wire = TRUE;
1786 break;
1787 case E_DRVTSO_PAD_EXT_INPUT6_3WIRE:
1788 HAL_TSO_3WirePadMapping(6, &u16Pad, &u16clk);
1789 bIs3Wire = TRUE;
1790 break;
1791 #endif
1792 default:
1793 return DRVTSO_INVALID_PARAM;
1794 }
1795
1796 _TSO_ENTRY();
1797
1798 if(HAL_TSO_SelPad(u8Eng, u8ChId, u16Pad, pIfSet->bParallel) == FALSE)
1799 {
1800 _TSO_RETURN(DRVTSO_FAIL);
1801 }
1802 if(HAL_TSO_Set_InClk(u8Eng, u8ChId, u16clk, pIfSet->bClkInv, TRUE) == FALSE)
1803 {
1804 _TSO_RETURN(DRVTSO_FAIL);
1805 }
1806
1807 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
1808 if(bIs3Wire)
1809 {
1810 HAL_TSO_Livein_3Wire(u8Eng, u8ChId, TRUE);
1811 }
1812 else
1813 {
1814 HAL_TSO_Livein_3Wire(u8Eng, u8ChId, FALSE);
1815 }
1816 #endif
1817
1818 HAL_TSO_ChIf_Cfg(u8Eng, u8ChId, (TSO_CHCFG_TS_SIN_C0 | TSO_CHCFG_TS_SIN_C1), (pIfSet->bParallel == FALSE));
1819 HAL_TSO_ChIf_Cfg(u8Eng, u8ChId, TSO_CHCFG_P_SEL, pIfSet->bParallel);
1820 HAL_TSO_ChIf_Cfg(u8Eng, u8ChId, TSO_CHCFG_EXT_SYNC_SEL, pIfSet->bExtSync);
1821
1822 _TSO_RETURN(DRVTSO_OK);
1823 }
1824
1825 //-------------------------------------------------------------------------------------------------
1826 /// Set/Get TSO output pad
1827 /// @param u8Eng \b IN: TSO engine ID
1828 /// @param eOutPad \b IN: Output pad
1829 /// @param bSet \b IN: TRUE is setting output pad; FALSE is getting output pad
1830 /// @return TSO_Result
1831 /// @note
1832 //-------------------------------------------------------------------------------------------------
MDrv_TSO_OutputPad(MS_U8 u8Eng,DrvTSO_PadOut * peOutPad,MS_BOOL bSet)1833 TSO_Result MDrv_TSO_OutputPad(MS_U8 u8Eng, DrvTSO_PadOut* peOutPad, MS_BOOL bSet)
1834 {
1835 MS_U16 u16pad = (MS_U16)(*peOutPad);
1836
1837 TSO_DBGERR(ULOGE("TSO", "[%d]%s\n", __LINE__, __FUNCTION__));
1838
1839 _TSO_ENTRY();
1840
1841 if(HAL_TSO_OutPad(u8Eng, &u16pad, bSet) == TRUE)
1842 {
1843 _TSO_RETURN(DRVTSO_OK);
1844 }
1845 else
1846 {
1847 _TSO_RETURN(DRVTSO_FAIL);
1848 }
1849 }
1850
MDrv_TSO_Set_SVQBuf(MS_U8 u8Eng,MS_PHY phyBufAddr,MS_U32 u32Size)1851 TSO_Result MDrv_TSO_Set_SVQBuf(MS_U8 u8Eng, MS_PHY phyBufAddr, MS_U32 u32Size)
1852 {
1853 MS_PHY phyBufStart = phyBufAddr;
1854 MS_U32 u32VQSize = ((u32Size >> TSO_MIU_BUS) / TSO_TSIF_NUM) << TSO_MIU_BUS;
1855 MS_U8 u8ii, u8ChId;
1856
1857 _TSO_ENTRY();
1858
1859 //TSO LIVE-IN
1860 for(u8ii = 0; u8ii < TSO_TSIF_NUM; u8ii++)
1861 {
1862 u8ChId = _TSO_TSIF2ChID(u8ii);
1863 HAL_TSO_SVQBuf_Set(u8Eng, u8ChId, phyBufStart, u32VQSize);
1864 HAL_TSO_SVQ_TX_Reset(u8Eng, u8ChId);
1865 phyBufStart += u32VQSize;
1866 }
1867
1868 _TSO_RETURN(DRVTSO_OK);
1869 }
1870
MDrv_TSO_Set_SVQ_LocalSysTimestamp(MS_U8 u8Eng,MS_U32 u32timestamp)1871 TSO_Result MDrv_TSO_Set_SVQ_LocalSysTimestamp(MS_U8 u8Eng, MS_U32 u32timestamp)
1872 {
1873 _TSO_ENTRY();
1874 HAL_TSO_Set_SVQ_LocalSysTimestamp(u8Eng, u32timestamp);
1875 _TSO_RETURN(DRVTSO_OK);
1876 }
1877
MDrv_TSO_LocalStreamId(MS_U8 u8Eng,DrvTSO_If eIf,MS_U8 * pu8Id,MS_BOOL bSet)1878 TSO_Result MDrv_TSO_LocalStreamId(MS_U8 u8Eng, DrvTSO_If eIf, MS_U8 *pu8Id, MS_BOOL bSet)
1879 {
1880 MS_U8 u8ChId = 0;
1881
1882 if((u8ChId = _TSO_TSIF2ChID(eIf)) == 0xFF)
1883 {
1884 return DRVTSO_INVALID_PARAM;
1885 }
1886
1887 _TSO_ENTRY();
1888
1889 if(HAL_TSO_LocalStreamID(u8Eng, u8ChId, pu8Id, bSet) == FALSE)
1890 {
1891 _TSO_RETURN(DRVTSO_FAIL);
1892 }
1893 else
1894 {
1895 _TSO_RETURN(DRVTSO_OK);
1896 }
1897 }
1898
1899 #if (defined(TSP_VERSION) && (TSP_VERSION == TSP_VER_4_0))
MDrv_TSO_TsioMode_En(MS_U8 u8Eng,MS_BOOL bEnable)1900 TSO_Result MDrv_TSO_TsioMode_En(MS_U8 u8Eng, MS_BOOL bEnable)
1901 {
1902 _TSO_ENTRY();
1903 HAL_TSO_TsioMode_En(bEnable);
1904 _TSO_RETURN(DRVTSO_OK);
1905 }
1906 #endif
1907
MDrv_TSO_Check_IsSVQTxBusy(MS_U8 u8Eng,DrvTSO_If eIf)1908 MS_BOOL MDrv_TSO_Check_IsSVQTxBusy(MS_U8 u8Eng, DrvTSO_If eIf)
1909 {
1910 MS_U8 u8ChId = _TSO_TSIF2ChID(eIf);
1911 MS_U16 u16Status = 0;
1912
1913 HAL_TSO_Get_SVQ_Status(u8Eng, u8ChId, &u16Status);
1914
1915 if((u16Status & TSO_SVQ_STS_BUSY) == TSO_SVQ_STS_BUSY)
1916 return TRUE;
1917 else
1918 return FALSE;
1919 }
1920
MDrv_TSO_Check_IsSVQTxEmpty(MS_U8 u8Eng,DrvTSO_If eIf)1921 MS_BOOL MDrv_TSO_Check_IsSVQTxEmpty(MS_U8 u8Eng, DrvTSO_If eIf)
1922 {
1923 MS_U8 u8ChId = _TSO_TSIF2ChID(eIf);
1924 MS_U16 u16Status = 0;
1925
1926 HAL_TSO_Get_SVQ_Status(u8Eng, u8ChId, &u16Status);
1927
1928 if((u16Status & TSO_SVQ_STS_EMPTY) == TSO_SVQ_STS_EMPTY)
1929 return TRUE;
1930 else
1931 return FALSE;
1932 }
1933
1934 #ifdef TSO_PVR_SUPPORT
MDrv_TSO_PVR_SelSrc(MS_U8 u8PVRId,DrvTSO_PvrSrc ePvrSrc)1935 TSO_Result MDrv_TSO_PVR_SelSrc(MS_U8 u8PVRId, DrvTSO_PvrSrc ePvrSrc)
1936 {
1937 _TSO_ENTRY();
1938 if(ePvrSrc == E_DRVTSO_PVR_SRC_SVQ)
1939 {
1940 HAL_TSO_PVR_Src(HAL_TSO_PVR_SVQ);
1941 }
1942 else if(ePvrSrc == E_DRVTSO_PVR_SRC_MMT)
1943 {
1944 HAL_TSO_PVR_Src(HAL_TSO_PVR_MMT);
1945 }
1946 else
1947 {
1948 HAL_TSO_PVR_Src(HAL_TSO_PVR_SVQ);
1949 }
1950
1951 _TSO_RETURN(DRVTSO_OK);
1952
1953 }
1954
MDrv_TSO_PVR_SetBuf(MS_U8 u8PVRId,MS_PHY phyBufStart0,MS_PHY phyBufStart1,MS_U32 u32BufSize0,MS_U32 u32BufSize1)1955 TSO_Result MDrv_TSO_PVR_SetBuf(MS_U8 u8PVRId, MS_PHY phyBufStart0, MS_PHY phyBufStart1, MS_U32 u32BufSize0, MS_U32 u32BufSize1)
1956 {
1957 _TSO_ENTRY();
1958 HAL_TSO_PVR_SetBuffer(u8PVRId, phyBufStart0, phyBufStart1, u32BufSize0, u32BufSize1);
1959 _TSO_RETURN(DRVTSO_OK);
1960 }
1961
MDrv_TSO_PVR_SetRecordStampClk(MS_U8 u8PVRId,MS_U32 u32Clk)1962 TSO_Result MDrv_TSO_PVR_SetRecordStampClk(MS_U8 u8PVRId, MS_U32 u32Clk)
1963 {
1964 _TSO_ENTRY();
1965 HAL_TSO_SetPVRTimeStampClk(u8PVRId, u32Clk);
1966 _TSO_RETURN(DRVTSO_OK);
1967 }
1968
MDrv_TSO_PVR_SetPacketMode(MS_U8 u8PVRId,MS_BOOL bSet)1969 TSO_Result MDrv_TSO_PVR_SetPacketMode(MS_U8 u8PVRId, MS_BOOL bSet)
1970 {
1971 _TSO_ENTRY();
1972 HAL_TSO_PVR_PacketMode(u8PVRId, bSet);
1973 _TSO_RETURN(DRVTSO_OK);
1974 }
1975
MDrv_TSO_PVR_TimeStampSetRecordStamp(MS_U8 u8PVRId,MS_U32 u32Stamp)1976 TSO_Result MDrv_TSO_PVR_TimeStampSetRecordStamp(MS_U8 u8PVRId, MS_U32 u32Stamp)
1977 {
1978 _TSO_ENTRY();
1979 HAL_TSO_SetPVRTimeStamp(u8PVRId, u32Stamp);
1980 _TSO_RETURN(DRVTSO_OK);
1981 }
1982
MDrv_TSO_PVR_TimeStampGetRecordStamp(MS_U8 u8PVRId,MS_U32 * pu32Stamp)1983 TSO_Result MDrv_TSO_PVR_TimeStampGetRecordStamp(MS_U8 u8PVRId, MS_U32* pu32Stamp)
1984 {
1985 _TSO_ENTRY();
1986 *pu32Stamp = HAL_TSO_GetPVRTimeStamp(u8PVRId);
1987 _TSO_RETURN(DRVTSO_OK);
1988 }
1989
MDrv_TSO_PVR_Start(MS_U8 u8PVRId,DrvTSO_RecMode eRecMode,MS_BOOL bStart)1990 TSO_Result MDrv_TSO_PVR_Start(MS_U8 u8PVRId, DrvTSO_RecMode eRecMode, MS_BOOL bStart)
1991 {
1992 _TSO_ENTRY();
1993 HAL_TSO_PVR_Enable(u8PVRId, bStart);
1994 _TSO_RETURN(DRVTSO_OK);
1995 }
1996
MDrv_TSO_PVR_GetWriteAddr(MS_U8 u8PVRId,MS_PHY * pphy2WriteAddr)1997 TSO_Result MDrv_TSO_PVR_GetWriteAddr(MS_U8 u8PVRId, MS_PHY *pphy2WriteAddr)
1998 {
1999 _TSO_ENTRY();
2000 *pphy2WriteAddr = HAL_TSO_PVR_GetBufWrite(u8PVRId);
2001 _TSO_RETURN(DRVTSO_OK);
2002 }
2003
2004 #endif //TSO_PVR_SUPPORT
2005
2006
2007 #ifdef MSOS_TYPE_LINUX_KERNEL
MDrv_TSO_Suspend(void)2008 TSO_Result MDrv_TSO_Suspend(void)
2009 {
2010 HAL_TSO_SaveRegs();
2011 HAL_TSO_PowerCtrl(FALSE);
2012
2013 return DRVTSO_OK;
2014 }
2015
MDrv_TSO_Resume(void)2016 TSO_Result MDrv_TSO_Resume(void)
2017 {
2018 MS_U16 u16ii, u16jj;
2019
2020 HAL_TSO_Reset_All(0);
2021
2022 HAL_TSO_RestoreRegs();
2023
2024 //restart filter
2025 for(u16ii = 0; u16ii < TSO_ENGINE_NUM; u16ii++)
2026 {
2027 for(u16jj = 0; u16jj < TSO_PIDFLT_NUM; u16jj++)
2028 {
2029 if(_ptso_res->_FltState[u16ii][u16jj] == E_DRVTSO_FLT_STATE_ALLOC)
2030 {
2031 HAL_TSO_Flt_SetPid((MS_U8)u16ii, u16jj, _ptso_res->_u16FltPid[u16ii][u16jj]);
2032 HAL_TSO_Flt_SetInputSrc((MS_U8)u16ii, u16jj, _ptso_res->_u32FltChSrc[u16ii][u16jj]);
2033 }
2034 }
2035 }
2036
2037 return DRVTSO_OK;
2038 }
2039 #endif //MSOS_TYPE_LINUX_KERNEL
2040
2041