1 //<MStar Software>
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75 //
76 //******************************************************************************
77 ////////////////////////////////////////////////////////////////////////////////////////////////////
78 /// file drvFQ.c
79 /// @brief FQ Driver Interface
80 /// @author MStar Semiconductor,Inc.
81 /// @attention
82 ////////////////////////////////////////////////////////////////////////////////////////////////////
83
84 #include "MsCommon.h"
85 #include "MsVersion.h"
86 #include "regFQ.h"
87 #include "halFQ.h"
88
89 #ifdef FQ_HW_BOX_SERIES
90 #include "regTSP.h"
91 #include "halTSP.h"
92 #endif
93
94 #include "drvFQ.h"
95 #include "drvMMIO.h"
96 #include "asmCPU.h"
97
98 #ifdef MSOS_TYPE_LINUX
99 #include <sys/ioctl.h>
100 #include <unistd.h>
101 #include <fcntl.h> // O_RDWR
102 #endif
103
104 //--------------------------------------------------------------------------------------------------
105 // Debug Macro
106 //--------------------------------------------------------------------------------------------------
107 #define MS_DEBUG 1
108 #if MS_DEBUG
109 #define FQ_DBG(_fmt,_args...) {printf("[%s][%d]",__FUNCTION__,__LINE__); printf(_fmt,##_args);}
110 #else
111 #define FQ_DBG(_args) { }
112 #endif
113
114 //--------------------------------------------------------------------------------------------------
115 // Driver Compiler Option
116 //--------------------------------------------------------------------------------------------------
117
118 //--------------------------------------------------------------------------------------------------
119 // Local Defines
120 //--------------------------------------------------------------------------------------------------
121 #define _FQ_ENTRY() if (!MsOS_ObtainMutex(_s32FQMutexId, MSOS_WAIT_FOREVER)) \
122 { \
123 _u32LastErr = DRVFQ_FUNC_ERROR; \
124 return DRVFQ_FUNC_ERROR; \
125 } \
126 if (_bSuspend) \
127 { \
128 _FQ_RETURN(DRVFQ_FAIL); \
129 }
130
131 #define _FQ_RETURN(_ret) if(MsOS_ReleaseMutex(_s32FQMutexId)) {return _ret;} \
132 else \
133 { \
134 _u32LastErr = DRVFQ_FUNC_ERROR; \
135 return DRVFQ_FUNC_ERROR; \
136 }
137
138 #define FQ_NUM_CHECK_RET(idx) if(idx >= FQ_NUM ) \
139 { printf("[FQ][ERR] FQ Engine [%d] not exist ! \n", (unsigned int)idx); \
140 return 0; }
141
142 //--------------------------------------------------------------------------------------------------
143 // Local variable
144 //--------------------------------------------------------------------------------------------------
145 static MS_S32 _s32FQMutexId = -1;
146 static MS_U32 _u32LastErr;
147 static MS_BOOL _bSuspend = FALSE;
148 //MS_U32 _u32FQIntNum = ; //for intr
149 static MS_BOOL _bFQInitReady = FALSE;
150 //--------------------------------------------------------------------------------------------------
151 // Forward declaration
152 //--------------------------------------------------------------------------------------------------
_FQ_RegStateReset(MS_U32 u32FQEng)153 static void _FQ_RegStateReset(MS_U32 u32FQEng)
154 {
155 HAL_FQ_PVR_SetBuf(u32FQEng, 0, 0);
156 HAL_FQ_SkipRushData(u32FQEng, FIQ_CFG11_SKIP_RUSH_DATA_PATH_NON);
157 HAL_FQ_PVR_SetRushAddr(u32FQEng, 0);
158 }
159
_FQ_Init(MS_U32 u32FQEng,MS_U8 u8AddrMode)160 static void _FQ_Init(MS_U32 u32FQEng, MS_U8 u8AddrMode)
161 {
162 HAL_FQ_SWReset(u32FQEng, FALSE);
163 HAL_FQ_Bypass(u32FQEng, FALSE);
164 HAL_FQ_AddrMode(u32FQEng, u8AddrMode);
165 }
166
_FQ_Exit(MS_U32 u32FQEng)167 static void _FQ_Exit(MS_U32 u32FQEng)
168 {
169 HAL_FQ_SWReset(u32FQEng, TRUE);
170 HAL_FQ_Bypass(u32FQEng, TRUE);
171 HAL_FQ_AddrMode(u32FQEng, FALSE);
172 }
173
174 // General API
175 //--------------------------------------------------------------------------------------------------
176 /// Initialize FQ driver and FQ engine
177 /// @return FQ_Result
178 /// @note
179 /// It should be called before calling any other FQ DDI functions.
180 /// Driver task is in @ref E_TASK_PRI_SYS level.
181 //--------------------------------------------------------------------------------------------------
MDrv_FQ_Init(MS_U32 u32FQEng,MS_U8 u8AddrMode)182 FQ_Result MDrv_FQ_Init(MS_U32 u32FQEng, MS_U8 u8AddrMode)
183 {
184 #ifdef FQ_HW_BOX_SERIES
185 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
186 #else
187 MS_U32 u32MapingFQEng = u32FQEng;
188 #endif
189 MS_VIRT virtBank;
190 MS_PHY phyBankSize;
191
192 FQ_NUM_CHECK_RET(u32MapingFQEng);
193
194 if (FALSE == MDrv_MMIO_GetBASE(&virtBank, &phyBankSize, MS_MODULE_HW))
195 {
196 FQ_DBG("MDrv_MMIO_GetBASE fail\n");
197 MS_ASSERT(0);
198 }
199
200 if(!HAL_FQ_SetBank(virtBank))
201 {
202 _FQ_RETURN(DRVFQ_FAIL);
203 }
204
205 _FQ_Init(u32MapingFQEng, u8AddrMode);
206
207 _FQ_RegStateReset(u32MapingFQEng);
208 //default for PCR filter & RASP/PVR, we skip rush data to avoid the older data.
209 #ifdef FQ_HW_BOX_SERIES
210 HAL_FQ_SkipRushData(u32MapingFQEng, FIQ_CFG11_SKIP_PCR_RUSH_DATA | FIQ_CFG11_SKIP_PVR1_RUSH_DATA
211 | FIQ_CFG11_SKIP_PVR2_RUSH_DATA | FIQ_CFG11_SKIP_PVR3_RUSH_DATA
212 | FIQ_CFG11_SKIP_PVR4_RUSH_DATA);
213 #else
214 HAL_FQ_SkipRushData(u32FQEng, FIQ_CFG11_SKIP_PCR_RUSH_DATA | FIQ_CFG11_SKIP_APES_RUSH_DATA | FIQ_CFG11_SKIP_APES_B_RUSH_DATA
215 | FIQ_CFG11_SKIP_PVR1_RUSH_DATA|FIQ_CFG11_SKIP_SEC_RUSH_DATA|FIQ_CFG11_SKIP_ADP_RUSH_DATA|FIQ_CFG11_SKIP_PCR1_RUSH_DATA);
216 #endif
217
218 if (-1 == _s32FQMutexId)
219 _s32FQMutexId = MsOS_CreateMutex(E_MSOS_FIFO , "FQ_Mutex" , MSOS_PROCESS_SHARED);
220 else
221 FQ_DBG("Create _s32FQMutexId more than once\n");
222
223 _FQ_ENTRY();
224 _bFQInitReady = TRUE;
225 _FQ_RETURN(DRVFQ_OK);
226 }
227
MDrv_FQ_IsInit(MS_U32 u32FQEng,MS_BOOL * pbIsInit)228 FQ_Result MDrv_FQ_IsInit(MS_U32 u32FQEng, MS_BOOL* pbIsInit)
229 {
230 _FQ_ENTRY();
231 *pbIsInit = _bFQInitReady;
232 _FQ_RETURN(DRVFQ_OK);
233 }
234
235 //--------------------------------------------------------------------------------------------------
236 /// Close FQ driver and reset software/register state
237 /// @return FQ_Result
238 /// @note
239 //--------------------------------------------------------------------------------------------------
MDrv_FQ_Exit(MS_U32 u32FQEng)240 FQ_Result MDrv_FQ_Exit(MS_U32 u32FQEng)
241 {
242 #ifdef FQ_HW_BOX_SERIES
243 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
244 #else
245 MS_U32 u32MapingFQEng = u32FQEng;
246 #endif
247
248 FQ_NUM_CHECK_RET(u32MapingFQEng);
249 if (_s32FQMutexId != -1)
250 _FQ_ENTRY();
251
252 if(_bFQInitReady == TRUE)
253 {
254 _FQ_RegStateReset(u32MapingFQEng);
255 _FQ_Exit(u32MapingFQEng);
256
257 _bFQInitReady = FALSE;
258 }
259
260 if (_s32FQMutexId != -1)
261 {
262 MsOS_ReleaseMutex(_s32FQMutexId);
263 MsOS_DeleteMutex(_s32FQMutexId);
264 _s32FQMutexId = -1;
265 }
266
267 return DRVFQ_OK;
268 }
269
MDrv_FQ_SetBuffer(MS_U32 u32FQEng,MS_PHY phyBufStart,MS_U32 u32BufSize)270 FQ_Result MDrv_FQ_SetBuffer(MS_U32 u32FQEng, MS_PHY phyBufStart, MS_U32 u32BufSize)
271 {
272 #ifdef FQ_HW_BOX_SERIES
273 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
274 #else
275 MS_U32 u32MapingFQEng = u32FQEng;
276 #endif
277
278 FQ_NUM_CHECK_RET(u32MapingFQEng);
279 _FQ_ENTRY();
280 #ifdef FQ_HW_BOX_SERIES
281 HAL_TSP_FQ_MMFI_MIU_Sel(E_TSP_HAL_MIU_SEL_FQ, u32MapingFQEng, phyBufStart);
282 #endif
283 HAL_FQ_PVR_SetBuf(u32MapingFQEng, phyBufStart, u32BufSize);
284 _FQ_RETURN(DRVFQ_OK);
285 }
286
MDrv_FQ_Start(MS_U32 u32FQEng,MS_BOOL bStart)287 FQ_Result MDrv_FQ_Start(MS_U32 u32FQEng, MS_BOOL bStart)
288 {
289 #ifdef FQ_HW_BOX_SERIES
290 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
291 #else
292 MS_U32 u32MapingFQEng = u32FQEng;
293 #endif
294
295 FQ_NUM_CHECK_RET(u32MapingFQEng);
296 _FQ_ENTRY();
297
298 if (!bStart)
299 HAL_FQ_PVR_Stop(u32MapingFQEng);
300 else
301 HAL_FQ_PVR_Start(u32MapingFQEng);
302
303 _FQ_RETURN(DRVFQ_OK);
304 }
305
MDrv_FQ_SetRushAddr(MS_U32 u32FQEng,MS_PHY phyRushAddr)306 FQ_Result MDrv_FQ_SetRushAddr(MS_U32 u32FQEng, MS_PHY phyRushAddr)
307 {
308 #ifdef FQ_HW_BOX_SERIES
309 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
310 #else
311 MS_U32 u32MapingFQEng = u32FQEng;
312 #endif
313
314 FQ_NUM_CHECK_RET(u32MapingFQEng);
315 _FQ_ENTRY();
316 HAL_FQ_PVR_SetRushAddr(u32MapingFQEng, phyRushAddr);
317 _FQ_RETURN(DRVFQ_OK);
318 }
319
MDrv_FQ_SkipRushData(MS_U32 u32FQEng,MS_U32 u32SkipPath)320 FQ_Result MDrv_FQ_SkipRushData(MS_U32 u32FQEng, MS_U32 u32SkipPath)
321 {
322 #ifdef FQ_HW_BOX_SERIES
323 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
324 #else
325 MS_U32 u32MapingFQEng = u32FQEng;
326 #endif
327
328 FQ_NUM_CHECK_RET(u32MapingFQEng);
329
330 _FQ_ENTRY();
331
332 HAL_FQ_SkipRushData(u32MapingFQEng, u32SkipPath);
333
334 _FQ_RETURN(DRVFQ_OK);
335 }
336
MDrv_FQ_RushEnable(MS_U32 u32FQEng)337 FQ_Result MDrv_FQ_RushEnable(MS_U32 u32FQEng)
338 {
339 #ifdef FQ_HW_BOX_SERIES
340 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
341 #else
342 MS_U32 u32MapingFQEng = u32FQEng;
343 #endif
344
345 FQ_NUM_CHECK_RET(u32MapingFQEng);
346 _FQ_ENTRY();
347 HAL_FQ_Rush_Enable(u32MapingFQEng);
348 _FQ_RETURN(DRVFQ_OK);
349 }
350
MDrv_FQ_TimeStampSetRecordStamp(MS_U32 u32FQEng,MS_U32 u32Stamp)351 FQ_Result MDrv_FQ_TimeStampSetRecordStamp(MS_U32 u32FQEng, MS_U32 u32Stamp)
352 {
353 #ifdef FQ_HW_BOX_SERIES
354 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
355 #else
356 MS_U32 u32MapingFQEng = u32FQEng;
357 #endif
358
359 FQ_NUM_CHECK_RET(u32MapingFQEng);
360 _FQ_ENTRY();
361 HAL_FQ_SetPVRTimeStamp(u32MapingFQEng, u32Stamp);
362 _FQ_RETURN(DRVFQ_OK);
363 }
364
MDrv_FQ_TimeStampGetRecordStamp(MS_U32 u32FQEng,MS_U32 * u32Stamp)365 FQ_Result MDrv_FQ_TimeStampGetRecordStamp(MS_U32 u32FQEng, MS_U32* u32Stamp)
366 {
367 #ifdef FQ_HW_BOX_SERIES
368 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
369 #else
370 MS_U32 u32MapingFQEng = u32FQEng;
371 #endif
372
373 FQ_NUM_CHECK_RET(u32MapingFQEng);
374 _FQ_ENTRY();
375 *u32Stamp = HAL_FQ_GetPVRTimeStamp(u32MapingFQEng);
376 _FQ_RETURN(DRVFQ_OK);
377 }
378
379
MDrv_FQ_GetReadAddr(MS_U32 u32FQEng,MS_PHY * pphyReadAddr)380 FQ_Result MDrv_FQ_GetReadAddr(MS_U32 u32FQEng, MS_PHY* pphyReadAddr)
381 {
382 #ifdef FQ_HW_BOX_SERIES
383 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
384 #else
385 MS_U32 u32MapingFQEng = u32FQEng;
386 #endif
387
388 FQ_NUM_CHECK_RET(u32MapingFQEng);
389
390 _FQ_ENTRY();
391
392 *pphyReadAddr = HAL_FQ_GetRead(u32MapingFQEng);
393
394 _FQ_RETURN(DRVFQ_OK);
395 }
396
MDrv_FQ_GetWriteAddr(MS_U32 u32FQEng,MS_PHY * pphyWriteAddr)397 FQ_Result MDrv_FQ_GetWriteAddr(MS_U32 u32FQEng, MS_PHY* pphyWriteAddr)
398 {
399 #ifdef FQ_HW_BOX_SERIES
400 MS_U32 u32MapingFQEng = HAL_TSP_Tsif2Fq_Mapping(u32FQEng);
401 #else
402 MS_U32 u32MapingFQEng = u32FQEng;
403 #endif
404
405 FQ_NUM_CHECK_RET(u32MapingFQEng);
406
407 _FQ_ENTRY();
408
409 *pphyWriteAddr = HAL_FQ_GetWrite(u32MapingFQEng);
410
411 _FQ_RETURN(DRVFQ_OK);
412 }
413
414 #ifdef MSOS_TYPE_LINUX_KERNEL
MDrv_FQ_Suspend(void)415 FQ_Result MDrv_FQ_Suspend(void)
416 {
417 if(_bFQInitReady == TRUE)
418 {
419 HAL_FQ_SaveRegs();
420 }
421
422 return DRVFQ_OK;
423 }
424
MDrv_FQ_Resume(void)425 FQ_Result MDrv_FQ_Resume(void)
426 {
427 if(_bFQInitReady == TRUE)
428 {
429 HAL_FQ_RestoreRegs();
430 }
431
432 return DRVFQ_OK;
433 }
434 #endif //MSOS_TYPE_LINUX_KERNEL
435
436
437