1 #include <linux/kernel.h>
2 #include <linux/string.h>
3 #include <linux/slab.h>
4
5 #include "MsTypes.h"
6 #include "utopia.h"
7 #include "utopia_adp.h"
8
9 #include "drvDMD_INTERN_DVBT2_v2.h"
10
11 //#include "MsOS.h"
12
13 //#include <linux/kernel.h>
14
15 //Top
16 //original parameter area
17 UADP_STRUCT_POINTER_TABLE spt_DVBT2_BOOL_VAL[5];
18 UADP_STRUCT_POINTER_TABLE spt_DVBT2_U8_VAL[5];
19 UADP_STRUCT_POINTER_TABLE spt_DVBT2_U16_VAL[5];
20 UADP_STRUCT_POINTER_TABLE spt_DVBT2_U32_VAL[5];
21
22 UADP_STRUCT_POINTER_TABLE spt_DVBT2_8BYTE_PARAM[5];
23 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBT2_InitData_Transform[5];
24 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBT2_Info[5];
25 UADP_STRUCT_POINTER_TABLE spt_DVBT2_MSIF_Version[5];
26 UADP_STRUCT_POINTER_TABLE spt_DMD_T2_LOCK_STATUS[5];
27
28 //ioctl parameter passing area
29 UADP_STRUCT_POINTER_TABLE spt_DVBT2_INIT_PARAM[5];
30 UADP_STRUCT_POINTER_TABLE spt_DVBT2_EXIT_PARAM[5];
31 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETDBGLEVEL_PARAM[5];
32 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETINFO_PARAM[5];
33 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETLIBVER_PARAM[5];
34 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETFWVER_PARAM[5];
35 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETREG_PARAM[5];
36 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETREG_PARAM[5];
37 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETSERIALCONTROL_PARAM[5];
38 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETCONFIG_PARAM[5];
39 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETACTIVE_PARAM[5];
40 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETLOCK_PARAM[5];
41 //UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM[5];
42 //UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM[5];
43
44 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETSNR_PARAM[5];
45 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETPOSTLDPCBER_PARAM[5];
46 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETPRELDPCBERP_PARAM[5];
47
48 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETPACKETERRPARAM[5];
49 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETL1INFO_PARAM[5];
50 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBT2_GETFREQOFFSET_PARAM[5];
51
52 UADP_STRUCT_POINTER_TABLE spt_DVBT2_SETPOWERSTATE_PARAM[5];
53 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETPLPBITMAP_PARAM[5];
54 UADP_STRUCT_POINTER_TABLE spt_DVBT2_GETPLPGROUPID_PARAM[5];
55 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBT2_SETPLPID_PARAM[5];
56
57
58 //UADP_STRUCT_POINTER_TABLE spt_DVBC_8BYTE_PARAM[5];
59
DVBT2_adp_Ioctl(void * pInstanceTmp,MS_U32 u32Cmd,void * const pArgs)60 MS_U32 DVBT2_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs)
61 {
62 MS_U32 u32Ret = 0;
63 char buffer_arg[2048];
64
65 switch(u32Cmd)
66 {
67 case DMD_DVBT2_DRV_CMD_Init:
68 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_INIT_PARAM, spt_DVBT2_INIT_PARAM, buffer_arg, sizeof(buffer_arg));
69 break;
70 case DMD_DVBT2_DRV_CMD_Exit :
71 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_EXIT_PARAM, spt_DVBT2_EXIT_PARAM, buffer_arg, sizeof(buffer_arg));
72 break;
73 case DMD_DVBT2_DRV_CMD_SetDbgLevel:
74 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETDBGLEVEL_PARAM, spt_DVBT2_SETDBGLEVEL_PARAM, buffer_arg, sizeof(buffer_arg));
75 break;
76 case DMD_DVBT2_DRV_CMD_GetInfo:
77 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETINFO_PARAM, spt_DVBT2_GETINFO_PARAM, buffer_arg, sizeof(buffer_arg));
78 break;
79 case DMD_DVBT2_DRV_CMD_GetLibVer:
80 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETLIBVER_PARAM, spt_DVBT2_GETLIBVER_PARAM, buffer_arg, sizeof(buffer_arg));
81 break;
82 case DMD_DVBT2_DRV_CMD_GetFWVer:
83 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETFWVER_PARAM, spt_DVBT2_GETFWVER_PARAM, buffer_arg, sizeof(buffer_arg));
84 break;
85 case DMD_DVBT2_DRV_CMD_GetReg:
86 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETREG_PARAM, spt_DVBT2_GETREG_PARAM, buffer_arg, sizeof(buffer_arg));
87 break;
88 case DMD_DVBT2_DRV_CMD_SetReg:
89 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETREG_PARAM, spt_DVBT2_SETREG_PARAM, buffer_arg, sizeof(buffer_arg));
90 break;
91 case DMD_DVBT2_DRV_CMD_SetSerialControl:
92 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETSERIALCONTROL_PARAM, spt_DVBT2_SETSERIALCONTROL_PARAM, buffer_arg, sizeof(buffer_arg));
93 break;
94 case DMD_DVBT2_DRV_CMD_SetReset:
95 u32Ret = UtopiaIoctl(pInstanceTmp, u32Cmd, pArgs);
96 break;
97 case DMD_DVBT2_DRV_CMD_SetConfig:
98 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETCONFIG_PARAM, spt_DVBT2_SETCONFIG_PARAM, buffer_arg, sizeof(buffer_arg));
99 break;
100 case DMD_DVBT2_DRV_CMD_SetActive:
101 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETACTIVE_PARAM, spt_DVBT2_SETACTIVE_PARAM, buffer_arg, sizeof(buffer_arg));
102 break;
103 case DMD_DVBT2_DRV_CMD_GetLock:
104 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETLOCK_PARAM, spt_DVBT2_GETLOCK_PARAM, buffer_arg, sizeof(buffer_arg));
105 break;
106 case DMD_DVBT2_DRV_CMD_GetSNR:
107 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETSNR_PARAM, spt_DVBT2_GETSNR_PARAM, buffer_arg, sizeof(buffer_arg));
108 break;
109
110 case DMD_DVBT2_DRV_CMD_GetPostLdpcBer:
111 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETPOSTLDPCBER_PARAM, spt_DVBT2_GETPOSTLDPCBER_PARAM, buffer_arg, sizeof(buffer_arg));
112 break;
113
114 case DMD_DVBT2_DRV_CMD_GetPreLdpcBer:
115 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETPRELDPCBERP_PARAM, spt_DVBT2_GETPRELDPCBERP_PARAM, buffer_arg, sizeof(buffer_arg));
116 break;
117
118 case DMD_DVBT2_DRV_CMD_GetPacketErr:
119 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETPACKETERRPARAM, spt_DVBT2_GETPACKETERRPARAM, buffer_arg, sizeof(buffer_arg));
120 break;
121 case DMD_DVBT2_DRV_CMD_GetL1Info:
122 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETL1INFO_PARAM, spt_DVBT2_GETL1INFO_PARAM, buffer_arg, sizeof(buffer_arg));
123 break;
124 case DMD_DVBT2_DRV_CMD_GetFreqOffset:
125 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_DVBT2_GETFREQOFFSET_PARAM, spt_DMD_DVBT2_GETFREQOFFSET_PARAM, buffer_arg, sizeof(buffer_arg));
126 break;
127 case DMD_DVBT2_DRV_CMD_SetPowerState:
128 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_SETPOWERSTATE_PARAM, spt_DVBT2_SETPOWERSTATE_PARAM, buffer_arg, sizeof(buffer_arg));
129 break;
130 case DMD_DVBT2_DRV_CMD_GetPlpBitMap:
131 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETPLPBITMAP_PARAM, spt_DVBT2_GETPLPBITMAP_PARAM, buffer_arg, sizeof(buffer_arg));
132 break;
133 case DMD_DVBT2_DRV_CMD_GetPlpGroupID:
134 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBT2_GETPLPGROUPID_PARAM, spt_DVBT2_GETPLPGROUPID_PARAM, buffer_arg, sizeof(buffer_arg));
135 break;
136 case DMD_DVBT2_DRV_CMD_SetPlpID:
137 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_DVBT2_SETPLPID_PARAM, spt_DMD_DVBT2_SETPLPID_PARAM, buffer_arg, sizeof(buffer_arg));
138 break;
139 default:
140 break;
141 }
142
143 return u32Ret;
144 // return UtopiaIoctl(pModuleDDI->pInstant,u32Cmd,arg);
145 }
146
DVBT2_adp_Init(FUtopiaIOctl * pIoctl)147 MS_U32 DVBT2_adp_Init(FUtopiaIOctl* pIoctl)
148 {
149 //original parameter area
150 UADP_SPT_BGN(&spt_DVBT2_8BYTE_PARAM[0],8);
151 UADP_SPT_FIN(&spt_DVBT2_8BYTE_PARAM[1]);
152
153 UADP_SPT_BGN(&spt_DVBT2_U32_VAL[0],sizeof(MS_U32));
154 UADP_SPT_FIN(&spt_DVBT2_U32_VAL[1]);
155
156 UADP_SPT_BGN(&spt_DVBT2_U16_VAL[0],sizeof(MS_U16));
157 UADP_SPT_FIN(&spt_DVBT2_U16_VAL[1]);
158
159 UADP_SPT_BGN(&spt_DVBT2_U8_VAL[0], sizeof(MS_U8));
160 UADP_SPT_FIN(&spt_DVBT2_U8_VAL[1]);
161
162 UADP_SPT_BGN(&spt_DMD_DVBT2_InitData_Transform[0], sizeof(DMD_DVBT2_InitData_Transform));
163 UADP_SDT_KIND(&spt_DMD_DVBT2_InitData_Transform[1], DMD_DVBT2_InitData_Transform, UADP_SDT_P2N, u8DMD_DVBT2_DSPRegInitExt, spt_DVBT2_8BYTE_PARAM);
164 UADP_SDT_KIND(&spt_DMD_DVBT2_InitData_Transform[2], DMD_DVBT2_InitData_Transform, UADP_SDT_P2N, u8DMD_DVBT2_InitExt, spt_DVBT2_8BYTE_PARAM);
165 UADP_SPT_FIN(&spt_DMD_DVBT2_InitData_Transform[3]);
166
167 UADP_SPT_BGN(&spt_DMD_DVBT2_Info[0],sizeof(DMD_DVBT2_Info));
168 UADP_SPT_FIN(&spt_DMD_DVBT2_Info[1]);
169
170 UADP_SPT_BGN(&spt_DVBT2_MSIF_Version[0],sizeof(MSIF_Version));
171 UADP_SPT_FIN(&spt_DVBT2_MSIF_Version[1]);
172
173 UADP_SPT_BGN(&spt_DMD_T2_LOCK_STATUS[0],sizeof(DMD_T2_LOCK_STATUS));
174 UADP_SPT_FIN(&spt_DMD_T2_LOCK_STATUS[1]);
175
176 //ioctl parameter passing area
177 UADP_SPT_BGN(&spt_DVBT2_INIT_PARAM[0],sizeof(DVBT2_INIT_PARAM));
178 UADP_SDT_KIND(&spt_DVBT2_INIT_PARAM[1],DVBT2_INIT_PARAM,UADP_SDT_P2N,pDMD_DVBT2_InitData,spt_DMD_DVBT2_InitData_Transform);
179 UADP_SPT_FIN(&spt_DVBT2_INIT_PARAM[2]);
180
181 UADP_SPT_BGN(&spt_DVBT2_EXIT_PARAM[0],sizeof(DVBT2_EXIT_PARAM));
182 UADP_SPT_FIN(&spt_DVBT2_EXIT_PARAM[1]);
183
184 UADP_SPT_BGN(&spt_DVBT2_SETDBGLEVEL_PARAM[0],sizeof(DVBT2_SETDBGLEVEL_PARAM));
185 UADP_SPT_FIN(&spt_DVBT2_SETDBGLEVEL_PARAM[1]);
186
187 UADP_SPT_BGN(&spt_DVBT2_GETINFO_PARAM[0],sizeof(DVBT2_GETINFO_PARAM));
188 UADP_SDT_KIND(&spt_DVBT2_GETINFO_PARAM[1],DVBT2_GETINFO_PARAM,UADP_SDT_P2N,pInfo,spt_DMD_DVBT2_Info);
189 UADP_SPT_FIN(&spt_DVBT2_GETINFO_PARAM[2]);
190
191 UADP_SPT_BGN(&spt_DVBT2_GETLIBVER_PARAM[0],sizeof(DVBT2_GETLIBVER_PARAM));
192 UADP_SDT_KIND(&spt_DVBT2_GETLIBVER_PARAM[1],DVBT2_GETLIBVER_PARAM,UADP_SDT_P2N,ppVersion,spt_DVBT2_MSIF_Version);
193 UADP_SPT_FIN(&spt_DVBT2_GETLIBVER_PARAM[2]);
194
195 UADP_SPT_BGN(&spt_DVBT2_GETFWVER_PARAM[0],sizeof(DVBT2_GETFWVER_PARAM));
196 UADP_SDT_KIND(&spt_DVBT2_GETFWVER_PARAM[1],DVBT2_GETFWVER_PARAM,UADP_SDT_P2N,ver,spt_DVBT2_U16_VAL);
197 UADP_SPT_FIN(&spt_DVBT2_GETFWVER_PARAM[2]);
198
199 UADP_SPT_BGN(&spt_DVBT2_GETREG_PARAM[0],sizeof(DVBT2_GETREG_PARAM));
200 UADP_SDT_KIND(&spt_DVBT2_GETREG_PARAM[1],DVBT2_GETREG_PARAM,UADP_SDT_P2N,pu8Data,spt_DVBT2_U8_VAL);
201 UADP_SPT_FIN(&spt_DVBT2_GETREG_PARAM[2]);
202
203 UADP_SPT_BGN(&spt_DVBT2_SETREG_PARAM[0],sizeof(DVBT2_SETREG_PARAM));
204 UADP_SPT_FIN(&spt_DVBT2_SETREG_PARAM[1]);
205
206 UADP_SPT_BGN(&spt_DVBT2_SETSERIALCONTROL_PARAM[0],sizeof(DVBT2_SETSERIALCONTROL_PARAM));
207 UADP_SPT_FIN(&spt_DVBT2_SETSERIALCONTROL_PARAM[1]);
208
209 UADP_SPT_BGN(&spt_DVBT2_SETCONFIG_PARAM[0],sizeof(DVBT2_SETCONFIG_PARAM));
210 UADP_SPT_FIN(&spt_DVBT2_SETCONFIG_PARAM[1]);
211
212 UADP_SPT_BGN(&spt_DVBT2_SETACTIVE_PARAM[0],sizeof(DVBT2_SETACTIVE_PARAM));
213 UADP_SPT_FIN(&spt_DVBT2_SETACTIVE_PARAM[1]);
214
215 UADP_SPT_BGN(&spt_DVBT2_GETLOCK_PARAM[0],sizeof(DVBT2_GETLOCK_PARAM));
216 UADP_SDT_KIND(&spt_DVBT2_GETLOCK_PARAM[1],DVBT2_GETLOCK_PARAM,UADP_SDT_P2N,eLockStatus,spt_DMD_T2_LOCK_STATUS);
217 UADP_SPT_FIN(&spt_DVBT2_GETLOCK_PARAM[2]);
218
219 #if 0
220 UADP_SPT_BGN(&spt_DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM[0],sizeof(DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM));
221 UADP_SDT_KIND(&spt_DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM[1],DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM,UADP_SDT_P2N,u16Strength,spt_DVBT2_U16_VAL);
222 UADP_SPT_FIN(&spt_DVBT2_GETSIGNALSTRENGTHWITHRFPOWER_PARAM[2]);
223
224 UADP_SPT_BGN(&spt_DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM[0],sizeof(DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM));
225 UADP_SDT_KIND(&spt_DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM[1],DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM,UADP_SDT_P2N,u16Quality,spt_DVBT2_U16_VAL);
226 UADP_SPT_FIN(&spt_DVBT2_GETSIGNALQUALITYWITHRFPOWER_PARAM[2]);
227 #endif
228
229 UADP_SPT_BGN(&spt_DVBT2_GETSNR_PARAM[0],sizeof(DVBT2_GETSNR_PARAM));
230 UADP_SDT_KIND(&spt_DVBT2_GETSNR_PARAM[1],DVBT2_GETSNR_PARAM,UADP_SDT_P2N,u16_snr100,spt_DVBT2_U16_VAL);
231 UADP_SDT_KIND(&spt_DVBT2_GETSNR_PARAM[2],DVBT2_GETSNR_PARAM,UADP_SDT_P2N,snr_cali,spt_DVBT2_U8_VAL);
232 UADP_SDT_KIND(&spt_DVBT2_GETSNR_PARAM[3],DVBT2_GETSNR_PARAM,UADP_SDT_P2N,u8_gi,spt_DVBT2_U8_VAL);
233 UADP_SPT_FIN(&spt_DVBT2_GETSNR_PARAM[4]);
234
235 UADP_SPT_BGN(&spt_DVBT2_GETPOSTLDPCBER_PARAM[0],sizeof(DVBT2_GETPOSTLDPCBER_PARAM));
236 UADP_SDT_KIND(&spt_DVBT2_GETPOSTLDPCBER_PARAM[1],DVBT2_GETPOSTLDPCBER_PARAM,UADP_SDT_P2N,BitErr_reg,spt_DVBT2_U32_VAL);
237 UADP_SDT_KIND(&spt_DVBT2_GETPOSTLDPCBER_PARAM[2],DVBT2_GETPOSTLDPCBER_PARAM,UADP_SDT_P2N,BitErrPeriod_reg,spt_DVBT2_U16_VAL);
238 UADP_SDT_KIND(&spt_DVBT2_GETPOSTLDPCBER_PARAM[3],DVBT2_GETPOSTLDPCBER_PARAM,UADP_SDT_P2N,FecType,spt_DVBT2_U16_VAL);
239 UADP_SPT_FIN(&spt_DVBT2_GETPOSTLDPCBER_PARAM[4]);
240
241 UADP_SPT_BGN(&spt_DVBT2_GETPRELDPCBERP_PARAM[0],sizeof(DVBT2_GETPRELDPCBERPARAM));
242 UADP_SDT_KIND(&spt_DVBT2_GETPRELDPCBERP_PARAM[1],DVBT2_GETPRELDPCBERPARAM,UADP_SDT_P2N,BitErr_reg,spt_DVBT2_U32_VAL);
243 UADP_SDT_KIND(&spt_DVBT2_GETPRELDPCBERP_PARAM[2],DVBT2_GETPRELDPCBERPARAM,UADP_SDT_P2N,BitErrPeriod_reg,spt_DVBT2_U16_VAL);
244 UADP_SDT_KIND(&spt_DVBT2_GETPRELDPCBERP_PARAM[3],DVBT2_GETPRELDPCBERPARAM,UADP_SDT_P2N,FecType,spt_DVBT2_U16_VAL);
245 UADP_SPT_FIN(&spt_DVBT2_GETPRELDPCBERP_PARAM[4]);
246
247 UADP_SPT_BGN(&spt_DVBT2_GETPACKETERRPARAM[0],sizeof(DVBT2_GETPACKETERRPARAM));
248 UADP_SDT_KIND(&spt_DVBT2_GETPACKETERRPARAM[1],DVBT2_GETPACKETERRPARAM,UADP_SDT_P2N,pktErr,spt_DVBT2_U16_VAL);
249 UADP_SPT_FIN(&spt_DVBT2_GETPACKETERRPARAM[2]);
250
251 UADP_SPT_BGN(&spt_DVBT2_GETL1INFO_PARAM[0],sizeof(DVBT2_GETL1INFO_PARAM));
252 UADP_SDT_KIND(&spt_DVBT2_GETL1INFO_PARAM[1],DVBT2_GETL1INFO_PARAM,UADP_SDT_P2N,u16Info,spt_DVBT2_U16_VAL);
253 UADP_SPT_FIN(&spt_DVBT2_GETL1INFO_PARAM[2]);
254
255 UADP_SPT_BGN(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[0],sizeof(DVBT2_GETFREQOFFSET_PARAM));
256 UADP_SDT_KIND(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[1],DVBT2_GETFREQOFFSET_PARAM,UADP_SDT_P2N,CfoTd_reg,spt_DVBT2_U32_VAL);
257 UADP_SDT_KIND(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[2],DVBT2_GETFREQOFFSET_PARAM,UADP_SDT_P2N,CfoFd_reg,spt_DVBT2_U32_VAL);
258 UADP_SDT_KIND(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[3],DVBT2_GETFREQOFFSET_PARAM,UADP_SDT_P2N,Icfo_reg,spt_DVBT2_U32_VAL);
259 UADP_SDT_KIND(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[4],DVBT2_GETFREQOFFSET_PARAM,UADP_SDT_P2N,fft_reg,spt_DVBT2_U8_VAL);
260 UADP_SPT_FIN(&spt_DMD_DVBT2_GETFREQOFFSET_PARAM[5]);
261
262 UADP_SPT_BGN(&spt_DVBT2_SETPOWERSTATE_PARAM[0],sizeof(DVBT2_SETPOWERSTATE_PARAM));
263 UADP_SPT_FIN(&spt_DVBT2_SETPOWERSTATE_PARAM[1]);
264
265 UADP_SPT_BGN(&spt_DVBT2_GETPLPBITMAP_PARAM[0],sizeof(DVBT2_GETPLPBITMAP_PARAM));
266 UADP_SDT_KIND(&spt_DVBT2_GETPLPBITMAP_PARAM[1],DVBT2_GETPLPBITMAP_PARAM,UADP_SDT_P2N,u8PlpBitMap,spt_DVBT2_8BYTE_PARAM);
267 UADP_SPT_FIN(&spt_DVBT2_GETPLPBITMAP_PARAM[2]);
268
269 UADP_SPT_BGN(&spt_DVBT2_GETPLPGROUPID_PARAM[0],sizeof(DVBT2_GETPLPGROUPID_PARAM));
270 UADP_SDT_KIND(&spt_DVBT2_GETPLPGROUPID_PARAM[1],DVBT2_GETPLPGROUPID_PARAM,UADP_SDT_P2N,u8GroupID,spt_DVBT2_8BYTE_PARAM);
271 UADP_SPT_FIN(&spt_DVBT2_GETPLPGROUPID_PARAM[2]);
272
273 UADP_SPT_BGN(&spt_DVBT2_GETPLPGROUPID_PARAM[0],sizeof(DVBT2_GETPLPGROUPID_PARAM));
274 UADP_SDT_KIND(&spt_DVBT2_GETPLPGROUPID_PARAM[1],DVBT2_GETPLPGROUPID_PARAM,UADP_SDT_P2N,u8GroupID,spt_DVBT2_8BYTE_PARAM);
275 UADP_SPT_FIN(&spt_DVBT2_GETPLPGROUPID_PARAM[2]);
276
277 UADP_SPT_BGN(&spt_DMD_DVBT2_SETPLPID_PARAM[0],sizeof(DMD_DVBT2_SETPLPID_PARAM));
278 UADP_SPT_FIN(&spt_DMD_DVBT2_SETPLPID_PARAM[1]);
279
280 *pIoctl= (FUtopiaIOctl)DVBT2_adp_Ioctl;
281
282 return TRUE;
283 }