1 #include <linux/kernel.h>
2 #include <linux/string.h>
3 #include <linux/slab.h>
4
5 #include "MsTypes.h"
6 #include "utopia.h"
7 #include "utopia_adp.h"
8
9 #include "drvDMD_INTERN_DVBC_v2.h"
10
11 //#include "MsOS.h"
12
13 //#include <linux/kernel.h>
14 //Top
15 UADP_STRUCT_POINTER_TABLE spt_DVBC_BOOL_VAL[5];
16 UADP_STRUCT_POINTER_TABLE spt_DVBC_U8_VAL[5];
17 UADP_STRUCT_POINTER_TABLE spt_DVBC_U16_VAL[5];
18 UADP_STRUCT_POINTER_TABLE spt_DVBC_U32_VAL[5];
19
20 //pointer parameter
21 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBC_InitData_Transform[5];
22 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBC_Info[5];
23 UADP_STRUCT_POINTER_TABLE spt_DMD_DVBC_MODULATION_TYPE[5];
24
25 UADP_STRUCT_POINTER_TABLE spt_DVBC_Dual_Public_Init_PARAM[5];
26 UADP_STRUCT_POINTER_TABLE spt_DVBC_Dual_Individual_Init_PARAM[5];
27 UADP_STRUCT_POINTER_TABLE spt_DVBC_Init_PARAM[5];
28 UADP_STRUCT_POINTER_TABLE spt_DVBC_EXIT_PARAM_PARAM[5];
29 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetDbgLevel_PARAM[5];
30 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetInfo_PARAM[5];
31 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetFWVer_PARAM[5];
32 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetDSPReg_PARAM[5];
33 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetDSPReg_PARAM[5];
34 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetReg_PARAM[5];
35 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetReg_PARAM[5];
36 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetSerialControl_PARAM[5];
37 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetConfig_Symbol_rate_list_PARAM[5];
38 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetActive_PARAM[5];
39 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetLockWithRFPower[5];
40 UADP_STRUCT_POINTER_TABLE spt_DVBC_ActiveDmdSwitch_PARAM[5];
41 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetPacketErr_PARAM[5];
42 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetCellID_PARAM[5];
43
44 UADP_STRUCT_POINTER_TABLE spt_DVBC_LOCK_STATUS_PARAM[5];
45 //bryan temp used
46 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetStatus_PARAM[7];
47 UADP_STRUCT_POINTER_TABLE spt_DVBC_SetPowerState_PARAM[5];
48
49 //waiting add
50 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetIFAGC_PARAM[5];
51 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetSNR_PARAM[5];
52 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetPostViterbiBer_PARAM[5];
53
54 #if UFO_DEMOD_DVBC_GET_AGC_INFO
55 //bryan add
56 UADP_STRUCT_POINTER_TABLE spt_DVBC_GetAGCInfo_PARAM[5];
57 #endif
58
59 UADP_STRUCT_POINTER_TABLE spt_DVBC_8BYTE_PARAM[5];
60
DVBC_adp_Ioctl(void * pInstanceTmp,MS_U32 u32Cmd,void * const pArgs)61 MS_U32 DVBC_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs)
62 {
63 MS_U32 u32Ret = 0;
64 char buffer_arg[2048];
65
66
67 switch(u32Cmd)
68 {
69 #if defined(CHIP_KAISER)||defined(CHIP_K6LITE)
70 case DMD_DVBC_DRV_CMD_Dual_Public_Init:
71 #ifdef MS_DEBUG
72 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_Dual_Public_Init\n");
73 #endif
74 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBC_Dual_Public_Init_PARAM, spt_DVBC_Dual_Public_Init_PARAM, buffer_arg, sizeof(buffer_arg));
75 break;
76
77 case DMD_DVBC_DRV_CMD_Dual_Individual_Init:
78 #ifdef MS_DEBUG
79 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_Dual_Individual_Init\n");
80 #endif
81 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBC_Dual_Individual_Init_PARAM, spt_DVBC_Dual_Individual_Init_PARAM, buffer_arg, sizeof(buffer_arg));
82 break;
83
84 #endif
85
86 case DMD_DVBC_DRV_CMD_Init:
87 #ifdef MS_DEBUG
88 printk("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_Init\n");
89 #endif
90 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DVBC_Init_PARAM, spt_DVBC_Init_PARAM, buffer_arg, sizeof(buffer_arg));
91 break;
92
93 case DMD_DVBC_DRV_CMD_Exit:
94 #ifdef MS_DEBUG
95 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_Exit\n");
96 #endif
97 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,NULL,spt_DVBC_EXIT_PARAM_PARAM, buffer_arg, sizeof(buffer_arg));
98 break;
99
100 case DMD_DVBC_DRV_CMD_SetDbgLevel:
101 #ifdef MS_DEBUG
102 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetDbgLevels\n");
103 #endif
104 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetDbgLevel_PARAM,spt_DVBC_SetDbgLevel_PARAM, buffer_arg, sizeof(buffer_arg));
105 break;
106
107 case DMD_DVBC_DRV_CMD_GetInfo:
108 #ifdef MS_DEBUG
109 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetInfo\n");
110 #endif
111 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetInfo_PARAM,spt_DVBC_GetInfo_PARAM, buffer_arg, sizeof(buffer_arg));
112 break;
113
114 case DMD_DVBC_DRV_CMD_GetLibVer:
115 #ifdef MS_DEBUG
116 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetLibVer\n");
117 #endif
118 //waiting temp mark
119 /*
120 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetLibVer_PARAM,spt_DVBC_GetLibVer_PARAM, buffer_arg, sizeof(buffer_arg));
121 u32Ret = psDVBCInstPri->fpDVBC_GetLibVer(((PDVBC_GetLibVer_PARAM)pArgs)->ppVersion);\
122 ((PDVBC_GetLibVer_PARAM)pArgs)->ret=bRet);
123 */
124 break;
125
126 case DMD_DVBC_DRV_CMD_GetFWVer:
127 #ifdef MS_DEBUG
128 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetFWVer\n");
129 #endif
130 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetFWVer_PARAM,spt_DVBC_GetFWVer_PARAM, buffer_arg, sizeof(buffer_arg));
131 break;
132
133 case DMD_DVBC_DRV_CMD_GetDSPReg:
134 #ifdef MS_DEBUG
135 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetDSPReg\n");
136 #endif
137 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetDSPReg_PARAM,spt_DVBC_GetDSPReg_PARAM, buffer_arg, sizeof(buffer_arg));
138 break;
139
140 case DMD_DVBC_DRV_CMD_SetDSPReg:
141 #ifdef MS_DEBUG
142 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetDSPReg\n");
143 #endif
144 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetDSPReg_PARAM,spt_DVBC_SetDSPReg_PARAM, buffer_arg, sizeof(buffer_arg));
145 break;
146
147 case DMD_DVBC_DRV_CMD_GetReg:
148 #ifdef MS_DEBUG
149 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetReg\n");
150 #endif
151 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetReg_PARAM,spt_DVBC_GetReg_PARAM, buffer_arg, sizeof(buffer_arg));
152 break;
153
154 case DMD_DVBC_DRV_CMD_SetReg:
155 #ifdef MS_DEBUG
156 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetReg\n");
157 #endif
158 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetReg_PARAM,spt_DVBC_SetReg_PARAM, buffer_arg, sizeof(buffer_arg));
159 break;
160
161 case DMD_DVBC_DRV_CMD_SetSerialControl:
162 #ifdef MS_DEBUG
163 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetSerialControl\n");
164 #endif
165 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetSerialControl_PARAM,spt_DVBC_SetSerialControl_PARAM, buffer_arg, sizeof(buffer_arg));
166 break;
167
168 case DMD_DVBC_DRV_CMD_SetSetConfig_symbol_rate_list:
169 #ifdef MS_DEBUG
170 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetSetConfig_symbol_rate_list\n");
171 #endif
172 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetConfig_Symbol_rate_list_PARAM,spt_DVBC_SetConfig_Symbol_rate_list_PARAM, buffer_arg, sizeof(buffer_arg));
173 break;
174
175 case DMD_DVBC_DRV_CMD_SetActive:
176 #ifdef MS_DEBUG
177 printk("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetActive\n");
178 #endif
179 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetActive_PARAM,spt_DVBC_SetActive_PARAM, buffer_arg, sizeof(buffer_arg));
180 break;
181
182 case DMD_DVBC_DRV_CMD_GetLockWithRFPower:
183 #ifdef MS_DEBUG
184 printk("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetLockWithRFPower\n");
185 #endif
186 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetLockWithRFPower,spt_DVBC_GetLockWithRFPower, buffer_arg, sizeof(buffer_arg));
187 break;
188
189 /*
190 case DMD_DVBC_DRV_CMD_GetSignalStrengthWithRFPower:
191 #ifdef MS_DEBUG
192 printk("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetSignalStrengthWithRFPower\n");
193 #endif
194 u32Ret = psDVBCInstPri->DMD_DVBC_GetSignalStrengthWithRFPower(((PDVBC_GetSignalStrengthWithRFPower_PARAM)pArgs)->u16Strength,\
195 ((PDVBC_GetSignalStrengthWithRFPower_PARAM)pArgs)->ret=bRet);
196 break;
197
198 case DMD_DVBC_DRV_CMD_GetSignalQualityWithRFPower:
199 #ifdef MS_DEBUG
200 printk("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetSignalQualityWithRFPower\n");
201 #endif
202 u32Ret = psDVBCInstPri->fpDVBC_GetSignalQualityWithRFPower((PDVBC_GetSignalStrengthWithRFPower_PARAM)pArgs->u16Strength,\
203 ((PDVBC_GetSignalStrengthWithRFPower_PARAM)pArgs->ret=bRet);
204 break;
205 */
206
207 case DMD_DVBC_DRV_CMD_ActiveDmdSwitch:
208 #ifdef MS_DEBUG
209 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_ActiveDmdSwitch\n");
210 #endif
211 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_ActiveDmdSwitch_PARAM,spt_DVBC_ActiveDmdSwitch_PARAM, buffer_arg, sizeof(buffer_arg));
212 break;
213
214 /*
215 case DMD_DVBC_DRV_CMD_GetSNR:
216 #ifdef MS_DEBUG
217 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetSNR\n");
218 #endif
219 u32Ret = psDVBCInstPri->fpDVBC_GetSNR((PDVBC_GetSNR_PARAM)pArgs->snr_reg);\
220 ((PDVBC_GetSNR_PARAM)pArgs->ret=bRet);
221 break;
222
223 case DMD_DVBC_DRV_CMD_GetPostViterbiBer:
224 #ifdef MS_DEBUG
225 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetPostViterbiBer\n");
226 #endif
227 u32Ret = psDVBCInstPri->fpDVBC_GetPostViterbiBer((PDVBC_GetPostViterbiBer_PARAM)pArgs->ber_reg);
228 ((PDVBC_GetPostViterbiBer_PARAM)pArgs->ret=bRet);
229 break;
230 */
231
232 case DMD_DVBC_DRV_CMD_GetPacketErr:
233 #ifdef MS_DEBUG
234 printf(KERN_EMERG"bryan kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetPacketErr\n");
235 #endif
236 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetPacketErr_PARAM,spt_DVBC_GetPacketErr_PARAM, buffer_arg, sizeof(buffer_arg));
237 break;
238
239 case DMD_DVBC_DRV_CMD_GetCellID:
240 #ifdef MS_DEBUG
241 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetCellID\n");
242 #endif
243 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetCellID_PARAM,spt_DVBC_GetCellID_PARAM, buffer_arg, sizeof(buffer_arg));
244 break;
245
246 case DMD_DVBC_DRV_CMD_GetStatus:
247 #ifdef MS_DEBUG
248 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetStatus\n");
249 #endif
250 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetStatus_PARAM,spt_DVBC_GetStatus_PARAM, buffer_arg, sizeof(buffer_arg));
251 break;
252
253 case DMD_DVBC_DRV_CMD_SetPowerState:
254 #ifdef MS_DEBUG
255 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_SetPowerState\n");
256 #endif
257 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_SetPowerState_PARAM,spt_DVBC_SetPowerState_PARAM, buffer_arg, sizeof(buffer_arg));
258 break;
259
260 //waiting add
261 case DMD_DVBC_DRV_CMD_GetIFAGC:
262 #ifdef MS_DEBUG
263 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetIFAGC\n");
264 #endif
265 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetIFAGC_PARAM,spt_DVBC_GetIFAGC_PARAM, buffer_arg, sizeof(buffer_arg));
266 break;
267
268 //waiting add
269 case DMD_DVBC_DRV_CMD_GetSNR:
270 #ifdef MS_DEBUG
271 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetSNR\n");
272 #endif
273 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetSNR_PARAM,spt_DVBC_GetSNR_PARAM, buffer_arg, sizeof(buffer_arg));
274 break;
275
276 //waiting add
277 case DMD_DVBC_DRV_CMD_GetPostViterbiBer:
278 #ifdef MS_DEBUG
279 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetPostViterbiBer\n");
280 #endif
281 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetPostViterbiBer_PARAM,spt_DVBC_GetPostViterbiBer_PARAM, buffer_arg, sizeof(buffer_arg));
282 break;
283
284 #ifdef UFO_DEMOD_DVBC_GET_AGC_INFO:
285 case DMD_DVBC_DRV_CMD_GetAGCInfo:
286 #ifdef MS_DEBUG
287 printf("kernal mode DVBCIoctl - DMD_DVBC_DRV_CMD_GetAGCInfo\n");
288 #endif
289 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs,spt_DVBC_GetAGCInfo_PARAM,spt_DVBC_GetAGCInfo_PARAM, buffer_arg, sizeof(buffer_arg));
290 break;
291 #endif
292
293
294
295 default:
296 break;
297
298 }
299
300 return u32Ret;
301
302 }
303
DVBC_adp_Init(FUtopiaIOctl * pIoctl)304 MS_U32 DVBC_adp_Init(FUtopiaIOctl* pIoctl)
305 {
306 //top parameter
307 UADP_SPT_BGN(&spt_DVBC_BOOL_VAL[0], sizeof(MS_BOOL));
308 UADP_SPT_FIN(&spt_DVBC_BOOL_VAL[1]);
309
310 UADP_SPT_BGN(&spt_DVBC_U8_VAL[0], sizeof(MS_U8));
311 UADP_SPT_FIN(&spt_DVBC_U8_VAL[1]);
312
313 UADP_SPT_BGN(&spt_DVBC_U16_VAL[0],sizeof(MS_U16));
314 UADP_SPT_FIN(&spt_DVBC_U16_VAL[1]);
315
316 UADP_SPT_BGN(&spt_DVBC_U32_VAL[0],sizeof(MS_U32));
317 UADP_SPT_FIN(&spt_DVBC_U32_VAL[1]);
318
319 UADP_SPT_BGN(&spt_DVBC_8BYTE_PARAM[0],8);
320 UADP_SPT_FIN(&spt_DVBC_8BYTE_PARAM[1]);
321
322
323
324
325 //pointer parameter
326 UADP_SPT_BGN(&spt_DMD_DVBC_InitData_Transform[0],sizeof(DMD_DVBC_InitData_Transform));
327 UADP_SDT_KIND(&spt_DMD_DVBC_InitData_Transform[1], DMD_DVBC_InitData_Transform, UADP_SDT_P2N, u8DMD_DVBC_DSPRegInitExt, spt_DVBC_8BYTE_PARAM);
328 UADP_SDT_KIND(&spt_DMD_DVBC_InitData_Transform[2], DMD_DVBC_InitData_Transform, UADP_SDT_P2N, u8DMD_DVBC_InitExt, spt_DVBC_8BYTE_PARAM);
329 UADP_SPT_FIN(&spt_DMD_DVBC_InitData_Transform[3]);
330
331 UADP_SPT_BGN(&spt_DMD_DVBC_Info[0],sizeof(DMD_DVBC_Info));
332 UADP_SPT_FIN(&spt_DMD_DVBC_Info[1]);
333
334 UADP_SPT_BGN(&spt_DMD_DVBC_MODULATION_TYPE[0],sizeof(DMD_DVBC_MODULATION_TYPE));
335 UADP_SPT_FIN(&spt_DMD_DVBC_MODULATION_TYPE[1]);
336
337 UADP_SPT_BGN(&spt_DVBC_LOCK_STATUS_PARAM[0],sizeof(DMD_DVBC_LOCK_STATUS));
338 UADP_SPT_FIN(&spt_DVBC_LOCK_STATUS_PARAM[1]);
339
340 //function input/output parameter
341 UADP_SPT_BGN(&spt_DVBC_Dual_Public_Init_PARAM[0], sizeof(DVBC_Dual_Public_Init_PARAM));
342 UADP_SPT_FIN(&spt_DVBC_Dual_Public_Init_PARAM[1]);
343
344 UADP_SPT_BGN(&spt_DVBC_Dual_Individual_Init_PARAM[0], sizeof(DVBC_Dual_Individual_Init_PARAM));
345 //UADP_SPT_NXT(&spt_DVBC_Dual_Individual_Init_PARAM[1], DVBC_Dual_Individual_Init_PARAM, pDMD_DVBC_InitData, spt_DMD_DVBC_InitData_Transform);
346 UADP_SDT_KIND(&spt_DVBC_Dual_Individual_Init_PARAM[1], DVBC_Dual_Individual_Init_PARAM, UADP_SDT_P2N, pDMD_DVBC_InitData, spt_DMD_DVBC_InitData_Transform);
347 UADP_SPT_FIN(&spt_DVBC_Dual_Individual_Init_PARAM[2]);
348
349 UADP_SPT_BGN(&spt_DVBC_Init_PARAM[0],sizeof(DVBC_Init_PARAM));
350 //UADP_SPT_NXT(&spt_DVBC_Init_PARAM[1], DVBC_Init_PARAM, pDMD_DVBC_InitData, spt_DMD_DVBC_InitData_Transform);
351 UADP_SDT_KIND(&spt_DVBC_Init_PARAM[1], DVBC_Init_PARAM, UADP_SDT_P2N, pDMD_DVBC_InitData, spt_DMD_DVBC_InitData_Transform);
352 UADP_SPT_FIN(&spt_DVBC_Init_PARAM[2]);
353
354 UADP_SPT_BGN(&spt_DVBC_EXIT_PARAM_PARAM[0],sizeof(DVBC_EXIT_PARAM_PARAM));
355 UADP_SPT_FIN(&spt_DVBC_EXIT_PARAM_PARAM[1]);
356
357 UADP_SPT_BGN(&spt_DVBC_SetDbgLevel_PARAM[0],sizeof(DVBC_SetDbgLevel_PARAM));
358 UADP_SPT_FIN(&spt_DVBC_SetDbgLevel_PARAM[1]);
359
360 UADP_SPT_BGN(&spt_DVBC_GetInfo_PARAM[0],sizeof(DVBC_GetInfo_PARAM));
361 //UADP_SPT_NXT(&spt_DVBC_GetInfo_PARAM[1],DVBC_GetInfo_PARAM,ret_info,spt_DMD_DVBC_Info);
362 UADP_SDT_KIND(&spt_DVBC_GetInfo_PARAM[1],DVBC_GetInfo_PARAM,UADP_SDT_P2N,ret_info,spt_DMD_DVBC_Info);
363 UADP_SPT_FIN(&spt_DVBC_GetInfo_PARAM[2]);
364
365 UADP_SPT_BGN(&spt_DVBC_GetFWVer_PARAM[0],sizeof(DVBC_GetFWVer_PARAM));
366 //UADP_SPT_NXT(&spt_DVBC_GetFWVer_PARAM[1],DVBC_GetFWVer_PARAM,ver,spt_DVBC_U16_VAL);
367 UADP_SDT_KIND(&spt_DVBC_GetFWVer_PARAM[1],DVBC_GetFWVer_PARAM,UADP_SDT_P2N,ver,spt_DVBC_U16_VAL);
368 UADP_SPT_FIN(&spt_DVBC_GetFWVer_PARAM[2]);
369
370 UADP_SPT_BGN(&spt_DVBC_GetDSPReg_PARAM[0],sizeof(DVBC_GetDSPReg_PARAM));
371 //UADP_SPT_NXT(&spt_DVBC_GetDSPReg_PARAM[1],DVBC_GetDSPReg_PARAM,pu8Data,spt_DVBC_U8_VAL);
372 UADP_SDT_KIND(&spt_DVBC_GetDSPReg_PARAM[1],DVBC_GetDSPReg_PARAM,UADP_SDT_P2N,pu8Data,spt_DVBC_U8_VAL);
373 UADP_SPT_FIN(&spt_DVBC_GetDSPReg_PARAM[2]);
374
375 UADP_SPT_BGN(&spt_DVBC_SetDSPReg_PARAM[0],sizeof(DVBC_SetDSPReg_PARAM));
376 UADP_SPT_FIN(&spt_DVBC_SetDSPReg_PARAM[1]);
377
378 UADP_SPT_BGN(&spt_DVBC_GetReg_PARAM[0],sizeof(DVBC_GetReg_PARAM));
379 //UADP_SPT_NXT(&spt_DVBC_GetReg_PARAM[1],DVBC_GetReg_PARAM,pu8Data,spt_DVBC_U8_VAL);
380 UADP_SDT_KIND(&spt_DVBC_GetReg_PARAM[1],DVBC_GetReg_PARAM,UADP_SDT_P2N,pu8Data,spt_DVBC_U8_VAL);
381 UADP_SPT_FIN(&spt_DVBC_GetReg_PARAM[2]);
382
383 UADP_SPT_BGN(&spt_DVBC_SetReg_PARAM[0],sizeof(DVBC_SetReg_PARAM));
384 UADP_SPT_FIN(&spt_DVBC_SetReg_PARAM[1]);
385
386 UADP_SPT_BGN(&spt_DVBC_SetSerialControl_PARAM[0],sizeof(DVBC_SetSerialControl_PARAM));
387 UADP_SPT_FIN(&spt_DVBC_SetSerialControl_PARAM[1]);
388
389 UADP_SPT_BGN(&spt_DVBC_SetConfig_Symbol_rate_list_PARAM[0],sizeof(DVBC_SetConfig_Symbol_rate_list_PARAM));
390 // oga add 20160106
391 UADP_SDT_KIND(&spt_DVBC_SetConfig_Symbol_rate_list_PARAM[1], DVBC_SetConfig_Symbol_rate_list_PARAM,UADP_SDT_P2N,pu16_symbol_rate_list,spt_DVBC_U16_VAL);
392 UADP_SPT_FIN(&spt_DVBC_SetConfig_Symbol_rate_list_PARAM[2]);
393
394 UADP_SPT_BGN(&spt_DVBC_SetActive_PARAM[0],sizeof(DVBC_SetActive_PARAM));
395 UADP_SPT_FIN(&spt_DVBC_SetActive_PARAM[1]);
396
397 UADP_SPT_BGN(&spt_DVBC_GetLockWithRFPower[0],sizeof(DVBC_GetLockWithRFPower));
398 //UADP_SPT_NXT(&spt_DVBC_GetLockWithRFPower_Transform[1],DVBC_GetLockWithRFPower_Transform,eLockStatus,spt_DVBC_LOCK_STATUS_PARAM);
399 UADP_SDT_KIND(&spt_DVBC_GetLockWithRFPower[1],DVBC_GetLockWithRFPower,UADP_SDT_P2N,eLockStatus,spt_DVBC_LOCK_STATUS_PARAM);
400 UADP_SPT_FIN(&spt_DVBC_GetLockWithRFPower[2]);
401
402 UADP_SPT_BGN(&spt_DVBC_ActiveDmdSwitch_PARAM[0],sizeof(DVBC_ActiveDmdSwitch_PARAM));
403 UADP_SPT_FIN(&spt_DVBC_ActiveDmdSwitch_PARAM[1]);
404
405 UADP_SPT_BGN(&spt_DVBC_GetPacketErr_PARAM[0],sizeof(DVBC_GetPacketErr_PARAM));
406 //UADP_SPT_NXT(&spt_DVBC_GetPacketErr_PARAM[1],DVBC_GetPacketErr_PARAM,pktErr,spt_DVBC_U16_VAL);
407 UADP_SDT_KIND(&spt_DVBC_GetPacketErr_PARAM[1],DVBC_GetPacketErr_PARAM,UADP_SDT_P2N,pktErr,spt_DVBC_U16_VAL);
408 UADP_SPT_FIN(&spt_DVBC_GetPacketErr_PARAM[2]);
409
410 UADP_SPT_BGN(&spt_DVBC_GetCellID_PARAM[0],sizeof(DVBC_GetCellID_PARAM));
411 //UADP_SPT_NXT(&spt_DVBC_GetCellID_PARAM[1],DVBC_GetCellID_PARAM,u16CellID,spt_DVBC_U16_VAL);
412 UADP_SDT_KIND(&spt_DVBC_GetCellID_PARAM[1],DVBC_GetCellID_PARAM,UADP_SDT_P2N,u16CellID,spt_DVBC_U16_VAL);
413 UADP_SPT_FIN(&spt_DVBC_GetCellID_PARAM[2]);
414
415 //bryan temp debug
416 UADP_SPT_BGN(&spt_DVBC_GetStatus_PARAM[0],sizeof(DVBC_GetStatus_PARAM));
417 //UADP_SPT_NXT(&spt_DVBC_GetStatus_PARAM_Transform[1],DVBC_GetStatus_PARAM_Transform,pQAMMode,spt_DMD_DVBC_MODULATION_TYPE);
418 //UADP_SPT_NXT(&spt_DVBC_GetStatus_PARAM_Transform[2],DVBC_GetStatus_PARAM_Transform,u16SymbolRate,spt_DVBC_U16_VAL);
419 UADP_SDT_KIND(&spt_DVBC_GetStatus_PARAM[1],DVBC_GetStatus_PARAM,UADP_SDT_P2N,pQAMMode,spt_DMD_DVBC_MODULATION_TYPE);
420 UADP_SDT_KIND(&spt_DVBC_GetStatus_PARAM[2],DVBC_GetStatus_PARAM,UADP_SDT_P2N,u16SymbolRate,spt_DVBC_U16_VAL);
421 UADP_SDT_KIND(&spt_DVBC_GetStatus_PARAM[3],DVBC_GetStatus_PARAM,UADP_SDT_P2N,config_Fc_reg,spt_DVBC_U32_VAL);
422 UADP_SDT_KIND(&spt_DVBC_GetStatus_PARAM[4],DVBC_GetStatus_PARAM,UADP_SDT_P2N,Fc_over_Fs_reg,spt_DVBC_U32_VAL);
423 UADP_SDT_KIND(&spt_DVBC_GetStatus_PARAM[5],DVBC_GetStatus_PARAM,UADP_SDT_P2N,Cfo_offset_reg,spt_DVBC_U16_VAL);
424 UADP_SPT_FIN(&spt_DVBC_GetStatus_PARAM[6]);
425
426
427 UADP_SPT_BGN(&spt_DVBC_SetPowerState_PARAM[0],sizeof(DVBC_SetPowerState_PARAM));
428 UADP_SPT_FIN(&spt_DVBC_SetPowerState_PARAM[1]);
429
430
431 //waiting add
432 //UADP_SPT_BGN(&spt_DVBC_FreqOffset_PARAM[0],sizeof(DMD_DVBC_FreqOffset));
433 //UADP_SPT_FIN(&spt_DVBC_FreqOffset_PARAM[1]);
434
435 //waiting add
436 UADP_SPT_BGN(&spt_DVBC_GetIFAGC_PARAM[0],sizeof(DVBC_GetIFAGC_PARAM));
437 UADP_SDT_KIND(&spt_DVBC_GetIFAGC_PARAM[1],DVBC_GetIFAGC_PARAM,UADP_SDT_P2N,ifagc_reg,spt_DVBC_U16_VAL);
438 UADP_SDT_KIND(&spt_DVBC_GetIFAGC_PARAM[2],DVBC_GetIFAGC_PARAM,UADP_SDT_P2N,ifagc_reg_lsb,spt_DVBC_U16_VAL);
439 UADP_SDT_KIND(&spt_DVBC_GetIFAGC_PARAM[3],DVBC_GetIFAGC_PARAM,UADP_SDT_P2N,ifagc_err_reg,spt_DVBC_U16_VAL);
440 UADP_SPT_FIN(&spt_DVBC_GetIFAGC_PARAM[4]);
441
442 //waiting add
443 UADP_SPT_BGN(&spt_DVBC_GetSNR_PARAM[0],sizeof(DVBC_GetSNR_PARAM));
444 UADP_SDT_KIND(&spt_DVBC_GetSNR_PARAM[1],DVBC_GetSNR_PARAM,UADP_SDT_P2N,snr_reg,spt_DVBC_U16_VAL);
445 UADP_SPT_FIN(&spt_DVBC_GetSNR_PARAM[2]);
446
447 //waiting add
448 UADP_SPT_BGN(&spt_DVBC_GetPostViterbiBer_PARAM[0],sizeof(DVBC_GetPostViterbiBer_PARAM));
449 UADP_SDT_KIND(&spt_DVBC_GetPostViterbiBer_PARAM[1],DVBC_GetPostViterbiBer_PARAM,UADP_SDT_P2N,BitErr_reg,spt_DVBC_U32_VAL);
450 UADP_SDT_KIND(&spt_DVBC_GetPostViterbiBer_PARAM[2],DVBC_GetPostViterbiBer_PARAM,UADP_SDT_P2N,BitErrPeriod_reg,spt_DVBC_U16_VAL);
451 UADP_SPT_FIN(&spt_DVBC_GetPostViterbiBer_PARAM[3]);
452
453 //bryan add
454 #if UFO_DEMOD_DVBC_GET_AGC_INFO
455 UADP_SPT_BGN(&spt_DVBC_GetAGCInfo_PARAM[0],sizeof(DVBC_GetAGCInfo_PARAM));
456 UADP_SDT_KIND(&spt_DVBC_GetAGCInfo_PARAM[1],DVBC_GetAGCInfo_PARAM,UADP_SDT_P2N,pu16Data,spt_DVBC_U16_VAL);
457 UADP_SPT_FIN(&spt_DVBC_GetAGCInfo_PARAM[2]);
458 #endif
459
460 *pIoctl= (FUtopiaIOctl)DVBC_adp_Ioctl;
461
462 return TRUE;
463 }
464
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