xref: /utopia/UTPA2-700.0.x/modules/demodulator/utopia_adaption/demod/DMD_ISDBT_adp.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi #include <linux/kernel.h>
2*53ee8cc1Swenshuai.xi #include <linux/string.h>
3*53ee8cc1Swenshuai.xi #include <linux/slab.h>
4*53ee8cc1Swenshuai.xi 
5*53ee8cc1Swenshuai.xi #include "utopia.h"
6*53ee8cc1Swenshuai.xi #include "utopia_adp.h"
7*53ee8cc1Swenshuai.xi 
8*53ee8cc1Swenshuai.xi #include "drvDMD_ISDBT_v2.h"
9*53ee8cc1Swenshuai.xi 
10*53ee8cc1Swenshuai.xi #ifdef MS_DEBUG
11*53ee8cc1Swenshuai.xi #define DMD_DBG(x)          (x)
12*53ee8cc1Swenshuai.xi #else
13*53ee8cc1Swenshuai.xi #define DMD_DBG(x)          //(x)
14*53ee8cc1Swenshuai.xi #endif
15*53ee8cc1Swenshuai.xi 
16*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_PTR_VAL[5];
17*53ee8cc1Swenshuai.xi 
18*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_DBG_LEVEL_PARAM[5];
19*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_Info[5];
20*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_INFO_PARAM[5];
21*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_ID_PARAM[5];
22*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_InitData[6];
23*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_INIT_PARAM[5];
24*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_EXIT_PARAM[5];
25*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_CONFIG_PARAM[5];
26*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_POWER_STATE_PARAM[5];
27*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_LOCK_PARAM[5];
28*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_ModulationMode[5];
29*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[5];
30*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[5];
31*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[5];
32*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SnrData[5];
33*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SNR_PARAM[5];
34*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_BerData[5];
35*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_PKT_ERR_PARAM[5];
36*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_BER_PARAM[5];
37*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_CfoData[5];
38*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[5];
39*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[5];
40*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[5];
41*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[5];
42*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GPIO_LEVEL_PARAM[5];
43*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[5];
44*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_DO_IQ_SWAP_PARAM[5];
45*53ee8cc1Swenshuai.xi UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_REG_PARAM[5];
46*53ee8cc1Swenshuai.xi 
47*53ee8cc1Swenshuai.xi 
48*53ee8cc1Swenshuai.xi MS_U32 DMD_ISDBT_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs);
49*53ee8cc1Swenshuai.xi 
DMD_ISDBT_adp_Init(FUtopiaIOctl * pIoctl)50*53ee8cc1Swenshuai.xi MS_U32 DMD_ISDBT_adp_Init(FUtopiaIOctl* pIoctl)
51*53ee8cc1Swenshuai.xi {
52*53ee8cc1Swenshuai.xi     printk("DMD_ISDBT_adp_Init\n");
53*53ee8cc1Swenshuai.xi 
54*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_PTR_VAL[0], 8);
55*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_PTR_VAL[1]);
56*53ee8cc1Swenshuai.xi 
57*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_DBG_LEVEL_PARAM[0], sizeof(ISDBT_DBG_LEVEL_PARAM));
58*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_DBG_LEVEL_PARAM[1]);
59*53ee8cc1Swenshuai.xi 
60*53ee8cc1Swenshuai.xi     UADP_SDT_BGN(&spt_DMD_ISDBT_Info[0], sizeof(DMD_ISDBT_Info));
61*53ee8cc1Swenshuai.xi     UADP_SDT_FIN(&spt_DMD_ISDBT_Info[1]);
62*53ee8cc1Swenshuai.xi     UADP_SDT_BGN(&spt_DMD_ISDBT_GET_INFO_PARAM[0], sizeof(ISDBT_GET_INFO_PARAM));
63*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_GET_INFO_PARAM[1], ISDBT_GET_INFO_PARAM,UADP_SDT_P2N,pInfo, spt_DMD_ISDBT_Info);
64*53ee8cc1Swenshuai.xi     UADP_SDT_FIN(&spt_DMD_ISDBT_GET_INFO_PARAM[2]);
65*53ee8cc1Swenshuai.xi 
66*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_ID_PARAM[0], sizeof(ISDBT_ID_PARAM));
67*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_ID_PARAM[1]);
68*53ee8cc1Swenshuai.xi 
69*53ee8cc1Swenshuai.xi     UADP_SDT_BGN(&spt_DMD_ISDBT_InitData[0], sizeof(DMD_ISDBT_InitData));
70*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[1], DMD_ISDBT_InitData, UADP_SDT_P2N, u8DMD_ISDBT_DSPRegInitExt, spt_DMD_ISDBT_PTR_VAL);
71*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[2], DMD_ISDBT_InitData, UADP_SDT_P2N, u8DMD_ISDBT_InitExt, spt_DMD_ISDBT_PTR_VAL);
72*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[3], DMD_ISDBT_InitData, UADP_SDT_AT, I2C_WriteBytes, spt_DMD_ISDBT_PTR_VAL);
73*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[4], DMD_ISDBT_InitData, UADP_SDT_AT, I2C_ReadBytes, spt_DMD_ISDBT_PTR_VAL);
74*53ee8cc1Swenshuai.xi     UADP_SDT_FIN(&spt_DMD_ISDBT_InitData[5]);
75*53ee8cc1Swenshuai.xi     UADP_SDT_BGN(&spt_DMD_ISDBT_INIT_PARAM[0], sizeof(ISDBT_INIT_PARAM));
76*53ee8cc1Swenshuai.xi     UADP_SDT_KIND(&spt_DMD_ISDBT_INIT_PARAM[1], ISDBT_INIT_PARAM,UADP_SDT_P2N,pDMD_ISDBT_InitData, spt_DMD_ISDBT_InitData);
77*53ee8cc1Swenshuai.xi     UADP_SDT_FIN(&spt_DMD_ISDBT_INIT_PARAM[2]);
78*53ee8cc1Swenshuai.xi 
79*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_SET_CONFIG_PARAM[0], sizeof(ISDBT_SET_CONFIG_PARAM));
80*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_SET_CONFIG_PARAM[1]);
81*53ee8cc1Swenshuai.xi 
82*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_SET_POWER_STATE_PARAM[0], sizeof(ISDBT_SET_POWER_STATE_PARAM));
83*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_SET_POWER_STATE_PARAM[1]);
84*53ee8cc1Swenshuai.xi 
85*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_LOCK_PARAM[0], sizeof(ISDBT_GET_LOCK_PARAM));
86*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_LOCK_PARAM[1]);
87*53ee8cc1Swenshuai.xi 
88*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_ModulationMode[0], sizeof(sISDBT_MODULATION_MODE));
89*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_ModulationMode[1])
90*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[0], sizeof(ISDBT_GET_MODULATION_MODE_PARAM));
91*53ee8cc1Swenshuai.xi     UADP_SPT_NXT(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[1], ISDBT_GET_MODULATION_MODE_PARAM, IsdbtModulationMode, spt_DMD_ISDBT_ModulationMode);
92*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[2]);
93*53ee8cc1Swenshuai.xi 
94*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[0], sizeof(ISDBT_GET_SIGNAL_STRENGTH_PARAM));
95*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[1]);
96*53ee8cc1Swenshuai.xi 
97*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[0], sizeof(ISDBT_GET_SIGNAL_QUALITY_PARAM));
98*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[1]);
99*53ee8cc1Swenshuai.xi 
100*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_SnrData[0], sizeof(DMD_ISDBT_SNR_DATA));
101*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_SnrData[1]);
102*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SNR_PARAM[0], sizeof(ISDBT_GET_SNR_PARAM));
103*53ee8cc1Swenshuai.xi     UADP_SPT_NXT(&spt_DMD_ISDBT_GET_SNR_PARAM[1], ISDBT_GET_SNR_PARAM, snr, spt_DMD_ISDBT_SnrData);
104*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SNR_PARAM[2]);
105*53ee8cc1Swenshuai.xi 
106*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_BerData[0], sizeof(DMD_ISDBT_GET_BER_VALUE));
107*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_BerData[1]);
108*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_BER_PARAM[0], sizeof(ISDBT_GET_BER_PARAM));
109*53ee8cc1Swenshuai.xi     UADP_SPT_NXT(&spt_DMD_ISDBT_GET_BER_PARAM[1], ISDBT_GET_BER_PARAM, ber, spt_DMD_ISDBT_BerData);
110*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_BER_PARAM[2]);
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_PKT_ERR_PARAM[0], sizeof(ISDBT_READ_PKT_ERR_PARAM));
113*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_PKT_ERR_PARAM[1]);
114*53ee8cc1Swenshuai.xi 
115*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[0], sizeof(ISDBT_GET_FREQ_OFFSET_PARAM));
116*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[2]);
117*53ee8cc1Swenshuai.xi 
118*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[0], sizeof(ISDBT_SET_SERIAL_CONTROL_PARAM));
119*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[1]);
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[0], sizeof(ISDBT_IIC_BYPASS_MODE_PARAM));
122*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[1]);
123*53ee8cc1Swenshuai.xi 
124*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[0], sizeof(ISDBT_SWITCH_SSPI_GPIO_PARAM));
125*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[1]);
126*53ee8cc1Swenshuai.xi 
127*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GPIO_LEVEL_PARAM[0], sizeof(ISDBT_GPIO_LEVEL_PARAM));
128*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GPIO_LEVEL_PARAM[1]);
129*53ee8cc1Swenshuai.xi 
130*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[0], sizeof(ISDBT_GPIO_OUT_ENABLE_PARAM));
131*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[1]);
132*53ee8cc1Swenshuai.xi 
133*53ee8cc1Swenshuai.xi     UADP_SPT_BGN(&spt_DMD_ISDBT_REG_PARAM[0], sizeof(ISDBT_REG_PARAM));
134*53ee8cc1Swenshuai.xi     UADP_SPT_FIN(&spt_DMD_ISDBT_REG_PARAM[1]);
135*53ee8cc1Swenshuai.xi 
136*53ee8cc1Swenshuai.xi     *pIoctl= (FUtopiaIOctl)DMD_ISDBT_adp_Ioctl;
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi     return 0;
139*53ee8cc1Swenshuai.xi }
140*53ee8cc1Swenshuai.xi 
DMD_ISDBT_adp_Ioctl(void * pInstanceTmp,MS_U32 u32Cmd,void * const pArgs)141*53ee8cc1Swenshuai.xi MS_U32 DMD_ISDBT_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs)
142*53ee8cc1Swenshuai.xi {
143*53ee8cc1Swenshuai.xi     MS_U32 u32Ret = 0;
144*53ee8cc1Swenshuai.xi     char buffer_arg[2048];
145*53ee8cc1Swenshuai.xi 
146*53ee8cc1Swenshuai.xi     switch(u32Cmd)
147*53ee8cc1Swenshuai.xi     {
148*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_SetDbgLevel:
149*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetDbgLevel\n"));
150*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_DBG_LEVEL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
151*53ee8cc1Swenshuai.xi             break;
152*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetInfo:
153*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetInfo\n"));
154*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_DMD_ISDBT_GET_INFO_PARAM, buffer_arg, sizeof(buffer_arg));
155*53ee8cc1Swenshuai.xi             break;
156*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetLibVer:
157*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetLibVer\n"));
158*53ee8cc1Swenshuai.xi             u32Ret = TRUE;
159*53ee8cc1Swenshuai.xi             break;
160*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_Init:
161*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_Init:
162*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Init\n"));
163*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_INIT_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
164*53ee8cc1Swenshuai.xi             break;
165*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_Exit:
166*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_Exit:
167*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Exit\n"));
168*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_ID_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
169*53ee8cc1Swenshuai.xi             break;
170*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetConfig:
171*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetConfig:
172*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBT_adp_Ioctl - MDrv_DMD_ISDBT_MD_GetConfig\n"));
173*53ee8cc1Swenshuai.xi 	        u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_INIT_PARAM, spt_DMD_ISDBT_INIT_PARAM, buffer_arg, sizeof(buffer_arg));
174*53ee8cc1Swenshuai.xi             break;
175*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_AdvSetConfig:
176*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_AdvSetConfig:
177*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetConfig\n"));
178*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_CONFIG_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
179*53ee8cc1Swenshuai.xi             break;
180*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_SetPowerState:
181*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_SetPowerState:
182*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetPowerState\n"));
183*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_POWER_STATE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
184*53ee8cc1Swenshuai.xi             break;
185*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetLock:
186*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetLock:
187*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetLock\n"));
188*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_LOCK_PARAM, spt_DMD_ISDBT_GET_LOCK_PARAM, buffer_arg, sizeof(buffer_arg));
189*53ee8cc1Swenshuai.xi             break;
190*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetModulationMode:
191*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetModulationMode:
192*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetModulationMode\n"));
193*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM, spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM, buffer_arg, sizeof(buffer_arg));
194*53ee8cc1Swenshuai.xi             break;
195*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetSignalStrength:
196*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetSignalStrength:
197*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSignalStrength\n"));
198*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM, spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM, buffer_arg, sizeof(buffer_arg));
199*53ee8cc1Swenshuai.xi             break;
200*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetSignalQuality:
201*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetSignalQuality:
202*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSignalQuality\n"));
203*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM, spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM, buffer_arg, sizeof(buffer_arg));
204*53ee8cc1Swenshuai.xi             break;
205*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetSNR:
206*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetSNR:
207*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSNR\n"));
208*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SNR_PARAM, spt_DMD_ISDBT_GET_SNR_PARAM, buffer_arg, sizeof(buffer_arg));
209*53ee8cc1Swenshuai.xi             break;
210*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GET_PKT_ERR:
211*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_Get_PKT_ERR:
212*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Read_uCPKT_ERR\n"));
213*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_PKT_ERR_PARAM, spt_DMD_ISDBT_GET_PKT_ERR_PARAM, buffer_arg, sizeof(buffer_arg));
214*53ee8cc1Swenshuai.xi             break;
215*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetPreViterbiBer:
216*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetPreViterbiBer:
217*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetPreViterbiBer\n"));
218*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_BER_PARAM, spt_DMD_ISDBT_GET_BER_PARAM, buffer_arg, sizeof(buffer_arg));
219*53ee8cc1Swenshuai.xi             break;
220*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetPostViterbiBer:
221*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetPostViterbiBer:
222*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetPostViterbiBer\n"));
223*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_BER_PARAM, spt_DMD_ISDBT_GET_BER_PARAM, buffer_arg, sizeof(buffer_arg));
224*53ee8cc1Swenshuai.xi             break;
225*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetFreqOffset:
226*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetFreqOffset:
227*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - DMD_ISDBT_DRV_CMD_GetFreqOffset\n"));
228*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM, spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM, buffer_arg, sizeof(buffer_arg));
229*53ee8cc1Swenshuai.xi             break;
230*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_SetSerialControl:
231*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_SetSerialControl:
232*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetSerialControl\n"));
233*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
234*53ee8cc1Swenshuai.xi             break;
235*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_IIC_BYPASS_MODE:
236*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_IIC_BYPASS_MODE:
237*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_IIC_BYPASS_MODE\n"));
238*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
239*53ee8cc1Swenshuai.xi             break;
240*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_SWITCH_SSPI_GPIO:
241*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_SWITCH_SSPI_GPIO:
242*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SWITCH_SSPI_GPIO\n"));
243*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
244*53ee8cc1Swenshuai.xi             break;
245*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GPIO_GET_LEVEL:
246*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GPIO_GET_LEVEL:
247*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_GET_LEVEL\n"));
248*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, buffer_arg, sizeof(buffer_arg));
249*53ee8cc1Swenshuai.xi             break;
250*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GPIO_SET_LEVEL:
251*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GPIO_SET_LEVEL:
252*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_SET_LEVEL\n"));
253*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
254*53ee8cc1Swenshuai.xi             break;
255*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GPIO_OUT_ENABLE:
256*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GPIO_OUT_ENABLE:
257*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_OUT_ENABLE\n"));
258*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
259*53ee8cc1Swenshuai.xi             break;
260*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_DoIQSwap:
261*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_DoIQSwap:
262*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBT_adp_Ioctl - MDrv_DMD_ISDBT_MD_DO_IQ_SWAP\n"));
263*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_DO_IQ_SWAP_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
264*53ee8cc1Swenshuai.xi             break;
265*53ee8cc1Swenshuai.xi 
266*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_GetReg:
267*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_GetReg:
268*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetReg\n"));
269*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_REG_PARAM, spt_DMD_ISDBT_REG_PARAM, buffer_arg, sizeof(buffer_arg));
270*53ee8cc1Swenshuai.xi             break;
271*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_SetReg:
272*53ee8cc1Swenshuai.xi         case DMD_ISDBT_DRV_CMD_MD_SetReg:
273*53ee8cc1Swenshuai.xi             DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetReg\n"));
274*53ee8cc1Swenshuai.xi             u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_REG_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
275*53ee8cc1Swenshuai.xi             break;
276*53ee8cc1Swenshuai.xi         default:
277*53ee8cc1Swenshuai.xi             break;
278*53ee8cc1Swenshuai.xi     }
279*53ee8cc1Swenshuai.xi 
280*53ee8cc1Swenshuai.xi     return u32Ret;
281*53ee8cc1Swenshuai.xi }
282