1 #include <linux/kernel.h>
2 #include <linux/string.h>
3 #include <linux/slab.h>
4
5 #include "utopia.h"
6 #include "utopia_adp.h"
7
8 #include "drvDMD_ISDBT_v2.h"
9
10 #ifdef MS_DEBUG
11 #define DMD_DBG(x) (x)
12 #else
13 #define DMD_DBG(x) //(x)
14 #endif
15
16 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_PTR_VAL[5];
17
18 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_DBG_LEVEL_PARAM[5];
19 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_Info[5];
20 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_INFO_PARAM[5];
21 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_ID_PARAM[5];
22 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_InitData[6];
23 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_INIT_PARAM[5];
24 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_EXIT_PARAM[5];
25 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_CONFIG_PARAM[5];
26 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_POWER_STATE_PARAM[5];
27 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_LOCK_PARAM[5];
28 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_ModulationMode[5];
29 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[5];
30 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[5];
31 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[5];
32 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SnrData[5];
33 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_SNR_PARAM[5];
34 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_BerData[5];
35 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_PKT_ERR_PARAM[5];
36 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_BER_PARAM[5];
37 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_CfoData[5];
38 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[5];
39 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[5];
40 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[5];
41 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[5];
42 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GPIO_LEVEL_PARAM[5];
43 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[5];
44 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_DO_IQ_SWAP_PARAM[5];
45 UADP_STRUCT_POINTER_TABLE spt_DMD_ISDBT_REG_PARAM[5];
46
47
48 MS_U32 DMD_ISDBT_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs);
49
DMD_ISDBT_adp_Init(FUtopiaIOctl * pIoctl)50 MS_U32 DMD_ISDBT_adp_Init(FUtopiaIOctl* pIoctl)
51 {
52 printk("DMD_ISDBT_adp_Init\n");
53
54 UADP_SPT_BGN(&spt_DMD_ISDBT_PTR_VAL[0], 8);
55 UADP_SPT_FIN(&spt_DMD_ISDBT_PTR_VAL[1]);
56
57 UADP_SPT_BGN(&spt_DMD_ISDBT_DBG_LEVEL_PARAM[0], sizeof(ISDBT_DBG_LEVEL_PARAM));
58 UADP_SPT_FIN(&spt_DMD_ISDBT_DBG_LEVEL_PARAM[1]);
59
60 UADP_SDT_BGN(&spt_DMD_ISDBT_Info[0], sizeof(DMD_ISDBT_Info));
61 UADP_SDT_FIN(&spt_DMD_ISDBT_Info[1]);
62 UADP_SDT_BGN(&spt_DMD_ISDBT_GET_INFO_PARAM[0], sizeof(ISDBT_GET_INFO_PARAM));
63 UADP_SDT_KIND(&spt_DMD_ISDBT_GET_INFO_PARAM[1], ISDBT_GET_INFO_PARAM,UADP_SDT_P2N,pInfo, spt_DMD_ISDBT_Info);
64 UADP_SDT_FIN(&spt_DMD_ISDBT_GET_INFO_PARAM[2]);
65
66 UADP_SPT_BGN(&spt_DMD_ISDBT_ID_PARAM[0], sizeof(ISDBT_ID_PARAM));
67 UADP_SPT_FIN(&spt_DMD_ISDBT_ID_PARAM[1]);
68
69 UADP_SDT_BGN(&spt_DMD_ISDBT_InitData[0], sizeof(DMD_ISDBT_InitData));
70 UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[1], DMD_ISDBT_InitData, UADP_SDT_P2N, u8DMD_ISDBT_DSPRegInitExt, spt_DMD_ISDBT_PTR_VAL);
71 UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[2], DMD_ISDBT_InitData, UADP_SDT_P2N, u8DMD_ISDBT_InitExt, spt_DMD_ISDBT_PTR_VAL);
72 UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[3], DMD_ISDBT_InitData, UADP_SDT_AT, I2C_WriteBytes, spt_DMD_ISDBT_PTR_VAL);
73 UADP_SDT_KIND(&spt_DMD_ISDBT_InitData[4], DMD_ISDBT_InitData, UADP_SDT_AT, I2C_ReadBytes, spt_DMD_ISDBT_PTR_VAL);
74 UADP_SDT_FIN(&spt_DMD_ISDBT_InitData[5]);
75 UADP_SDT_BGN(&spt_DMD_ISDBT_INIT_PARAM[0], sizeof(ISDBT_INIT_PARAM));
76 UADP_SDT_KIND(&spt_DMD_ISDBT_INIT_PARAM[1], ISDBT_INIT_PARAM,UADP_SDT_P2N,pDMD_ISDBT_InitData, spt_DMD_ISDBT_InitData);
77 UADP_SDT_FIN(&spt_DMD_ISDBT_INIT_PARAM[2]);
78
79 UADP_SPT_BGN(&spt_DMD_ISDBT_SET_CONFIG_PARAM[0], sizeof(ISDBT_SET_CONFIG_PARAM));
80 UADP_SPT_FIN(&spt_DMD_ISDBT_SET_CONFIG_PARAM[1]);
81
82 UADP_SPT_BGN(&spt_DMD_ISDBT_SET_POWER_STATE_PARAM[0], sizeof(ISDBT_SET_POWER_STATE_PARAM));
83 UADP_SPT_FIN(&spt_DMD_ISDBT_SET_POWER_STATE_PARAM[1]);
84
85 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_LOCK_PARAM[0], sizeof(ISDBT_GET_LOCK_PARAM));
86 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_LOCK_PARAM[1]);
87
88 UADP_SPT_BGN(&spt_DMD_ISDBT_ModulationMode[0], sizeof(sISDBT_MODULATION_MODE));
89 UADP_SPT_FIN(&spt_DMD_ISDBT_ModulationMode[1])
90 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[0], sizeof(ISDBT_GET_MODULATION_MODE_PARAM));
91 UADP_SPT_NXT(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[1], ISDBT_GET_MODULATION_MODE_PARAM, IsdbtModulationMode, spt_DMD_ISDBT_ModulationMode);
92 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM[2]);
93
94 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[0], sizeof(ISDBT_GET_SIGNAL_STRENGTH_PARAM));
95 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM[1]);
96
97 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[0], sizeof(ISDBT_GET_SIGNAL_QUALITY_PARAM));
98 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM[1]);
99
100 UADP_SPT_BGN(&spt_DMD_ISDBT_SnrData[0], sizeof(DMD_ISDBT_SNR_DATA));
101 UADP_SPT_FIN(&spt_DMD_ISDBT_SnrData[1]);
102 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_SNR_PARAM[0], sizeof(ISDBT_GET_SNR_PARAM));
103 UADP_SPT_NXT(&spt_DMD_ISDBT_GET_SNR_PARAM[1], ISDBT_GET_SNR_PARAM, snr, spt_DMD_ISDBT_SnrData);
104 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_SNR_PARAM[2]);
105
106 UADP_SPT_BGN(&spt_DMD_ISDBT_BerData[0], sizeof(DMD_ISDBT_GET_BER_VALUE));
107 UADP_SPT_FIN(&spt_DMD_ISDBT_BerData[1]);
108 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_BER_PARAM[0], sizeof(ISDBT_GET_BER_PARAM));
109 UADP_SPT_NXT(&spt_DMD_ISDBT_GET_BER_PARAM[1], ISDBT_GET_BER_PARAM, ber, spt_DMD_ISDBT_BerData);
110 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_BER_PARAM[2]);
111
112 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_PKT_ERR_PARAM[0], sizeof(ISDBT_READ_PKT_ERR_PARAM));
113 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_PKT_ERR_PARAM[1]);
114
115 UADP_SPT_BGN(&spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[0], sizeof(ISDBT_GET_FREQ_OFFSET_PARAM));
116 UADP_SPT_FIN(&spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM[2]);
117
118 UADP_SPT_BGN(&spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[0], sizeof(ISDBT_SET_SERIAL_CONTROL_PARAM));
119 UADP_SPT_FIN(&spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM[1]);
120
121 UADP_SPT_BGN(&spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[0], sizeof(ISDBT_IIC_BYPASS_MODE_PARAM));
122 UADP_SPT_FIN(&spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM[1]);
123
124 UADP_SPT_BGN(&spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[0], sizeof(ISDBT_SWITCH_SSPI_GPIO_PARAM));
125 UADP_SPT_FIN(&spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM[1]);
126
127 UADP_SPT_BGN(&spt_DMD_ISDBT_GPIO_LEVEL_PARAM[0], sizeof(ISDBT_GPIO_LEVEL_PARAM));
128 UADP_SPT_FIN(&spt_DMD_ISDBT_GPIO_LEVEL_PARAM[1]);
129
130 UADP_SPT_BGN(&spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[0], sizeof(ISDBT_GPIO_OUT_ENABLE_PARAM));
131 UADP_SPT_FIN(&spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM[1]);
132
133 UADP_SPT_BGN(&spt_DMD_ISDBT_REG_PARAM[0], sizeof(ISDBT_REG_PARAM));
134 UADP_SPT_FIN(&spt_DMD_ISDBT_REG_PARAM[1]);
135
136 *pIoctl= (FUtopiaIOctl)DMD_ISDBT_adp_Ioctl;
137
138 return 0;
139 }
140
DMD_ISDBT_adp_Ioctl(void * pInstanceTmp,MS_U32 u32Cmd,void * const pArgs)141 MS_U32 DMD_ISDBT_adp_Ioctl(void* pInstanceTmp, MS_U32 u32Cmd, void* const pArgs)
142 {
143 MS_U32 u32Ret = 0;
144 char buffer_arg[2048];
145
146 switch(u32Cmd)
147 {
148 case DMD_ISDBT_DRV_CMD_SetDbgLevel:
149 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetDbgLevel\n"));
150 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_DBG_LEVEL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
151 break;
152 case DMD_ISDBT_DRV_CMD_GetInfo:
153 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetInfo\n"));
154 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, NULL, spt_DMD_ISDBT_GET_INFO_PARAM, buffer_arg, sizeof(buffer_arg));
155 break;
156 case DMD_ISDBT_DRV_CMD_GetLibVer:
157 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetLibVer\n"));
158 u32Ret = TRUE;
159 break;
160 case DMD_ISDBT_DRV_CMD_Init:
161 case DMD_ISDBT_DRV_CMD_MD_Init:
162 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Init\n"));
163 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_INIT_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
164 break;
165 case DMD_ISDBT_DRV_CMD_Exit:
166 case DMD_ISDBT_DRV_CMD_MD_Exit:
167 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Exit\n"));
168 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_ID_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
169 break;
170 case DMD_ISDBT_DRV_CMD_GetConfig:
171 case DMD_ISDBT_DRV_CMD_MD_GetConfig:
172 DMD_DBG(printk("ISDBT_adp_Ioctl - MDrv_DMD_ISDBT_MD_GetConfig\n"));
173 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_INIT_PARAM, spt_DMD_ISDBT_INIT_PARAM, buffer_arg, sizeof(buffer_arg));
174 break;
175 case DMD_ISDBT_DRV_CMD_AdvSetConfig:
176 case DMD_ISDBT_DRV_CMD_MD_AdvSetConfig:
177 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetConfig\n"));
178 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_CONFIG_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
179 break;
180 case DMD_ISDBT_DRV_CMD_SetPowerState:
181 case DMD_ISDBT_DRV_CMD_MD_SetPowerState:
182 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetPowerState\n"));
183 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_POWER_STATE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
184 break;
185 case DMD_ISDBT_DRV_CMD_GetLock:
186 case DMD_ISDBT_DRV_CMD_MD_GetLock:
187 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetLock\n"));
188 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_LOCK_PARAM, spt_DMD_ISDBT_GET_LOCK_PARAM, buffer_arg, sizeof(buffer_arg));
189 break;
190 case DMD_ISDBT_DRV_CMD_GetModulationMode:
191 case DMD_ISDBT_DRV_CMD_MD_GetModulationMode:
192 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetModulationMode\n"));
193 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM, spt_DMD_ISDBT_GET_MODULATION_MODE_PARAM, buffer_arg, sizeof(buffer_arg));
194 break;
195 case DMD_ISDBT_DRV_CMD_GetSignalStrength:
196 case DMD_ISDBT_DRV_CMD_MD_GetSignalStrength:
197 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSignalStrength\n"));
198 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM, spt_DMD_ISDBT_GET_SIGNAL_STRENGTH_PARAM, buffer_arg, sizeof(buffer_arg));
199 break;
200 case DMD_ISDBT_DRV_CMD_GetSignalQuality:
201 case DMD_ISDBT_DRV_CMD_MD_GetSignalQuality:
202 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSignalQuality\n"));
203 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM, spt_DMD_ISDBT_GET_SIGNAL_QUALITY_PARAM, buffer_arg, sizeof(buffer_arg));
204 break;
205 case DMD_ISDBT_DRV_CMD_GetSNR:
206 case DMD_ISDBT_DRV_CMD_MD_GetSNR:
207 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetSNR\n"));
208 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_SNR_PARAM, spt_DMD_ISDBT_GET_SNR_PARAM, buffer_arg, sizeof(buffer_arg));
209 break;
210 case DMD_ISDBT_DRV_CMD_GET_PKT_ERR:
211 case DMD_ISDBT_DRV_CMD_MD_Get_PKT_ERR:
212 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_Read_uCPKT_ERR\n"));
213 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_PKT_ERR_PARAM, spt_DMD_ISDBT_GET_PKT_ERR_PARAM, buffer_arg, sizeof(buffer_arg));
214 break;
215 case DMD_ISDBT_DRV_CMD_GetPreViterbiBer:
216 case DMD_ISDBT_DRV_CMD_MD_GetPreViterbiBer:
217 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetPreViterbiBer\n"));
218 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_BER_PARAM, spt_DMD_ISDBT_GET_BER_PARAM, buffer_arg, sizeof(buffer_arg));
219 break;
220 case DMD_ISDBT_DRV_CMD_GetPostViterbiBer:
221 case DMD_ISDBT_DRV_CMD_MD_GetPostViterbiBer:
222 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetPostViterbiBer\n"));
223 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_BER_PARAM, spt_DMD_ISDBT_GET_BER_PARAM, buffer_arg, sizeof(buffer_arg));
224 break;
225 case DMD_ISDBT_DRV_CMD_GetFreqOffset:
226 case DMD_ISDBT_DRV_CMD_MD_GetFreqOffset:
227 DMD_DBG(printk("ISDBTIoctl - DMD_ISDBT_DRV_CMD_GetFreqOffset\n"));
228 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM, spt_DMD_ISDBT_GET_FREQ_OFFSET_PARAM, buffer_arg, sizeof(buffer_arg));
229 break;
230 case DMD_ISDBT_DRV_CMD_SetSerialControl:
231 case DMD_ISDBT_DRV_CMD_MD_SetSerialControl:
232 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetSerialControl\n"));
233 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SET_SERIAL_CONTROL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
234 break;
235 case DMD_ISDBT_DRV_CMD_IIC_BYPASS_MODE:
236 case DMD_ISDBT_DRV_CMD_MD_IIC_BYPASS_MODE:
237 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_IIC_BYPASS_MODE\n"));
238 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_IIC_BYPASS_MODE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
239 break;
240 case DMD_ISDBT_DRV_CMD_SWITCH_SSPI_GPIO:
241 case DMD_ISDBT_DRV_CMD_MD_SWITCH_SSPI_GPIO:
242 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SWITCH_SSPI_GPIO\n"));
243 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_SWITCH_SSPI_GPIO_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
244 break;
245 case DMD_ISDBT_DRV_CMD_GPIO_GET_LEVEL:
246 case DMD_ISDBT_DRV_CMD_MD_GPIO_GET_LEVEL:
247 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_GET_LEVEL\n"));
248 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, buffer_arg, sizeof(buffer_arg));
249 break;
250 case DMD_ISDBT_DRV_CMD_GPIO_SET_LEVEL:
251 case DMD_ISDBT_DRV_CMD_MD_GPIO_SET_LEVEL:
252 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_SET_LEVEL\n"));
253 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_LEVEL_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
254 break;
255 case DMD_ISDBT_DRV_CMD_GPIO_OUT_ENABLE:
256 case DMD_ISDBT_DRV_CMD_MD_GPIO_OUT_ENABLE:
257 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GPIO_OUT_ENABLE\n"));
258 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_GPIO_OUT_ENABLE_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
259 break;
260 case DMD_ISDBT_DRV_CMD_DoIQSwap:
261 case DMD_ISDBT_DRV_CMD_MD_DoIQSwap:
262 DMD_DBG(printk("ISDBT_adp_Ioctl - MDrv_DMD_ISDBT_MD_DO_IQ_SWAP\n"));
263 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_DO_IQ_SWAP_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
264 break;
265
266 case DMD_ISDBT_DRV_CMD_GetReg:
267 case DMD_ISDBT_DRV_CMD_MD_GetReg:
268 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_GetReg\n"));
269 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_REG_PARAM, spt_DMD_ISDBT_REG_PARAM, buffer_arg, sizeof(buffer_arg));
270 break;
271 case DMD_ISDBT_DRV_CMD_SetReg:
272 case DMD_ISDBT_DRV_CMD_MD_SetReg:
273 DMD_DBG(printk("ISDBTIoctl - MDrv_DMD_ISDBT_SetReg\n"));
274 u32Ret = UADPBypassIoctl(pInstanceTmp, u32Cmd, pArgs, spt_DMD_ISDBT_REG_PARAM, NULL, buffer_arg, sizeof(buffer_arg));
275 break;
276 default:
277 break;
278 }
279
280 return u32Ret;
281 }
282