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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_DVBT_INTERN.h 98 /// @brief DVBT Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DVBT_H_ 103 #define _DRV_DVBT_H_ 104 105 #include "MsCommon.h" 106 //#include "drvDMD_common.h" 107 #ifdef __cplusplus 108 extern "C" 109 { 110 #endif 111 112 113 //------------------------------------------------------------------------------------------------- 114 // Driver Capability 115 //------------------------------------------------------------------------------------------------- 116 117 118 //------------------------------------------------------------------------------------------------- 119 // Macro and Define 120 //------------------------------------------------------------------------------------------------- 121 #define MSIF_DMD_MSB123xc_INTERN_LIB_CODE {'1','2', '3','x'} //Lib code 122 #define MSIF_DMD_MSB123xc_INTERN_LIBVER {'0','1'} //LIB version 123 #define MSIF_DMD_MSB123xc_INTERN_BUILDNUM {'0','0' } //Build Number 124 #define MSIF_DMD_MSB123xc_INTERN_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 125 126 #define DMD_MSB123xc_EXTERN_VER /* Character String for DRV/API version */ \ 127 MSIF_TAG, /* 'MSIF' */ \ 128 MSIF_CLASS, /* '00' */ \ 129 MSIF_CUS, /* 0x0000 */ \ 130 MSIF_MOD, /* 0x0000 */ \ 131 MSIF_CHIP, \ 132 MSIF_CPU, \ 133 MSIF_DMD_MSB123xc_INTERN_LIB_CODE, /* IP__ */ \ 134 MSIF_DMD_MSB123xc_INTERN_LIBVER, /* 0.0 ~ Z.Z */ \ 135 MSIF_DMD_MSB123xc_INTERN_BUILDNUM, /* 00 ~ 99 */ \ 136 MSIF_DMD_MSB123xc_INTERN_CHANGELIST, /* CL# */ \ 137 MSIF_OS 138 139 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 140 141 //------------------------------------------------------------------------------------------------- 142 // Type and Structure 143 //------------------------------------------------------------------------------------------------- 144 typedef enum 145 { 146 E_DMD_MSB123xc_DBGLV_NONE, // disable all the debug message 147 E_DMD_MSB123xc_DBGLV_INFO, // information 148 E_DMD_MSB123xc_DBGLV_NOTICE, // normal but significant condition 149 E_DMD_MSB123xc_DBGLV_WARNING, // warning conditions 150 E_DMD_MSB123xc_DBGLV_ERR, // error conditions 151 E_DMD_MSB123xc_DBGLV_CRIT, // critical conditions 152 E_DMD_MSB123xc_DBGLV_ALERT, // action must be taken immediately 153 E_DMD_MSB123xc_DBGLV_EMERG, // system is unusable 154 E_DMD_MSB123xc_DBGLV_DEBUG, // debug-level messages 155 } eDMD_MSB123xc_DbgLv; 156 157 typedef enum 158 { 159 // Operation Mode Settings,Address Start at 0x20 160 C_opmode_rfagc_en = 0x20, 161 C_opmode_humdet_en, 162 C_opmode_dcr_en, 163 C_opmode_iqb_en, 164 C_opmode_auto_iq, 165 C_opmode_auto_rfmax, 166 C_opmode_auto_aci, 167 C_opmode_auto_scan, 168 C_opmode_auto_scan_sym_rate, //0x28 169 C_opmode_auto_scan_qam, 170 C_opmode_atv_detector_en, 171 C_opmode_rsv_0x0B, 172 C_opmode_rsv_0x0C, 173 C_opmode_rsv_0x0D, 174 C_opmode_rsv_0x0E, 175 C_opmode_rsv_0x0F, 176 177 // Config Params 178 C_config_rssi, //0x30 179 C_config_zif, 180 C_config_freq, 181 C_config_fc_l, 182 C_config_fc_h, 183 C_config_fs_l, 184 C_config_fs_h, 185 C_config_bw_l, 186 C_config_bw_h, 187 C_config_bw1_l, 188 C_config_bw1_h, 189 C_config_bw2_l, 190 C_config_bw2_h, 191 C_config_bw3_l, 192 C_config_bw3_h, 193 C_config_rsv_0x1F, 194 C_config_rfmax, //0x40 195 C_config_qam, 196 C_config_iq_swap, 197 C_config_cci, 198 C_config_ts_serial, 199 C_config_ts_clk_rate, 200 C_config_ts_out_inv, 201 C_config_ts_data_swap, 202 203 DVBC_PARAM_LEN, 204 } DVBC_Param; 205 206 typedef enum 207 { 208 #if 1 209 // operation mode settings 210 T_OPMODE_RFAGC_EN = 0x20, // 0x20 211 T_OPMODE_HUMDET_EN, 212 T_OPMODE_DCR_EN, 213 T_OPMODE_IIS_EN, 214 T_OPMODE_CCI_EN, 215 T_OPMODE_ACI_EN, 216 T_OPMODE_IQB_EN, 217 T_OPMODE_AUTO_IQ, 218 T_OPMODE_AUTO_RFMAX, // 0x28 219 T_OPMODE_AUTO_ACI, 220 T_OPMODE_FIX_MODE_CP, 221 T_OPMODE_FIX_TPS, 222 T_OPMODE_AUTO_SCAN, 223 T_OPMODE_RSV_0X2D, 224 T_OPMODE_RSV_0X2E, 225 T_OPMODE_RSV_0X2F, 226 227 // channel config param 228 T_CONFIG_RSSI, // 0x30 229 T_CONFIG_ZIF, 230 T_CONFIG_FREQ, 231 T_CONFIG_FC_L, 232 T_CONFIG_FC_H, 233 T_CONFIG_FS_L, 234 T_CONFIG_FS_H, 235 T_CONFIG_BW, 236 T_CONFIG_MODE, // 0x38 237 T_CONFIG_CP, 238 T_CONFIG_LP_SEL, 239 T_CONFIG_CSTL, 240 T_CONFIG_HIER, 241 T_CONFIG_HPCR, 242 T_CONFIG_LPCR, 243 T_CONFIG_IQ_SWAP, 244 T_CONFIG_RFMAX, // 0x40 245 T_CONFIG_CCI, 246 T_CONFIG_ICFO_RANGE, 247 T_CONFIG_RFAGC_REF, 248 T_CONFIG_IFAGC_REF_2K, 249 T_CONFIG_IFAGC_REF_8K, 250 T_CONFIG_IFAGC_REF_ACI, 251 T_CONFIG_IFAGC_REF_IIS_2K, 252 T_CONFIG_IFAGC_REF_IIS_8K, // 0x48 253 T_CONFIG_ACI_DET_TH_L, 254 T_CONFIG_ACI_DET_TH_H, 255 T_CONFIG_TS_SERIAL, 256 T_CONFIG_TS_CLK_RATE, 257 T_CONFIG_TS_OUT_INV, 258 T_CONFIG_TS_DATA_SWAP, 259 T_CONFIG_2K_SFO_H, 260 T_CONFIG_2K_SFO_L, // 0x50 261 T_CONFIG_8K_SFO_H, 262 T_CONFIG_8K_SFO_L, 263 T_CONFIG_CHECK_CHANNEL, 264 T_CONFIG_SLICER_SNR_POS, 265 T_CONFIG_TDP_CCI_KP, 266 T_CONFIG_CCI_FSWEEP, 267 T_CONFIG_TS_CLK_RATE_AUTO, 268 T_CONFIG_IF_INV_PWM_OUT_EN, 269 270 /********************** 271 * crc = 272 * ~(T_OPMODE_RFAGC_EN^T_OPMODE_HUMDET_EN^....^T_CONFIG_TS_CLK_RATE_AUTO) 273 ************************/ 274 T_PARAM_CHECK_SUM, 275 276 T_DVBT_LOCK_HIS = 0xF0, 277 T_DVBT2_NOCHAN_Flag = 0xF1, 278 T_DVBT_NOCHAN_Flag = 0xF2, 279 280 DVBT_PARAM_LEN, 281 #else 282 T_OPMODE_RFAGC_EN = 0x20, 283 T_OPMODE_AUTO_IQ, 284 T_CONFIG_ZIF, 285 T_CONFIG_FC_L, 286 T_CONFIG_FC_H, 287 T_CONFIG_FS_L, 288 T_CONFIG_FS_H, 289 T_CONFIG_BW, 290 T_CONFIG_IQ_SWAP, 291 T_CONFIG_TS_SERIAL, 292 T_CONFIG_TS_CLK_RATE, 293 T_CONFIG_TS_OUT_INV, 294 T_CONFIG_TS_DATA_SWAP, 295 T_CONFIG_TS_CLK_RATE_AUTO, 296 T_PARAM_CHECK_SUM, 297 DVBT_PARAM_LEN, 298 299 #endif 300 } DVBT_Param; 301 302 typedef enum 303 { 304 // fw version, check sum 305 E_T2_CHECK_SUM_L = 0x00, 306 E_T2_CHECK_SUM_H, 307 E_T2_FW_VER_0, 308 E_T2_FW_VER_1, 309 E_T2_FW_VER_2, 310 311 // operation mode 312 E_T2_ZIF_EN = 0x20, 313 E_T2_RF_AGC_EN, 314 E_T2_HUM_DET_EN, 315 E_T2_DCR_EN, 316 E_T2_IQB_EN, 317 E_T2_IIS_EN, 318 E_T2_CCI_EN, 319 E_T2_LOW_PWR_DET_EN, 320 E_T2_ACI_DET_EN, 321 E_T2_TD_MOTION_EN, 322 E_T2_FD_MOTION_EN, 323 324 // channel tuning param 325 E_T2_BW = 0x40, 326 E_T2_FC_L = 0x41, 327 E_T2_FC_H = 0x42, 328 E_T2_FS_L, 329 E_T2_FS_H, 330 E_T2_ZIF, 331 E_T2_GI, 332 E_T2_ACI_DET_TYPE, 333 E_T2_AGC_REF, //0x48 334 E_T2_RSSI_REF, 335 E_T2_SNR_TIME_L, 336 E_T2_SNR_TIME_H, 337 E_T2_BER_CMP_TIME_L, 338 E_T2_BER_CMP_TIME_H, 339 E_T2_SFO_CFO_NUM, 340 E_T2_CCI, 341 E_T2_ACI_DET_TH_L, //0x50 342 E_T2_ACI_DET_TH_H, 343 E_T2_TS_SERIAL = 0x52, 344 E_T2_TS_CLK_RATE = 0x53, 345 E_T2_TS_OUT_INV = 0x54, 346 E_T2_TS_DATA_SWAP = 0x55, 347 E_T2_TDP_CCI_KP, 348 E_T2_CCI_FSWEEP, //0x57 349 E_T2_TS_ERR_POL, //0x58 350 E_T2_IF_AGC_INV_PWM_EN, 351 352 // dvbt2 lock history 353 E_T2_DVBT2_LOCK_HIS = 0xF0, 354 E_T2_FEF_DET_IND, 355 E_T2_MPLP_NO_COMMON_IND, 356 357 // splp, mplp releted 358 E_T2_PLP_ID_ARR = 0x100, 359 E_T2_L1_FLAG = 0x120, 360 E_T2_PLP_ID, 361 E_T2_GROUP_ID, 362 E_T2_PARAM_NUM, 363 } E_DVBT2_PARAM; 364 365 typedef enum 366 { 367 E_DMD_MSB123xc_DEMOD_I2C_DYNAMIC_SLAVE_ID_1, 368 E_DMD_MSB123xc_DEMOD_I2C_DYNAMIC_SLAVE_ID_2, 369 E_DMD_MSB123xc_DEMOD_I2C_DYNAMIC_SLAVE_ID_3, 370 E_DMD_MSB123xc_DEMOD_I2C_DYNAMIC_SLAVE_ID_4 371 } eDMD_MSB123xc_DemodI2CSlaveID; 372 373 typedef enum 374 { 375 E_DMD_MSB123xc_DEMOD_I2C_READ_BYTES, 376 E_DMD_MSB123xc_DEMOD_I2C_WRITE_BYTES 377 } eDMD_MSB123xc_DemodI2CMethod; 378 379 /// For demod init 380 typedef struct 381 { 382 MS_U8 u8WO_SPI_Flash; 383 MS_BOOL bPreloadDSPCodeFromMainCHIPI2C; 384 MS_BOOL bFlashWPEnable; 385 void (*fpGPIOReset)(MS_BOOL bOnOff); 386 MS_BOOL (*fpMSB123xc_I2C_Access)(eDMD_MSB123xc_DemodI2CSlaveID eSlaveID, eDMD_MSB123xc_DemodI2CMethod eMethod, MS_U8 u8AddrSize, MS_U8 *pu8Addr, MS_U16 u16Size, MS_U8 *pu8Data); 387 MS_U8* pDVBC_DSP_REG; 388 MS_U8* pDVBT_DSP_REG; 389 MS_U8* pDVBT2_DSP_REG; 390 MS_BOOL bEnableSPILoadCode; 391 void (*fpMSB123xc_SPIPAD_En)(MS_BOOL bOnOff); 392 } sDMD_MSB123xc_InitData; 393 394 typedef enum 395 { 396 E_DMD_MSB123xc_DEMOD_NONE, 397 E_DMD_MSB123xc_DEMOD_DVBT2, 398 E_DMD_MSB123xc_DEMOD_DVBT, 399 E_DMD_MSB123xc_DEMOD_DVBC, 400 } eDMD_MSB123xc_DemodulatorType; 401 402 typedef enum 403 { 404 E_DMD_MSB123xc_FAIL=0, 405 E_DMD_MSB123xc_OK=1 406 } DMD_MSB123xc_Result; 407 408 409 typedef struct 410 { 411 MS_U16 u16Version; 412 } DMD_MSB123xc_Info; 413 414 //------------------------------------------------------------------------------------------------- 415 // Function and Variable 416 //------------------------------------------------------------------------------------------------- 417 //////////////////////////////////////////////////////////////////////////////// 418 /// MDrv_DMD_DVBT_Init 419 //////////////////////////////////////////////////////////////////////////////// 420 extern MS_BOOL MDrv_DMD_MSB123xc_Init(sDMD_MSB123xc_InitData *pDMD_MSB123xc_InitData, MS_U32 u32InitDataLen); 421 //////////////////////////////////////////////////////////////////////////////// 422 /// Should be called when exit VD input source 423 //////////////////////////////////////////////////////////////////////////////// 424 extern MS_BOOL MDrv_DMD_MSB123xc_Exit(void); 425 //------------------------------------------------------------------------------ 426 /// Set detailed level of DVBT driver debug message 427 /// u8DbgLevel : debug level for Parallel Flash driver\n 428 /// AVD_DBGLV_NONE, ///< disable all the debug message\n 429 /// AVD_DBGLV_INFO, ///< information\n 430 /// AVD_DBGLV_NOTICE, ///< normal but significant condition\n 431 /// AVD_DBGLV_WARNING, ///< warning conditions\n 432 /// AVD_DBGLV_ERR, ///< error conditions\n 433 /// AVD_DBGLV_CRIT, ///< critical conditions\n 434 /// AVD_DBGLV_ALERT, ///< action must be taken immediately\n 435 /// AVD_DBGLV_EMERG, ///< system is unusable\n 436 /// AVD_DBGLV_DEBUG, ///< debug-level messages\n 437 /// @return TRUE : succeed 438 /// @return FALSE : failed to set the debug level 439 //------------------------------------------------------------------------------ 440 extern MS_BOOL MDrv_DMD_MSB123xc_SetDbgLevel(eDMD_MSB123xc_DbgLv u8DbgLevel); 441 //------------------------------------------------------------------------------------------------- 442 /// Get the information of DVBT driver\n 443 /// @return the pointer to the driver information 444 //------------------------------------------------------------------------------------------------- 445 //extern DMD_DVBT_Info* MDrv_DMD_DVBT_GetInfo(DMD_DVBT_INFO_TYPE eInfoType); 446 //------------------------------------------------------------------------------------------------- 447 /// Get DVBT driver version 448 /// when get ok, return the pointer to the driver version 449 //------------------------------------------------------------------------------------------------- 450 extern MS_BOOL MDrv_DMD_MSB123xc_GetLibVer(const MSIF_Version **ppVersion); 451 //////////////////////////////////////////////////////////////////////////////// 452 /// Get DVBT FW version 453 /// u16Addr : the address of DVBT's register\n 454 //////////////////////////////////////////////////////////////////////////////// 455 extern MS_BOOL MDrv_DMD_MSB123xc_GetFWVer(MS_U16 *ver); 456 //////////////////////////////////////////////////////////////////////////////// 457 /// To get DVBT's register value, only for special purpose.\n 458 /// u16Addr : the address of DVBT's register\n 459 /// return the value of AFEC's register\n 460 //////////////////////////////////////////////////////////////////////////////// 461 extern MS_BOOL MDrv_DMD_MSB123xc_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data); 462 //////////////////////////////////////////////////////////////////////////////// 463 /// To set DVBT's register value, only for special purpose.\n 464 /// u16Addr : the address of DVBT's register\n 465 /// u8Value : the value to be set\n 466 //////////////////////////////////////////////////////////////////////////////// 467 extern MS_BOOL MDrv_DMD_MSB123xc_SetReg(MS_U16 u16Addr, MS_U8 u8Data); 468 //////////////////////////////////////////////////////////////////////////////// 469 /// To set DVBT's register value, only for special purpose.\n 470 /// u16Addr : the address of DVBT's register\n 471 /// u8Value : the value to be set\n 472 //////////////////////////////////////////////////////////////////////////////// 473 extern MS_BOOL MDrv_DMD_MSB123xc_SetRegs(MS_U16 u16Addr, MS_U8* u8pData, MS_U16 data_size); 474 //////////////////////////////////////////////////////////////////////////////// 475 /// To set DVBT's register value, only for special purpose.\n 476 /// u16Addr : the address of DVBT's register\n 477 /// u8Value : the value to be set\n 478 //////////////////////////////////////////////////////////////////////////////// 479 extern MS_BOOL MDrv_DMD_MSB123xc_SetReg2Bytes(MS_U16 u16Addr, MS_U16 u16Data); 480 //////////////////////////////////////////////////////////////////////////////// 481 /// To get DVBT's register value, only for special purpose.\n 482 /// u16Addr : the address of DVBT's register\n 483 /// return the value of AFEC's register\n 484 //////////////////////////////////////////////////////////////////////////////// 485 extern MS_BOOL MDrv_DMD_MSB123xc_GetDSPReg(MS_U16 u16Addr, MS_U8 *pu8Data); 486 //////////////////////////////////////////////////////////////////////////////// 487 /// To set DVBT's register value, only for special purpose.\n 488 /// u16Addr : the address of DVBT's register\n 489 /// u8Value : the value to be set\n 490 //////////////////////////////////////////////////////////////////////////////// 491 extern MS_BOOL MDrv_DMD_MSB123xc_SetDSPReg(MS_U16 u16Addr, MS_U8 u8Data); 492 //////////////////////////////////////////////////////////////////////////////// 493 /// MDrv_DMD_MSB123xc_SetCurrentDemodulatorType 494 //////////////////////////////////////////////////////////////////////////////// 495 extern void MDrv_DMD_MSB123xc_SetCurrentDemodulatorType(eDMD_MSB123xc_DemodulatorType eCurrentDemodulatorType); 496 //////////////////////////////////////////////////////////////////////////////// 497 /// MDrv_DMD_MSB123xc_LoadDSPCode 498 //////////////////////////////////////////////////////////////////////////////// 499 extern MS_BOOL MDrv_DMD_MSB123xc_LoadDSPCode(void); 500 //////////////////////////////////////////////////////////////////////////////// 501 /// MDrv_DMD_MSB123xc__DTV_DVBT_DSPReg_CRC 502 //////////////////////////////////////////////////////////////////////////////// 503 extern MS_BOOL MDrv_DMD_MSB123xc_DTV_DVBT_DSPReg_CRC(void); 504 //////////////////////////////////////////////////////////////////////////////// 505 /// power on init 506 //////////////////////////////////////////////////////////////////////////////// 507 extern MS_BOOL MDrv_DMD_MSB123xc_Power_On_Initialization(void); 508 #ifdef __cplusplus 509 } 510 #endif 511 512 513 #endif // _DRV_DVBT_H_ 514 515