xref: /utopia/UTPA2-700.0.x/modules/demodulator/drv/dmd/u3/Int_DVBC/drvDMD.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi //<MStar Software>
2*53ee8cc1Swenshuai.xi //******************************************************************************
3*53ee8cc1Swenshuai.xi // MStar Software
4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are
6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties.
8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all
9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written
10*53ee8cc1Swenshuai.xi // permission has been granted by MStar.
11*53ee8cc1Swenshuai.xi //
12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you
13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to
14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations:
15*53ee8cc1Swenshuai.xi //
16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar
17*53ee8cc1Swenshuai.xi //    Software and any modification/derivatives thereof.
18*53ee8cc1Swenshuai.xi //    No right, ownership, or interest to MStar Software and any
19*53ee8cc1Swenshuai.xi //    modification/derivatives thereof is transferred to you under Terms.
20*53ee8cc1Swenshuai.xi //
21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be
22*53ee8cc1Swenshuai.xi //    supplied together with third party`s software and the use of MStar
23*53ee8cc1Swenshuai.xi //    Software may require additional licenses from third parties.
24*53ee8cc1Swenshuai.xi //    Therefore, you hereby agree it is your sole responsibility to separately
25*53ee8cc1Swenshuai.xi //    obtain any and all third party right and license necessary for your use of
26*53ee8cc1Swenshuai.xi //    such third party`s software.
27*53ee8cc1Swenshuai.xi //
28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29*53ee8cc1Swenshuai.xi //    MStar`s confidential information and you agree to keep MStar`s
30*53ee8cc1Swenshuai.xi //    confidential information in strictest confidence and not disclose to any
31*53ee8cc1Swenshuai.xi //    third party.
32*53ee8cc1Swenshuai.xi //
33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34*53ee8cc1Swenshuai.xi //    kind. Any warranties are hereby expressly disclaimed by MStar, including
35*53ee8cc1Swenshuai.xi //    without limitation, any warranties of merchantability, non-infringement of
36*53ee8cc1Swenshuai.xi //    intellectual property rights, fitness for a particular purpose, error free
37*53ee8cc1Swenshuai.xi //    and in conformity with any international standard.  You agree to waive any
38*53ee8cc1Swenshuai.xi //    claim against MStar for any loss, damage, cost or expense that you may
39*53ee8cc1Swenshuai.xi //    incur related to your use of MStar Software.
40*53ee8cc1Swenshuai.xi //    In no event shall MStar be liable for any direct, indirect, incidental or
41*53ee8cc1Swenshuai.xi //    consequential damages, including without limitation, lost of profit or
42*53ee8cc1Swenshuai.xi //    revenues, lost or damage of data, and unauthorized system use.
43*53ee8cc1Swenshuai.xi //    You agree that this Section 4 shall still apply without being affected
44*53ee8cc1Swenshuai.xi //    even if MStar Software has been modified by MStar in accordance with your
45*53ee8cc1Swenshuai.xi //    request or instruction for your use, except otherwise agreed by both
46*53ee8cc1Swenshuai.xi //    parties in writing.
47*53ee8cc1Swenshuai.xi //
48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or
49*53ee8cc1Swenshuai.xi //    services in relation with MStar Software to you for your use of
50*53ee8cc1Swenshuai.xi //    MStar Software in conjunction with your or your customer`s product
51*53ee8cc1Swenshuai.xi //    ("Services").
52*53ee8cc1Swenshuai.xi //    You understand and agree that, except otherwise agreed by both parties in
53*53ee8cc1Swenshuai.xi //    writing, Services are provided on an "AS IS" basis and the warranty
54*53ee8cc1Swenshuai.xi //    disclaimer set forth in Section 4 above shall apply.
55*53ee8cc1Swenshuai.xi //
56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels
57*53ee8cc1Swenshuai.xi //    or otherwise:
58*53ee8cc1Swenshuai.xi //    (a) conferring any license or right to use MStar name, trademark, service
59*53ee8cc1Swenshuai.xi //        mark, symbol or any other identification;
60*53ee8cc1Swenshuai.xi //    (b) obligating MStar or any of its affiliates to furnish any person,
61*53ee8cc1Swenshuai.xi //        including without limitation, you and your customers, any assistance
62*53ee8cc1Swenshuai.xi //        of any kind whatsoever, or any information; or
63*53ee8cc1Swenshuai.xi //    (c) conferring any license or right under any intellectual property right.
64*53ee8cc1Swenshuai.xi //
65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws
66*53ee8cc1Swenshuai.xi //    of Taiwan, R.O.C., excluding its conflict of law rules.
67*53ee8cc1Swenshuai.xi //    Any and all dispute arising out hereof or related hereto shall be finally
68*53ee8cc1Swenshuai.xi //    settled by arbitration referred to the Chinese Arbitration Association,
69*53ee8cc1Swenshuai.xi //    Taipei in accordance with the ROC Arbitration Law and the Arbitration
70*53ee8cc1Swenshuai.xi //    Rules of the Association by three (3) arbitrators appointed in accordance
71*53ee8cc1Swenshuai.xi //    with the said Rules.
72*53ee8cc1Swenshuai.xi //    The place of arbitration shall be in Taipei, Taiwan and the language shall
73*53ee8cc1Swenshuai.xi //    be English.
74*53ee8cc1Swenshuai.xi //    The arbitration award shall be final and binding to both parties.
75*53ee8cc1Swenshuai.xi //
76*53ee8cc1Swenshuai.xi //******************************************************************************
77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
79*53ee8cc1Swenshuai.xi //
80*53ee8cc1Swenshuai.xi // Copyright (c) 2006-2007 MStar Semiconductor, Inc.
81*53ee8cc1Swenshuai.xi // All rights reserved.
82*53ee8cc1Swenshuai.xi //
83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained
84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of
85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence
86*53ee8cc1Swenshuai.xi // (��MStar Confidential Information��) by the recipient.
87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure,
88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling,
89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential
90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the
91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom.
92*53ee8cc1Swenshuai.xi //
93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi ///
97*53ee8cc1Swenshuai.xi /// @file   drvDMD.h
98*53ee8cc1Swenshuai.xi /// @brief  DVBC Demodulator Driver Interface
99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor,Inc.
100*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi #ifndef _DRV_DMD_H_
103*53ee8cc1Swenshuai.xi #define _DRV_DMD_H_
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi 
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi #ifdef __cplusplus
108*53ee8cc1Swenshuai.xi extern "C"
109*53ee8cc1Swenshuai.xi {
110*53ee8cc1Swenshuai.xi #endif
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
113*53ee8cc1Swenshuai.xi //  Driver Capability
114*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
115*53ee8cc1Swenshuai.xi 
116*53ee8cc1Swenshuai.xi 
117*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
118*53ee8cc1Swenshuai.xi //  Macro and Define
119*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi 
122*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
123*53ee8cc1Swenshuai.xi //  Type and Structure
124*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
125*53ee8cc1Swenshuai.xi 
126*53ee8cc1Swenshuai.xi /// Mdulation constellation scheme
127*53ee8cc1Swenshuai.xi typedef enum _DMD_QamType
128*53ee8cc1Swenshuai.xi {
129*53ee8cc1Swenshuai.xi     E_DMD_QAM16  = 0,                                                   ///< QAM 16
130*53ee8cc1Swenshuai.xi     E_DMD_QAM32  = 1,                                                   ///< QAM 32
131*53ee8cc1Swenshuai.xi     E_DMD_QAM64  = 2,                                                   ///< QAM 64
132*53ee8cc1Swenshuai.xi     E_DMD_QAM128 = 3,                                                   ///< QAM 128
133*53ee8cc1Swenshuai.xi     E_DMD_QAM256 = 4,                                                   ///< QAM 256
134*53ee8cc1Swenshuai.xi 
135*53ee8cc1Swenshuai.xi     E_DMD_QAM_LASTNUM,
136*53ee8cc1Swenshuai.xi } __attribute__((packed)) DMD_QAMType;
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi /// Demodulation IQ type
139*53ee8cc1Swenshuai.xi typedef enum _DMD_IQType
140*53ee8cc1Swenshuai.xi {
141*53ee8cc1Swenshuai.xi     E_DMD_IQ_NORMAL = 0,                                                ///< IQ Normal
142*53ee8cc1Swenshuai.xi     E_DMD_IQ_INVERT = 1,                                                ///< IQ Invert
143*53ee8cc1Swenshuai.xi } __attribute__((packed)) DMD_IQType;
144*53ee8cc1Swenshuai.xi 
145*53ee8cc1Swenshuai.xi /// Demodulation tap assign
146*53ee8cc1Swenshuai.xi typedef enum _DMD_TapAssign
147*53ee8cc1Swenshuai.xi {
148*53ee8cc1Swenshuai.xi     E_DMD_TAP_PRE  = 0,                                                 ///< PreTap assign
149*53ee8cc1Swenshuai.xi     E_DMD_TAP_POST = 1,                                                 ///< PostTap assign
150*53ee8cc1Swenshuai.xi } __attribute__((packed)) DMD_TapAssign;
151*53ee8cc1Swenshuai.xi 
152*53ee8cc1Swenshuai.xi 
153*53ee8cc1Swenshuai.xi #if   1//(FRONTEND_DEMOD_TYPE == DEMOD_MSDVBC)
154*53ee8cc1Swenshuai.xi 
155*53ee8cc1Swenshuai.xi /// Demodulator auto tune control
156*53ee8cc1Swenshuai.xi typedef struct
157*53ee8cc1Swenshuai.xi {
158*53ee8cc1Swenshuai.xi     // Demodulator option
159*53ee8cc1Swenshuai.xi     MS_BOOL                         bX4CFE_en;                          ///< Carrier frequency estimation
160*53ee8cc1Swenshuai.xi     MS_BOOL                         bPPD_en;                            ///< Tap assign estimation
161*53ee8cc1Swenshuai.xi     MS_BOOL                         bIQAutoSwap_en;                     ///< IQ mode auto swap
162*53ee8cc1Swenshuai.xi     MS_BOOL                         bQAMScan_en;                        ///< QAM type auto scan
163*53ee8cc1Swenshuai.xi     MS_BOOL                         bFHO_en;                            ///< FHO
164*53ee8cc1Swenshuai.xi 	MS_BOOL							(*fptTunerSet)(MS_U32);				///< Tuner set freq function pointer
165*53ee8cc1Swenshuai.xi } DMD_Mode;
166*53ee8cc1Swenshuai.xi 
167*53ee8cc1Swenshuai.xi /// Demodulator tune parameter
168*53ee8cc1Swenshuai.xi typedef struct
169*53ee8cc1Swenshuai.xi {
170*53ee8cc1Swenshuai.xi     // Channel setting
171*53ee8cc1Swenshuai.xi     MS_U32                          u32SymRate;                         ///< Symbol rate (Ksym/sec)
172*53ee8cc1Swenshuai.xi 
173*53ee8cc1Swenshuai.xi     // Channel characteristic
174*53ee8cc1Swenshuai.xi     DMD_QAMType                     eQamType;                           ///< QAM type
175*53ee8cc1Swenshuai.xi     DMD_IQType                      eIQSwap;                            ///< IQ type
176*53ee8cc1Swenshuai.xi     DMD_TapAssign                   eTapAssign;                         ///< Tap assign
177*53ee8cc1Swenshuai.xi     MS_U32                          u32FreqOffset;                      ///< Carrier frequency offset
178*53ee8cc1Swenshuai.xi 	MS_U8							u8TuneFreqOffset;					///< Request Tuner offset
179*53ee8cc1Swenshuai.xi 	MS_U32							u32TunerFreq;						///< Request Tuner offset
180*53ee8cc1Swenshuai.xi } DMD_Param;
181*53ee8cc1Swenshuai.xi 
182*53ee8cc1Swenshuai.xi /// Demodulator special status parameter
183*53ee8cc1Swenshuai.xi typedef struct
184*53ee8cc1Swenshuai.xi {
185*53ee8cc1Swenshuai.xi 	MS_BOOL							bRtyTunerFreq;						///< Tuner freq retry flag
186*53ee8cc1Swenshuai.xi 	MS_BOOL							bRtyTunerOvr;						///< Retry over indicator for freq offset retry
187*53ee8cc1Swenshuai.xi 	MS_S32							s32TunerFreqOffset;					///< Demod request tuner freq offset
188*53ee8cc1Swenshuai.xi }DMD_Status;
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi #else
191*53ee8cc1Swenshuai.xi 
192*53ee8cc1Swenshuai.xi typedef struct
193*53ee8cc1Swenshuai.xi {
194*53ee8cc1Swenshuai.xi     // N/A
195*53ee8cc1Swenshuai.xi } DMD_Mode;
196*53ee8cc1Swenshuai.xi 
197*53ee8cc1Swenshuai.xi // Device dependant parameter
198*53ee8cc1Swenshuai.xi typedef struct
199*53ee8cc1Swenshuai.xi {
200*53ee8cc1Swenshuai.xi     // N/A
201*53ee8cc1Swenshuai.xi } DMD_Param;
202*53ee8cc1Swenshuai.xi 
203*53ee8cc1Swenshuai.xi typedef struct
204*53ee8cc1Swenshuai.xi {
205*53ee8cc1Swenshuai.xi 	// N/A
206*53ee8cc1Swenshuai.xi }DMD_Status;
207*53ee8cc1Swenshuai.xi 
208*53ee8cc1Swenshuai.xi #endif
209*53ee8cc1Swenshuai.xi 
210*53ee8cc1Swenshuai.xi 
211*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
212*53ee8cc1Swenshuai.xi //  Function and Variable
213*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
214*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Init(void);
215*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Open(void);
216*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Close(void);
217*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Reset(void);
218*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Restart(DMD_Param *pParam);
219*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_SetMode(DMD_Mode *pMode);
220*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_TsOut(MS_BOOL bEnable);
221*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_PowerOnOff(MS_BOOL bPowerOn);
222*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_SetBW(MS_U32 u32BW);
223*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetBW(MS_U32 *pu32BW);
224*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetLock(MS_BOOL *pbLock);
225*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetSNR(MS_U32 *pu32SNR);
226*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetBER(float *pfBER);
227*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetPWR(MS_S32 *ps32Signal);
228*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_GetParam(DMD_Param *pParam);
229*53ee8cc1Swenshuai.xi extern MS_BOOL MDrv_Dmd_Config(MS_U8 *pRegParam);
230*53ee8cc1Swenshuai.xi 
231*53ee8cc1Swenshuai.xi #ifdef __cplusplus
232*53ee8cc1Swenshuai.xi }
233*53ee8cc1Swenshuai.xi #endif
234*53ee8cc1Swenshuai.xi 
235*53ee8cc1Swenshuai.xi 
236*53ee8cc1Swenshuai.xi #endif // _DRV_DMD_H_
237