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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvDMD_common.c
98 /// @brief DMD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #ifdef MSOS_TYPE_LINUX_KERNEL
108 #include <linux/string.h>
109 #else
110 #include <string.h>
111 #include <stdio.h>
112 #include <math.h>
113 #endif
114 #include "MsCommon.h"
115 #include "MsVersion.h"
116 #include "MsOS.h"
117 #include "drvSYS.h"
118 #include "drvDMD_common.h"
119 #include "halDMD_INTERN_common.h"
120 #include "drvDMD_VD_MBX.h"
121 #include "ULog.h"
122 #include "drvMSPI.h"
123 //-------------------------------------------------------------------------------------------------
124 // Driver Compiler Options
125 //-------------------------------------------------------------------------------------------------
126
127
128 //-------------------------------------------------------------------------------------------------
129 // Local Defines
130 //-------------------------------------------------------------------------------------------------
131 #define SPI_DEVICE_BUFFER_SIZE 256
132 //////////////MSPI Define//////////////////
133 #define READ_INDEX 0
134 #define WRITE_INDEX 1
135 #define CMD_INDEX 0
136 #define ADDR_INDEX 1
137 //SSPI COMMAND
138 #define RIU_W_CMD 0x1A
139 #define RIU_W1_CMD 0x1D
140 #define RIU_R_CMD 0x18
141 #define RIU_R1_CMD 0x1C
142 #define RIU_RT_CMD 0x11
143 #define RIU_R1T_CMD 0x15
144 #define MIU_W_CMD 0x25
145 #define MIU_R_CMD 0x20
146 #define MIU_ST_CMD 0x21
147 #define CFG_W_CMD 0x05
148 #define CFG_R_CMD 0x00
149
150
151 //-------------------------------------------------------------------------------------------------
152 // Local Structurs
153 //-------------------------------------------------------------------------------------------------
154
155
156 //-------------------------------------------------------------------------------------------------
157 // Global Variables
158 //-------------------------------------------------------------------------------------------------
159
160
161 //-------------------------------------------------------------------------------------------------
162 // Local Variables
163 //-------------------------------------------------------------------------------------------------
164 /*
165 #ifdef CONFIG_AMAZON
166 extern s_MDRV_DMD_INTERFACE_FUNCTION sMdrvDmdInterfaceFunc;
167 #endif
168 */
169 MS_U8 u8DMD_I2C_SLAVE_BUS;
170 MS_U8 u8DMD_I2C_SLAVE_ADDR;
171 MS_BOOL bIS_EXTERN_DMD;
172 s_I2C_Interface_func sI2cInterfaceFunc;
173
174 //-------------------------------------------------------------------------------------------------
175 // Debug Functions
176 //-------------------------------------------------------------------------------------------------
177 #ifdef MS_DEBUG
178 #define DMD_DBG(x) (x)
179 #else
180 #define DMD_DBG(x) //(x)
181 #endif
182 //-------------------------------------------------------------------------------------------------
183 // Local Functions
184 //-------------------------------------------------------------------------------------------------
185
186
187 //-------------------------------------------------------------------------------------------------
188 // Global Functions
189 //-------------------------------------------------------------------------------------------------
MDrv_DMD_PreInit(void)190 MS_BOOL MDrv_DMD_PreInit(void)
191 {
192 DMD_DBG(ULOGD("DEMOD","MDrv_DMD_PreInit\n"));
193 /*
194 #ifdef CONFIG_AMAZON
195 sMdrvDmdInterfaceFunc.MDrv_DMD_I2C_Channel_Change = MDrv_DMD_I2C_Channel_Change;
196 sMdrvDmdInterfaceFunc.MDrv_DMD_I2C_Channel_Set = MDrv_DMD_I2C_Channel_Set;
197 sMdrvDmdInterfaceFunc.MDrv_DMD_ReadReg = MDrv_DMD_ReadReg;
198 sMdrvDmdInterfaceFunc.MDrv_DMD_WriteReg = MDrv_DMD_WriteReg;
199 sMdrvDmdInterfaceFunc.MDrv_DMD_WriteRegs = MDrv_DMD_WriteRegs;
200 sMdrvDmdInterfaceFunc.Log10Approx = Log10Approx;
201 #endif
202 */
203 HAL_DMD_RegInit();
204
205 //HAL_DMD_TS1_Tristate(TRUE);
206 MDrv_SYS_SetAGCPadMux(E_SYS_DTV_AGC_PAD_SET_ALL_OFF);
207
208 return TRUE;
209 }
210
MDrv_DMD_RFAGC_Tristate(MS_BOOL bEnable)211 void MDrv_DMD_RFAGC_Tristate(MS_BOOL bEnable)
212 {
213 HAL_DMD_RFAGC_Tristate(bEnable);
214 }
215
MDrv_DMD_IFAGC_Tristate(MS_BOOL bEnable)216 void MDrv_DMD_IFAGC_Tristate(MS_BOOL bEnable)
217 {
218 HAL_DMD_IFAGC_Tristate(bEnable);
219 }
220
MDrv_DMD_TS_GetClockRate(void * fTS_CLK)221 MS_BOOL MDrv_DMD_TS_GetClockRate(void *fTS_CLK)
222 {
223 // TODO: TS output is only valid when demod is locked
224 // return HAL_DMD_TS_GetClockRate(fTS_CLK);
225 return true;
226 }
227
MDrv_DMD_TSO_Clk_Control(MS_U8 * u8cmd_array)228 MS_BOOL MDrv_DMD_TSO_Clk_Control(MS_U8 *u8cmd_array)
229 {
230 return HAL_DMD_TSO_Clk_Control(u8cmd_array);
231 }
232
MDrv_DMD_ReadReg(MS_U32 u32Reg,MS_U8 * u8Value)233 MS_BOOL MDrv_DMD_ReadReg(MS_U32 u32Reg, MS_U8 *u8Value)
234 {
235 MS_BOOL bResult = FALSE;
236 if (bIS_EXTERN_DMD == FALSE)
237 bResult = MDrv_SYS_DMD_VD_MBX_ReadReg(u32Reg, u8Value);
238 else //external demod
239 bResult = HAL_DMD_IIC_ReadByte((u8DMD_I2C_SLAVE_BUS << 8 | u8DMD_I2C_SLAVE_ADDR), u32Reg, u8Value);
240 return bResult;
241 }
MDrv_DMD_WriteReg(MS_U32 u32Reg,MS_U8 u8Value)242 MS_BOOL MDrv_DMD_WriteReg(MS_U32 u32Reg, MS_U8 u8Value)
243 {
244 MS_BOOL bResult = FALSE;
245 if (bIS_EXTERN_DMD == FALSE)
246 bResult = MDrv_SYS_DMD_VD_MBX_WriteReg(u32Reg, u8Value);
247 else //external demod
248 bResult = HAL_DMD_IIC_WriteByte((u8DMD_I2C_SLAVE_BUS << 8 | u8DMD_I2C_SLAVE_ADDR), u32Reg, u8Value);
249 return bResult;
250 }
251
MDrv_DMD_WriteRegs(MS_U32 u32Reg,MS_U8 * u8Value,MS_U8 u8Length)252 MS_BOOL MDrv_DMD_WriteRegs(MS_U32 u32Reg, MS_U8 *u8Value, MS_U8 u8Length)
253 {
254 MS_BOOL bResult = FALSE;
255 if (bIS_EXTERN_DMD == FALSE)
256 bResult = MDrv_SYS_DMD_VD_MBX_WriteReg(u32Reg, (*u8Value));
257 else //external demod
258 bResult = HAL_DMD_IIC_WriteBytes((u8DMD_I2C_SLAVE_BUS << 8 | u8DMD_I2C_SLAVE_ADDR), u32Reg, u8Value, u8Length);
259 return bResult;
260
261 }
262
MDrv_DMD_I2C_Channel_Change(MS_U8 ch_num)263 MS_BOOL MDrv_DMD_I2C_Channel_Change(MS_U8 ch_num)
264 {
265 MS_BOOL bResult = FALSE;
266 bResult = HAL_DMD_I2C_Channel_Change((u8DMD_I2C_SLAVE_BUS << 8 | u8DMD_I2C_SLAVE_ADDR), ch_num);
267
268 return bResult;
269
270 }
271
MDrv_DMD_I2C_Channel_Set(MS_U8 ch_num)272 MS_BOOL MDrv_DMD_I2C_Channel_Set(MS_U8 ch_num)
273 {
274 MS_BOOL bResult = FALSE;
275
276 bResult = HAL_DMD_I2C_Channel_Set((u8DMD_I2C_SLAVE_BUS << 8 | u8DMD_I2C_SLAVE_ADDR), ch_num);
277 return bResult;
278
279 }
280
MDrv_DMD_SSPI_Init(MS_U8 u8DeviceNum)281 MS_BOOL MDrv_DMD_SSPI_Init(MS_U8 u8DeviceNum)
282 {
283
284
285 #ifndef MSOS_TYPE_LINUX_KERNEL
286 if(MDrv_MSPI_Init_Ext(u8DeviceNum) == E_MSPI_OK)
287 return TRUE;
288 else
289 return FALSE;
290 #endif
291 return true;
292
293 }
294
MDrv_DMD_SSPI_MIU_Writes(MS_U32 u32Addr,MS_U8 * pdata,MS_U16 u16Size)295 MS_BOOL MDrv_DMD_SSPI_MIU_Writes(MS_U32 u32Addr, MS_U8 *pdata, MS_U16 u16Size)
296 {
297 MS_BOOL bRet = TRUE;
298 MS_U8 Wdata[5];
299
300 Wdata[0] = MIU_W_CMD;
301 Wdata[1] = u32Addr & 0xFF;
302 Wdata[2] = (u32Addr >> 8) & 0xFF;
303 Wdata[3] = (u32Addr >> 16)& 0xFF;
304 Wdata[4] = (u32Addr >> 24);
305 //ULOGD("DEMOD","MDrv_SS_MIU_Writes\n");
306 #ifndef MSOS_TYPE_LINUX_KERNEL
307 // Write operation
308 MDrv_MSPI_SlaveEnable(TRUE);
309 // send write address
310 MDrv_MSPI_Write(Wdata,sizeof(Wdata));
311 // send data
312 MDrv_MSPI_Write(pdata,u16Size);
313 MDrv_MSPI_SlaveEnable(FALSE);
314 #endif
315 return bRet;
316 }
317
MDrv_DMD_SSPI_MIU_Reads(MS_U32 u32Addr,MS_U8 * pdata,MS_U16 u16Size)318 MS_BOOL MDrv_DMD_SSPI_MIU_Reads(MS_U32 u32Addr, MS_U8 *pdata, MS_U16 u16Size)
319 {
320
321 MS_BOOL bRet = TRUE;
322 MS_U8 Rdata[SPI_DEVICE_BUFFER_SIZE];
323 MS_U16 dataLen, i, j=0;
324
325 #ifndef MSOS_TYPE_LINUX_KERNEL
326 do
327 {
328 dataLen = (u16Size>16?16:u16Size);//(len>24?24:len);
329
330 Rdata[0] = MIU_R_CMD;
331 Rdata[1] = u32Addr & 0xFF;
332 Rdata[2] = (u32Addr >> 8) & 0xFF;
333 Rdata[3] = (u32Addr >> 16)& 0xFF;
334 Rdata[4] = (u32Addr >> 24);
335 Rdata[5] = dataLen+1;
336 //ULOGD("DEMOD","MDrv_SS_MIU_Reads, addr=0x%lx, dataLen=%d\n", u32Addr, dataLen);
337
338 // send read command to read data
339
340 MDrv_MSPI_SlaveEnable(TRUE);
341 MDrv_MSPI_Write(Rdata,6);
342 MDrv_MSPI_SlaveEnable(FALSE);
343
344 // read operation
345 Rdata[0] = MIU_ST_CMD;
346 MDrv_MSPI_SlaveEnable(TRUE);
347 MDrv_MSPI_Write(Rdata,1);
348 //ULOGD("DEMOD","Read Operation\n");
349 MDrv_MSPI_Read(Rdata, dataLen+1);
350 MDrv_MSPI_SlaveEnable(FALSE);
351
352 if(Rdata[0] != 0x0A)
353 {
354 ULOGD("DEMOD","MDrv_SS_MIU_Reads fail, status=0x%x\n", Rdata[0] );
355 return false;
356 }
357
358 for (i=1; i<dataLen+1; i++, j++)
359 {
360 pdata[j] = Rdata[i];
361 //ULOGD("DEMOD","%x, ", pdata[j]);
362 }
363
364 u16Size -= dataLen;
365 u32Addr += dataLen;
366 //ULOGD("DEMOD","u16Size=%d, u32Addr=0x%lx\n", u16Size, u32Addr);
367 }while(u16Size);
368 #endif
369 return bRet;
370 }
371
MDrv_DMD_SSPI_RIU_Write8(MS_U16 u16Addr,MS_U8 data)372 MS_BOOL MDrv_DMD_SSPI_RIU_Write8(MS_U16 u16Addr, MS_U8 data)
373 {
374 MS_BOOL bRet = TRUE;
375 MS_U8 Wdata[4];
376
377 Wdata[0] = RIU_W1_CMD;
378 Wdata[1] = u16Addr & 0xFF;
379 Wdata[2] = (u16Addr >> 8) & 0xFF;
380 Wdata[3] = data;
381 //ULOGD("DEMOD","MDrv_SS_RIU_Write\n");
382 #ifndef MSOS_TYPE_LINUX_KERNEL
383 // Write operation
384 MDrv_MSPI_SlaveEnable(TRUE);
385
386 // send write address & data
387 MDrv_MSPI_Write(Wdata,4);
388
389 MDrv_MSPI_SlaveEnable(FALSE);
390 #endif
391 return bRet;
392 }
393
MDrv_DMD_SSPI_RIU_Read8(MS_U16 u16Addr,MS_U8 * pdata)394 MS_BOOL MDrv_DMD_SSPI_RIU_Read8(MS_U16 u16Addr, MS_U8 *pdata)
395 {
396 MS_BOOL bRet = TRUE;
397 MS_U8 Rdata[5];
398
399 Rdata[0] = RIU_R1T_CMD;
400 Rdata[1] = u16Addr & 0xFF;
401 Rdata[2] = (u16Addr >> 8) & 0xFF;
402 Rdata[3] = 0x00;
403 //ULOGD("DEMOD","MDrv_SS_RIU_Read8\n");
404 #ifndef MSOS_TYPE_LINUX_KERNEL
405 MDrv_MSPI_SlaveEnable(TRUE);
406 // send read command to read data
407 MDrv_MSPI_Write(Rdata,4);
408 // read operation
409 //ULOGD("DEMOD","Read Operation\n");
410 MDrv_MSPI_Read(pdata, 1);
411 MDrv_MSPI_SlaveEnable(FALSE);
412 #endif
413
414 return bRet;
415
416 }
417