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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvAVD.c
98 /// @brief AVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #include "drvDMD_INTERN_DVBC.h"
108 #include "drvDMD_INTERN_DVBC_v2.h"
109 #include "UFO.h"
110 //#include <string.h>
111 #ifdef MSOS_TYPE_LINUX_KERNEL
112 #include <linux/string.h>
113 #else
114 #include <string.h>
115 #include <stdio.h>
116 #include <math.h>
117 #endif
118 #include "MsCommon.h"
119 #include "MsVersion.h"
120 #include "MsOS.h"
121 // Internal Definition
122 //#include "regCHIP.h"
123 //#include "regAVD.h"
124 //#include "mapi_tuner.h"
125 #include "drvSYS.h"
126 #include "drvDMD_VD_MBX.h"
127 #include "halDMD_INTERN_DVBC.h"
128 #include "halDMD_INTERN_common.h"
129 #include "../../include/drvSAR.h" // for Utopia2
130 #include "utopia.h"
131 #include "utopia_dapi.h"
132 #include "ULog.h"
133 #include "../../include/drvDMD_INTERN_DVBC_v2.h" // for Utopia2
134 //-------------------------------------------------------------------------------------------------
135 // Driver Compiler Options
136 //-------------------------------------------------------------------------------------------------
137
138
139 //-------------------------------------------------------------------------------------------------
140 // Local Defines
141 //-------------------------------------------------------------------------------------------------
142
143
144 //-------------------------------------------------------------------------------------------------
145 // Local Structurs
146 //-------------------------------------------------------------------------------------------------
147
148
149 //-------------------------------------------------------------------------------------------------
150 // Global Variables
151 //-------------------------------------------------------------------------------------------------
152
153 //-------------------------------------------------------------------------------------------------
154 // Local Variables
155 //-------------------------------------------------------------------------------------------------
156
157
158 //-------------------------------------------------------------------------------------------------
159 // Debug Functions
160 //-------------------------------------------------------------------------------------------------
161 #ifdef MS_DEBUG
162 #define DMD_DBG(x) (x)
163 #else
164 #define DMD_DBG(x) //(x)
165 #endif
166
167 static void* ppDVBCInstant = NULL;
168 static MS_U32 u32DVBCopen = 0;
169 static MS_U8 u8DVBCUtopiaOpen = 0; //for SetStillImagePara is earlier called than Init
170
171 static DMD_DVBC_InitData AgcSsi_Para;
172
173 #if defined(CHIP_K6LITE)||defined(CHIP_KAISER)
174 static DMD_DVBC_InitData AgcSsi_Para_0;
175 static DMD_DVBC_InitData AgcSsi_Para_1;
176 static MS_U8 previous_demod_index=0xff;
177 #endif
178
179 static float intern_dvb_c_qam_ref[] = {3.0, 0.0, 0.0, 0.0, 0.0, 80.0}; //16q,32q,64q,128q,256q, and others
180
181 //-------------------------------------------------------------------------------------------------
182 // Local Functions
183 //-------------------------------------------------------------------------------------------------
184
185 #ifdef UFO_DEMOD_DVBC_SUPPORT_DMD_INT
186 #define DMD_EVT_MASK 0x0F
187 #define DMD_EVT_MCU_INT 0x01
188 #define DMD_EVT_TASK_STACK_SIZE 4096
189 static MS_U8 u8StackBuffer[DMD_EVT_TASK_STACK_SIZE];
190 static MS_S32 _s32DmdEventId = -1;
191 static MS_S32 _s32DmdEventTaskId = -1;
192 static MS_U32 u32Events;
193
194 static fpIntCallBack fpCB = NULL;
195
MDrv_DMD_DVBC_Reg_INT_CB(fpIntCallBack fpCBReg)196 MS_BOOL MDrv_DMD_DVBC_Reg_INT_CB(fpIntCallBack fpCBReg)
197 {
198 fpCB = fpCBReg;
199 return TRUE;
200 }
201
202
_mdrv_dmd_dvbc_event_task(MS_U32 argc,void * argv)203 static void _mdrv_dmd_dvbc_event_task(MS_U32 argc, void *argv)
204 {
205 MS_U8 u8IntType;
206 do
207 {
208 MsOS_WaitEvent(_s32DmdEventId, DMD_EVT_MCU_INT,&u32Events, E_OR_CLEAR, MSOS_WAIT_FOREVER);
209 INTERN_DVBC_DEMOD_INTERRUPT_MONITOR(&u8IntType);
210 //if(_sDMD_DVBC_InitData.fpCB != NULL)
211 if(fpCB!=NULL)
212 {
213 fpCB((DMD_DVBC_INT_TYPE)u8IntType);
214 }
215 }while(1);
216 }
217
_mdrv_dmd_dvbc_cb(InterruptNum irq)218 static void _mdrv_dmd_dvbc_cb(InterruptNum irq)
219 {
220 MsOS_ClearEvent(_s32DmdEventId, DMD_EVT_MASK);
221 MsOS_SetEvent(_s32DmdEventId, DMD_EVT_MCU_INT);
222 MsOS_EnableInterrupt(E_INT_FIQ_DMDMCU2HK);
223 }
224 #endif
225
226
227
228
229
230
231
232 #ifndef MSOS_TYPE_LINUX
233 #if 1
234 static float _LogApproxTableX[80] =
235 { 1.00, 1.30, 1.69, 2.20, 2.86, 3.71, 4.83, 6.27, 8.16, 10.60, 13.79,
236 17.92, 23.30, 30.29, 39.37, 51.19, 66.54, 86.50, 112.46, 146.19,
237 190.05, 247.06, 321.18, 417.54, 542.80, 705.64, 917.33, 1192.53,
238 1550.29, 2015.38, 2620.00, 3405.99, 4427.79, 5756.13, 7482.97,
239 9727.86, 12646.22, 16440.08, 21372.11, 27783.74, 36118.86,
240 46954.52, 61040.88, 79353.15, 103159.09, 134106.82, 174338.86,
241 226640.52, 294632.68, 383022.48, 497929.22, 647307.99, 841500.39, 1093950.50,
242 1422135.65, 1848776.35, 2403409.25, 3124432.03, 4061761.64, 5280290.13,
243 6864377.17, 8923690.32, 11600797.42, 15081036.65, 19605347.64, 25486951.94,
244 33133037.52, 43072948.77, 55994833.40, 72793283.42, 94631268.45,
245 123020648.99, 159926843.68, 207904896.79, 270276365.82, 351359275.57,
246 456767058.24, 593797175.72, 771936328.43, 1003517226.96
247 };
248
249 static float _LogApproxTableY[80] =
250 { 0.00, 0.11, 0.23, 0.34, 0.46, 0.57, 0.68, 0.80, 0.91, 1.03, 1.14, 1.25,
251 1.37, 1.48, 1.60, 1.71, 1.82, 1.94, 2.05, 2.16, 2.28, 2.39, 2.51, 2.62,
252 2.73, 2.85, 2.96, 3.08, 3.19, 3.30, 3.42, 3.53, 3.65, 3.76, 3.87, 3.99,
253 4.10, 4.22, 4.33, 4.44, 4.56, 4.67, 4.79, 4.90, 5.01, 5.13, 5.24, 5.36,
254 5.47, 5.58, 5.70, 5.81, 5.93, 6.04, 6.15, 6.27, 6.04, 6.15, 6.27, 6.38,
255 6.49, 6.61, 6.72, 6.84, 6.95, 7.06, 7.18, 7.29, 7.41, 7.52, 7.63, 7.75,
256 7.86, 7.98, 8.09, 8.20, 8.32, 8.43, 8.55, 8.66
257 };
258
Log10Approx(float flt_x)259 static float Log10Approx(float flt_x)
260 {
261 MS_U8 indx = 0;
262
263 do {
264 if (flt_x < _LogApproxTableX[indx])
265 break;
266 indx++;
267 }while (indx < 79); //stop at indx = 80
268
269 return _LogApproxTableY[indx];
270 }
271 #else
Log10Approx(float flt_x)272 static float Log10Approx(float flt_x)
273 {
274 MS_U32 u32_temp = 1;
275 MS_U8 indx = 0;
276
277 do {
278 u32_temp = u32_temp << 1;
279 if (flt_x < (float)u32_temp)
280 break;
281 }while (++indx < 32);
282
283 // 10*log10(X) ~= 0.3*N, when X ~= 2^N
284 return (float)0.3 * indx;
285 }
286 #endif
287 #endif
288
289 //-------------------------------------------------------------------------------------------------
290 // Global Functions
291 //-------------------------------------------------------------------------------------------------
292 #if defined(CHIP_KAISER)||defined(CHIP_K6LITE)
MDrv_DMD_DVBC_Dual_Public_Init(MS_U8 u8AGC_Tristate_Ctrl,MS_U8 u8Sar_Channel)293 MS_BOOL MDrv_DMD_DVBC_Dual_Public_Init(MS_U8 u8AGC_Tristate_Ctrl,MS_U8 u8Sar_Channel)
294 {
295 void* pAttribte = NULL;
296 DVBC_Dual_Public_Init_PARAM Drv_DVBC_Dual_Public_Init_PARAM;
297 Drv_DVBC_Dual_Public_Init_PARAM.u8AGC_Tristate_Ctrl=u8AGC_Tristate_Ctrl;
298 Drv_DVBC_Dual_Public_Init_PARAM.u8Sar_Channel=u8Sar_Channel;
299
300 if(u8DVBCUtopiaOpen == 0) // First time open
301 {
302 if(UtopiaOpen(MODULE_DVBC/*|KERNEL_MODE*/ , &ppDVBCInstant, 0, pAttribte) == UTOPIA_STATUS_SUCCESS) //kernel space
303 //if(UtopiaOpen(MODULE_DVBC , &ppDVBCInstant, 0, pAttribte) == UTOPIA_STATUS_SUCCESS) //user space
304 {
305 u32DVBCopen = 1;
306 //return_val=true;
307 //ULOGD("DEMOD","\r\n ======== DVBT Open Successful %x =========", (WORD)u32DVBTopen);
308 }
309 else
310 {
311 // ULOGD("DEMOD","\r\n ======== DVBT Open Fail %x =========", (WORD)u32DVBTopen);
312 //return_val=false;
313
314 return false;
315 }
316
317 u8DVBCUtopiaOpen = 1;
318 }
319
320 if(u32DVBCopen==1)
321 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_Dual_Public_Init,&Drv_DVBC_Dual_Public_Init_PARAM);
322 else
323 return false;
324
325 #ifdef UFO_DEMOD_DVBC_SUPPORT_DMD_INT
326 if (_s32DmdEventId < 0)
327 {
328 _s32DmdEventId = MsOS_CreateEventGroup("DMD_INTERN_DVBC_Event");
329
330
331 #ifdef MS_DEBUG
332 if (_s32DmdEventId > 0)
333 printf("[%s][%d] Event create ok\n",__FUNCTION__,__LINE__);
334 else
335 printf("[%s][%d] create failed \n",__FUNCTION__,__LINE__);
336 #endif
337 }
338
339 MsOS_AttachInterrupt(E_INT_FIQ_DMDMCU2HK, _mdrv_dmd_dvbc_cb);
340
341 MsOS_DisableInterrupt(E_INT_FIQ_DMDMCU2HK);
342
343 if(_s32DmdEventTaskId < 0)
344 {
345 _s32DmdEventTaskId = MsOS_CreateTask(_mdrv_dmd_dvbc_event_task,
346 0,
347 E_TASK_PRI_HIGHEST,
348 TRUE,
349 u8StackBuffer,
350 DMD_EVT_TASK_STACK_SIZE,
351 "DMD_INTERN_DVBC_EVT_TASK");
352
353
354 #ifdef MS_DEBUG
355 if (_s32DmdEventTaskId > 0)
356 printf("[%s][%d] Event task create ok\n",__FUNCTION__,__LINE__);
357 else
358 printf("[%s][%d] create task failed \n",__FUNCTION__,__LINE__);
359 #endif
360 }
361 #endif
362
363
364
365 return Drv_DVBC_Dual_Public_Init_PARAM.ret;
366 }
367
368
MDrv_DMD_DVBC_Dual_Individual_Init(DMD_DVBC_InitData * pDMD_DVBC_InitData,MS_U32 u32InitDataLen)369 MS_BOOL MDrv_DMD_DVBC_Dual_Individual_Init(DMD_DVBC_InitData *pDMD_DVBC_InitData, MS_U32 u32InitDataLen)
370 {
371 DVBC_Dual_Individual_Init_PARAM Drv_DVBC_Dual_Individual_Init_PARAM;
372 DMD_DVBC_InitData_Transform Init_Para_Temp;
373
374
375 Init_Para_Temp.u8SarChannel=pDMD_DVBC_InitData->u8SarChannel;
376 Init_Para_Temp.u8DMD_DVBC_DSPRegInitExt=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitExt;
377 Init_Para_Temp.u8DMD_DVBC_DSPRegInitSize=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitSize;
378 Init_Para_Temp.u8DMD_DVBC_InitExt=pDMD_DVBC_InitData->u8DMD_DVBC_InitExt;
379
380 //bryan add
381 AgcSsi_Para.pTuner_RfagcSsi=pDMD_DVBC_InitData->pTuner_RfagcSsi;
382 AgcSsi_Para.u16Tuner_RfagcSsi_Size=pDMD_DVBC_InitData->u16Tuner_RfagcSsi_Size;
383 AgcSsi_Para.pTuner_IfagcSsi_LoRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_LoRef;
384 AgcSsi_Para.u16Tuner_IfagcSsi_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_LoRef_Size;
385 AgcSsi_Para.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
386 AgcSsi_Para.u16Tuner_IfagcSsi_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_HiRef_Size;
387
388
389 /*
390 Init_Para_Temp.pTuner_RfagcSsi=pDMD_DVBC_InitData->pTuner_RfagcSsi;
391 Init_Para_Temp.u16Tuner_RfagcSsi_Size=pDMD_DVBC_InitData->u16Tuner_RfagcSsi_Size;
392 Init_Para_Temp.pTuner_IfagcSsi_LoRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_LoRef;
393 Init_Para_Temp.u16Tuner_IfagcSsi_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_LoRef_Size;
394 Init_Para_Temp.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
395 Init_Para_Temp.u16Tuner_IfagcSsi_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_HiRef_Size;
396 Init_Para_Temp.pTuner_IfagcErr_LoRef=pDMD_DVBC_InitData->pTuner_IfagcErr_LoRef;
397 Init_Para_Temp.u16Tuner_IfagcErr_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_LoRef_Size;
398 Init_Para_Temp.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
399 Init_Para_Temp.u16Tuner_IfagcErr_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_HiRef_Size;
400 Init_Para_Temp.pSqiCnNordigP1=pDMD_DVBC_InitData->pSqiCnNordigP1;
401 Init_Para_Temp.u16SqiCnNordigP1_Size=pDMD_DVBC_InitData->u16SqiCnNordigP1_Size;
402 */
403
404 Drv_DVBC_Dual_Individual_Init_PARAM.pDMD_DVBC_InitData=&Init_Para_Temp;
405 Drv_DVBC_Dual_Individual_Init_PARAM.u32InitDataLen=sizeof(Init_Para_Temp);
406
407 if(u32DVBCopen==1)
408 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_Dual_Individual_Init,&Drv_DVBC_Dual_Individual_Init_PARAM);
409 else
410 return false;
411
412 return Drv_DVBC_Dual_Individual_Init_PARAM.ret;
413 }
414 #else
MDrv_DMD_DVBC_Dual_Individual_Init(DMD_DVBC_InitData * pDMD_DVBC_InitData,MS_U32 u32InitDataLen)415 MS_BOOL MDrv_DMD_DVBC_Dual_Individual_Init(DMD_DVBC_InitData *pDMD_DVBC_InitData, MS_U32 u32InitDataLen)
416 {
417 ULOGD("DEMOD","Doesn't support DVBC_Dual_Individual_Init function!!!\n");
418 return false;
419 }
420
MDrv_DMD_DVBC_Dual_Public_Init(MS_U8 u8AGC_Tristate_Ctrl,MS_U8 u8Sar_Channel)421 MS_BOOL MDrv_DMD_DVBC_Dual_Public_Init(MS_U8 u8AGC_Tristate_Ctrl,MS_U8 u8Sar_Channel)
422 {
423 ULOGD("DEMOD","Doesn't support DVBC_Dual_Public_Init function!!!\n");
424 return false;
425 }
426 #endif
MDrv_DMD_DVBC_Init(DMD_DVBC_InitData * pDMD_DVBC_InitData,MS_U32 u32InitDataLen)427 MS_BOOL MDrv_DMD_DVBC_Init(DMD_DVBC_InitData *pDMD_DVBC_InitData, MS_U32 u32InitDataLen)
428 {
429 void* pAttribte = NULL;
430
431 #ifdef MS_DEBUG
432 ULOGD("DEMOD","******check driver layer DVBC init!!*******\n");
433 #endif
434 DMD_DBG(ULOGD("DEMOD","[drvDMD_INTERN_DVBC.c]MDrv_DMD_DVBC_Init\n"));
435
436 DVBC_Init_PARAM Drv_DVBC_Init_PARAM;
437 DMD_DVBC_InitData_Transform Init_Para_Temp;
438
439 Init_Para_Temp.u8SarChannel=pDMD_DVBC_InitData->u8SarChannel;
440 Init_Para_Temp.u8DMD_DVBC_DSPRegInitExt=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitExt;
441 Init_Para_Temp.u8DMD_DVBC_DSPRegInitSize=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitSize;
442 Init_Para_Temp.u8DMD_DVBC_InitExt=pDMD_DVBC_InitData->u8DMD_DVBC_InitExt;
443 /*
444 Init_Para_Temp.pTuner_RfagcSsi=pDMD_DVBC_InitData->pTuner_RfagcSsi;
445 Init_Para_Temp.u16Tuner_RfagcSsi_Size=pDMD_DVBC_InitData->u16Tuner_RfagcSsi_Size;
446 Init_Para_Temp.pTuner_IfagcSsi_LoRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_LoRef;
447 Init_Para_Temp.u16Tuner_IfagcSsi_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_LoRef_Size;
448 Init_Para_Temp.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
449 Init_Para_Temp.u16Tuner_IfagcSsi_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_HiRef_Size;
450 Init_Para_Temp.pTuner_IfagcErr_LoRef=pDMD_DVBC_InitData->pTuner_IfagcErr_LoRef;
451 Init_Para_Temp.u16Tuner_IfagcErr_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_LoRef_Size;
452 Init_Para_Temp.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
453 Init_Para_Temp.u16Tuner_IfagcErr_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_HiRef_Size;
454 Init_Para_Temp.pSqiCnNordigP1=pDMD_DVBC_InitData->pSqiCnNordigP1;
455 Init_Para_Temp.u16SqiCnNordigP1_Size=pDMD_DVBC_InitData->u16SqiCnNordigP1_Size;
456 */
457
458 memcpy (&(AgcSsi_Para), pDMD_DVBC_InitData, sizeof(DMD_DVBC_InitData));
459 /*
460 AgcSsi_Para.pTuner_RfagcSsi=pDMD_DVBC_InitData->pTuner_RfagcSsi;
461 AgcSsi_Para.u16Tuner_RfagcSsi_Size=pDMD_DVBC_InitData->u16Tuner_RfagcSsi_Size;
462 AgcSsi_Para.pTuner_IfagcSsi_LoRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_LoRef;
463 AgcSsi_Para.u16Tuner_IfagcSsi_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_LoRef_Size;
464 AgcSsi_Para.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
465 AgcSsi_Para.u16Tuner_IfagcSsi_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcSsi_HiRef_Size;
466 AgcSsi_Para.pTuner_IfagcErr_LoRef=pDMD_DVBC_InitData->pTuner_IfagcErr_LoRef;
467 AgcSsi_Para.u16Tuner_IfagcErr_LoRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_LoRef_Size;
468 AgcSsi_Para.pTuner_IfagcSsi_HiRef=pDMD_DVBC_InitData->pTuner_IfagcSsi_HiRef;
469 AgcSsi_Para.u16Tuner_IfagcErr_HiRef_Size=pDMD_DVBC_InitData->u16Tuner_IfagcErr_HiRef_Size;
470
471 AgcSsi_Para.u8SarChannel=pDMD_DVBC_InitData->u8SarChannel;
472 AgcSsi_Para.pSqiCnNordigP1=pDMD_DVBC_InitData->pSqiCnNordigP1;
473 AgcSsi_Para.u16SqiCnNordigP1_Size=pDMD_DVBC_InitData->u16SqiCnNordigP1_Size;
474 AgcSsi_Para.u8DMD_DVBC_DSPRegInitExt=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitExt;
475 AgcSsi_Para.u8DMD_DVBC_DSPRegInitSize=pDMD_DVBC_InitData->u8DMD_DVBC_DSPRegInitSize;
476 AgcSsi_Para.u8DMD_DVBC_InitExt=pDMD_DVBC_InitData->u8DMD_DVBC_InitExt;
477 */
478
479 Drv_DVBC_Init_PARAM.u32InitDataLen=sizeof(Init_Para_Temp);
480 Drv_DVBC_Init_PARAM.pDMD_DVBC_InitData=&Init_Para_Temp;
481 Drv_DVBC_Init_PARAM.ret=false;
482
483 if(u8DVBCUtopiaOpen == 0) // First time open
484 {
485 if(UtopiaOpen(MODULE_DVBC/*|KERNEL_MODE*/ , &ppDVBCInstant, 0, pAttribte) == UTOPIA_STATUS_SUCCESS) //kernel space
486 //if(UtopiaOpen(MODULE_DVBC , &ppDVBCInstant, 0, pAttribte) == UTOPIA_STATUS_SUCCESS) //user space
487 {
488 u32DVBCopen = 1;
489 ULOGD("DEMOD","bryan check DVBC utopia open sucessful!!\n");
490 //return_val=true;
491 // ULOGD("DEMOD","\r\n ======== DVBC Open Successful %x =========", (WORD)u32DVBCopen);
492 }
493 else
494 {
495 // ULOGD("DEMOD","\r\n ======== DVBC Open Fail %x =========", (WORD)u32DVBCopen);
496 //return_val=false;
497 ULOGD("DEMOD","DVBC utopia open fail!!\n");
498 return false;
499 }
500
501 u8DVBCUtopiaOpen = 1;
502 }
503
504 if(u32DVBCopen==1)
505 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_Init,&Drv_DVBC_Init_PARAM);
506 else
507 return false;
508
509 return Drv_DVBC_Init_PARAM.ret;
510 }
511
512 #ifdef UFO_DEMOD_DVBC_GET_AGC_INFO
MDrv_DMD_DVBC_GetAGCInfo(MS_U8 u8dbg_mode,MS_U16 * pu16Data)513 MS_BOOL MDrv_DMD_DVBC_GetAGCInfo(MS_U8 u8dbg_mode, MS_U16 *pu16Data)
514 {
515 DVBC_GetAGCInfo_PARAM Drv_DVBC_GET_AGC_INFO;
516
517 Drv_DVBC_GET_AGC_INFO.u8dbg_mode = u8dbg_mode;
518 Drv_DVBC_GET_AGC_INFO.pu16Data = pu16Data;
519 Drv_DVBC_GET_AGC_INFO.ret = false;
520
521 if(u32DVBCopen==1)
522 {
523 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetAGCInfo, &Drv_DVBC_GET_AGC_INFO);
524 }
525
526 return Drv_DVBC_GET_AGC_INFO.ret;
527 }
528 #endif
529
530
MDrv_DMD_DVBC_Exit(void)531 MS_BOOL MDrv_DMD_DVBC_Exit(void)
532 {
533 DVBC_EXIT_PARAM_PARAM Drv_DVBC_EXIT_PARAM_PARAM;
534 Drv_DVBC_EXIT_PARAM_PARAM.ret=false;
535 DMD_DBG(ULOGD("DEMOD","[drvDMD_INTERN_DVBC.c]MDrv_DMD_DVBC_Exit\n"));
536
537 if(u32DVBCopen==1)
538 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_Exit,&Drv_DVBC_EXIT_PARAM_PARAM);
539 else
540 return false;
541
542 return Drv_DVBC_EXIT_PARAM_PARAM.ret;
543 }
544
MDrv_DMD_DVBC_SetDbgLevel(DMD_DVBC_DbgLv u8DbgLevel)545 MS_BOOL MDrv_DMD_DVBC_SetDbgLevel(DMD_DVBC_DbgLv u8DbgLevel)
546 {
547 DVBC_SetDbgLevel_PARAM Drv_DVBC_SetDbgLevel_PARAM;
548 Drv_DVBC_SetDbgLevel_PARAM.u8DbgLevel=u8DbgLevel;
549 Drv_DVBC_SetDbgLevel_PARAM.ret=false;
550
551 DMD_DBG(ULOGD("DEMOD","[drvDMD_INTERN_DVBC.c]MDrv_DMD_DVBC_SetDbgLevel\n"));
552 if(u32DVBCopen==1)
553 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetDbgLevel,&Drv_DVBC_SetDbgLevel_PARAM);
554 else
555 return false;
556
557 return Drv_DVBC_SetDbgLevel_PARAM.ret;
558 }
559
560 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetInfo(void)561 const DMD_DVBC_Info* MDrv_DMD_DVBC_GetInfo(void)
562 {
563 DVBC_GetInfo_PARAM Drv_DVBC_GetInfo_PARAM;
564 Drv_DVBC_GetInfo_PARAM.ret_info=NULL;
565 DMD_DVBC_MODULATION_TYPE Qam_mode;
566 float fSNR;
567 MS_U16 u16Quality;
568
569 MS_U16 SymbolRate;
570 float FreqOff;
571
572 if(u32DVBCopen==1)
573 {
574 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetInfo,&Drv_DVBC_GetInfo_PARAM);
575 MDrv_DMD_DVBC_GetSNR(&fSNR);
576 MDrv_DMD_DVBC_GetSignalQuality(&u16Quality);
577 MDrv_DMD_DVBC_GetStatus(&Qam_mode, &SymbolRate, &FreqOff);
578
579 }
580 else
581 {
582 }
583
584
585 return Drv_DVBC_GetInfo_PARAM.ret_info;
586
587 }
588 #endif
589
MDrv_DMD_DVBC_GetLibVer(const MSIF_Version ** ppVersion)590 MS_BOOL MDrv_DMD_DVBC_GetLibVer(const MSIF_Version **ppVersion)
591 {
592 DVBC_GetLibVer_PARAM Drv_DVBC_GetLibVer_PARAM;
593 Drv_DVBC_GetLibVer_PARAM.ppVersion=ppVersion;
594 Drv_DVBC_GetLibVer_PARAM.ret= false;
595
596
597 if(u32DVBCopen==1)
598 {
599 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetLibVer,&Drv_DVBC_GetLibVer_PARAM);
600 Drv_DVBC_GetLibVer_PARAM.ret= true;
601 }
602 else
603 {
604 return false;
605 }
606
607 return Drv_DVBC_GetLibVer_PARAM.ret;
608 }
609
MDrv_DMD_DVBC_GetFWVer(MS_U16 * ver)610 MS_BOOL MDrv_DMD_DVBC_GetFWVer(MS_U16 *ver)
611 {
612 DVBC_GetFWVer_PARAM Drv_DVBC_GetFWVer_PARAM;
613 Drv_DVBC_GetFWVer_PARAM.ver=ver;
614 Drv_DVBC_GetFWVer_PARAM.ret=false;
615
616 if(u32DVBCopen==1)
617 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetFWVer,&Drv_DVBC_GetFWVer_PARAM);
618 else
619 {
620 return false;
621 }
622
623 return Drv_DVBC_GetFWVer_PARAM.ret;
624
625 }
626
MDrv_DMD_DVBC_GetDSPReg(MS_U16 u16Addr,MS_U8 * pu8Data)627 MS_BOOL MDrv_DMD_DVBC_GetDSPReg(MS_U16 u16Addr, MS_U8 *pu8Data)
628 {
629 #if defined(CHIP_K1)||defined(CHIP_KENYA)
630 DVBC_GetDSPReg_PARAM Drv_DVBC_GetDSPReg_PARAM;
631 Drv_DVBC_GetDSPReg_PARAM.u16Addr=u16Addr;
632 Drv_DVBC_GetDSPReg_PARAM.pu8Data=pu8Data;
633
634 if(u32DVBCopen==1)
635 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetDSPReg,&Drv_DVBC_GetDSPReg_PARAM);
636 else
637 {
638 return false;
639 }
640
641 return Drv_DVBC_GetDSPReg_PARAM.ret;
642 #else
643 ULOGD("DEMOD","Not Support function: MDrv_DMD_DVBC_GetDSPReg\n");
644 return FALSE;
645 #endif
646 }
647
MDrv_DMD_DVBC_SetDSPReg(MS_U16 u16Addr,MS_U8 pu8Data)648 MS_BOOL MDrv_DMD_DVBC_SetDSPReg(MS_U16 u16Addr, MS_U8 pu8Data)
649 {
650 #if defined(CHIP_K1)||defined(CHIP_KENYA)
651 DVBC_SetDSPReg_PARAM Drv_DVBC_SetDSPReg_PARAM;
652
653 Drv_DVBC_SetDSPReg_PARAM.pu8Data=pu8Data;
654 Drv_DVBC_SetDSPReg_PARAM.u16Addr=u16Addr;
655
656 if(u32DVBCopen==1)
657 {
658 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetDSPReg,&Drv_DVBC_SetDSPReg_PARAM);
659 }
660 else
661 {
662 return false;
663 }
664
665 return Drv_DVBC_SetDSPReg_PARAM.ret;
666 #else
667 ULOGD("DEMOD","Not Support function: MDrv_DMD_DVBC_SetDSPReg\n");
668 return FALSE;
669 #endif
670 }
671
672
MDrv_DMD_DVBC_GetReg(MS_U16 u16Addr,MS_U8 * pu8Data)673 MS_BOOL MDrv_DMD_DVBC_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data)
674 {
675 DVBC_GetReg_PARAM Drv_DVBC_GetReg_PARAM;
676 Drv_DVBC_GetReg_PARAM.u16Addr=u16Addr;
677 Drv_DVBC_GetReg_PARAM.pu8Data=pu8Data;
678 Drv_DVBC_GetReg_PARAM.ret=false;
679
680 if(u32DVBCopen==1)
681 {
682 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetReg,&Drv_DVBC_GetReg_PARAM);
683 }
684 else
685 {
686 return false;
687 }
688
689 return Drv_DVBC_GetReg_PARAM.ret;
690
691 }
692
MDrv_DMD_DVBC_SetReg(MS_U16 u16Addr,MS_U8 u8Data)693 MS_BOOL MDrv_DMD_DVBC_SetReg(MS_U16 u16Addr, MS_U8 u8Data)
694 {
695 DVBC_SetReg_PARAM Drv_DVBC_SetReg_PARAM;
696 Drv_DVBC_SetReg_PARAM.u16Addr=u16Addr;
697 Drv_DVBC_SetReg_PARAM.u8Data=u8Data;
698 Drv_DVBC_SetReg_PARAM.ret=false;
699
700 if(u32DVBCopen==1)
701 {
702 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetReg,&Drv_DVBC_SetReg_PARAM);
703 }
704 else
705 {
706 return false;
707 }
708
709 return Drv_DVBC_SetReg_PARAM.ret;
710 }
711
MDrv_DMD_DVBC_SetSerialControl(MS_BOOL bEnable)712 MS_BOOL MDrv_DMD_DVBC_SetSerialControl(MS_BOOL bEnable)
713 {
714 DVBC_SetSerialControl_PARAM Drv_DVBC_SetSerialControl_PARAM;
715 Drv_DVBC_SetSerialControl_PARAM.bEnable=bEnable;
716 Drv_DVBC_SetSerialControl_PARAM.ret=false;
717
718 if(u32DVBCopen==1)
719 {
720 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetSerialControl,&Drv_DVBC_SetSerialControl_PARAM);
721 }
722 else
723 {
724 return false;
725 }
726
727
728 return Drv_DVBC_SetSerialControl_PARAM.ret;
729 }
730
MDrv_DMD_DVBC_GetConfig(DMD_DVBC_InitData * pDMD_DVBC_InitData)731 MS_U32 MDrv_DMD_DVBC_GetConfig(DMD_DVBC_InitData *pDMD_DVBC_InitData)
732 {
733 if (!u32DVBCopen) return FALSE;
734
735 memcpy (pDMD_DVBC_InitData, &(AgcSsi_Para), sizeof(DMD_DVBC_InitData));
736
737 return UTOPIA_STATUS_SUCCESS;
738 }
739
MDrv_DMD_DVBC_SetConfig(MS_U16 u16SymbolRate,DMD_DVBC_MODULATION_TYPE eQamMode,MS_U32 u32IFFreq,MS_BOOL bSpecInv,MS_BOOL bSerialTS)740 MS_BOOL MDrv_DMD_DVBC_SetConfig(MS_U16 u16SymbolRate, DMD_DVBC_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS)
741 {
742 #ifdef MS_DEBUG
743 ULOGD("DEMOD","check driver layer DVBC SetConfig!!\n");
744 #endif
745
746 return MDrv_DMD_DVBC_SetConfig_symbol_rate_list(u16SymbolRate, eQamMode, u32IFFreq, bSpecInv, bSerialTS, NULL, 0);
747 }
748
MDrv_DMD_DVBC_SetConfig_symbol_rate_list(MS_U16 u16SymbolRate,DMD_DVBC_MODULATION_TYPE eQamMode,MS_U32 u32IFFreq,MS_BOOL bSpecInv,MS_BOOL bSerialTS,MS_U16 * pu16_symbol_rate_list,MS_U8 u8_symbol_rate_list_num)749 MS_BOOL MDrv_DMD_DVBC_SetConfig_symbol_rate_list(MS_U16 u16SymbolRate, DMD_DVBC_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U16 *pu16_symbol_rate_list,MS_U8 u8_symbol_rate_list_num)
750 {
751 #ifdef MS_DEBUG
752 ULOGD("DEMOD","check driver layer DVBC SetConfig_symbol_rate_list!!\n");
753 #endif
754
755 DVBC_SetConfig_Symbol_rate_list_PARAM Drv_DVBC_SetConfig_Symbol_rate_list_PARAM;
756 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.u16SymbolRate=u16SymbolRate;
757 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.eQamMode=eQamMode;
758 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.u32IFFreq=u32IFFreq;
759 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.bSpecInv=bSpecInv;
760 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.bSerialTS=bSerialTS;
761 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.pu16_symbol_rate_list=pu16_symbol_rate_list;
762 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.u8_symbol_rate_list_num=u8_symbol_rate_list_num;
763 Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.ret=false;
764
765 if(u32DVBCopen==1)
766 {
767 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetSetConfig_symbol_rate_list,&Drv_DVBC_SetConfig_Symbol_rate_list_PARAM);
768 }
769 else
770 {
771 return false;
772 }
773
774 return Drv_DVBC_SetConfig_Symbol_rate_list_PARAM.ret;
775 }
776
MDrv_DMD_DVBC_SetActive(MS_BOOL bEnable)777 MS_BOOL MDrv_DMD_DVBC_SetActive(MS_BOOL bEnable)
778 {
779 DVBC_SetActive_PARAM Drv_DVBC_SetActive_PARAM;
780 Drv_DVBC_SetActive_PARAM.bEnable=bEnable;
781 Drv_DVBC_SetActive_PARAM.ret=false;
782 DMD_DBG(ULOGD("DEMOD","[drvDMD_INTERN_DVBC.c]MDrv_DMD_DVBC_SetActive\n"));
783
784 #ifdef MS_DEBUG
785 ULOGD("DEMOD","check driver layer DVBC SetActive!!\n");
786 #endif
787
788 if(u32DVBCopen==1)
789 {
790 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetActive,&Drv_DVBC_SetActive_PARAM);
791 }
792 else
793 {
794 return false;
795 }
796
797 #ifdef UFO_DEMOD_DVBC_SUPPORT_DMD_INT
798 MsOS_EnableInterrupt(E_INT_FIQ_DMDMCU2HK);
799 #endif
800
801
802 return Drv_DVBC_SetActive_PARAM.ret;
803 }
804 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetLock(DMD_DVBC_GETLOCK_TYPE eType,DMD_DVBC_LOCK_STATUS * eLockStatus)805 MS_BOOL MDrv_DMD_DVBC_GetLock(DMD_DVBC_GETLOCK_TYPE eType, DMD_DVBC_LOCK_STATUS *eLockStatus)
806 {
807 return MDrv_DMD_DVBC_GetLockWithRFPower(eType, eLockStatus, 200.0f, -200.0f);
808 }
809 #endif
810
811 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetLockWithRFPower(DMD_DVBC_GETLOCK_TYPE eType,DMD_DVBC_LOCK_STATUS * eLockStatus,float fCurrRFPowerDbm,float fNoChannelRFPowerDbm)812 MS_BOOL MDrv_DMD_DVBC_GetLockWithRFPower(DMD_DVBC_GETLOCK_TYPE eType, DMD_DVBC_LOCK_STATUS *eLockStatus, float fCurrRFPowerDbm, float fNoChannelRFPowerDbm)
813 {
814 MS_BOOL status = true;
815
816 DMD_IFAGC_SSI *ifagc_ssi;
817 DMD_IFAGC_ERR *ifagc_err;
818 float ch_power_rf=0.0f;
819 float ch_power_db=0.0f;
820 float ch_power_if=0.0f, ch_power_ifa = 0.0f, ch_power_ifb =0.0f;
821 MS_U16 if_agc_val =0, if_agc_vala =0, if_agc_valb =0, if_agc_val_lsb =0, i;
822 float ch_power_takeover=0.0f;
823 MS_U8 ssi_tbl_len = 0, err_tbl_len = 0;
824
825 MS_U8 ifagc_reg;
826 MS_U8 ifagc_reg_lsb;
827 MS_U16 ifagc_err_reg;
828
829 DVBC_GetLockWithRFPower Drv_DVBC_GetLockWithRFPower;
830
831 Drv_DVBC_GetLockWithRFPower.eType=eType;
832 Drv_DVBC_GetLockWithRFPower.eLockStatus=eLockStatus;
833 //Drv_DVBC_GetLockWithRFPower.u32CurrRFPowerDbm=(MS_U32)(fCurrRFPowerDbm*10);
834 //Drv_DVBC_GetLockWithRFPower.u32NoChannelRFPowerDbm=(MS_U32)(fNoChannelRFPowerDbm*10);
835 Drv_DVBC_GetLockWithRFPower.u32TimeInterval=0;
836 Drv_DVBC_GetLockWithRFPower.ret=false;
837
838 DVBC_GetIFAGC_PARAM Drv_DVBC_GetIFAGC_PARAM;
839 Drv_DVBC_GetIFAGC_PARAM.ifagc_reg=&ifagc_reg;
840 Drv_DVBC_GetIFAGC_PARAM.ifagc_reg_lsb=&ifagc_reg_lsb;
841 Drv_DVBC_GetIFAGC_PARAM.ifagc_err_reg=&ifagc_err_reg;
842 Drv_DVBC_GetIFAGC_PARAM.ret=false;
843
844 if(u32DVBCopen==1)
845 {
846 if((AgcSsi_Para.pTuner_IfagcSsi_HiRef != NULL) && (AgcSsi_Para.pTuner_IfagcSsi_LoRef != NULL))
847 {
848 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetIFAGC,&Drv_DVBC_GetIFAGC_PARAM);
849 status &= Drv_DVBC_GetIFAGC_PARAM.ret;
850
851 ch_power_rf = fCurrRFPowerDbm;
852 if_agc_val = ifagc_reg;
853 if_agc_val_lsb = ifagc_reg_lsb;
854
855 ifagc_ssi = AgcSsi_Para.pTuner_IfagcSsi_LoRef;
856 ssi_tbl_len = AgcSsi_Para.u16Tuner_IfagcSsi_LoRef_Size;
857 ifagc_err = AgcSsi_Para.pTuner_IfagcErr_LoRef;
858 err_tbl_len = AgcSsi_Para.u16Tuner_IfagcErr_LoRef_Size;
859
860 ch_power_if=ifagc_ssi[0].power_db;
861 if (if_agc_val >=ifagc_ssi[0].agc_val)
862 {
863 for(i = 1; i < ssi_tbl_len; i++)
864 {
865 if (if_agc_val < ifagc_ssi[i].agc_val)
866 {
867 if_agc_valb = ifagc_ssi[i].agc_val;
868 ch_power_ifb = ifagc_ssi[i].power_db;
869
870 i--;
871 if_agc_vala = ifagc_ssi[i].agc_val;
872 ch_power_ifa=ifagc_ssi[i].power_db;
873 while ((i>1) && (if_agc_vala==ifagc_ssi[i-1].agc_val))
874 {
875 ch_power_ifa=ifagc_ssi[i-1].power_db;
876 i--;
877 }
878 ch_power_if = ch_power_ifa+(ch_power_ifb-ch_power_ifa)*(float)((if_agc_val-if_agc_vala)*256+if_agc_val_lsb)/((if_agc_valb-if_agc_vala)*256);
879 break;
880 }
881 }
882 }
883 #ifdef MS_DEBUG
884 ULOGD("DEMOD","if prev %f %x\n", ch_power_ifa, if_agc_vala);
885 ULOGD("DEMOD","if next %f %x\n", ch_power_ifb, if_agc_valb);
886 #endif
887
888
889 for(i = 0; i < ssi_tbl_len; i++)
890 {
891 if (ifagc_ssi[i].agc_val <= ifagc_ssi[i+1].agc_val)
892 {
893 ch_power_takeover = ifagc_ssi[i+1].power_db;
894 break;
895 }
896 }
897
898 #ifdef MS_DEBUG
899 //ULOGD("DEMOD","ch_power_rf = %f\n", ch_power_rf);
900 ULOGD("DEMOD","ch_power_if = %f\n", ch_power_if);
901 ULOGD("DEMOD","ch_power_takeover = %f\n", ch_power_takeover);
902 #endif
903
904 // ch_power_db = (ch_power_rf > ch_power_if)? ch_power_rf : ch_power_if;
905
906 if(ch_power_rf > (ch_power_takeover + 0.5))
907 {
908 ch_power_db = ch_power_rf;
909 }
910 else if(ch_power_if < (ch_power_takeover - 0.5))
911 {
912 ch_power_db = ch_power_if;
913 }
914 else
915 {
916 ch_power_db = (ch_power_if + ch_power_rf)/2;
917 }
918
919 // ch_power_db = (ch_power_rf > ch_power_if)? ch_power_if : ch_power_rf;
920
921 if(if_agc_val == 0xff)
922 {
923 for(i = 0; i < err_tbl_len; i++)
924 {
925 if ( ifagc_err_reg <= ifagc_err[i].agc_err ) // signed char comparison
926 {
927 ch_power_db += ifagc_err[i].attn_db;
928 break;
929 }
930 }
931 #ifdef MS_DEBUG
932 ULOGD("DEMOD","if_agc_err = 0x%x\n", ifagc_err_reg);
933 #endif
934 }
935 }
936 else
937 {
938 #ifdef MS_DEBUG
939 if (fCurrRFPowerDbm>=100.0) // unreasonable input value, get RF level from RFAGG
940 {
941 ULOGD("DEMOD","Error!! please add AGC table\n");
942 }
943 #endif
944 ch_power_db = fCurrRFPowerDbm;
945 }
946
947 Drv_DVBC_GetLockWithRFPower.u32CurrRFPowerDbm=(MS_U32)(ch_power_db*10);
948 Drv_DVBC_GetLockWithRFPower.u32NoChannelRFPowerDbm=(MS_U32)(fNoChannelRFPowerDbm*10);
949 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetLockWithRFPower,&Drv_DVBC_GetLockWithRFPower);
950 status &= Drv_DVBC_GetLockWithRFPower.ret;
951 }
952 else
953 {
954 return false;
955 }
956
957 #ifdef MS_DEBUG
958 //if(*(Drv_DVBC_GetLockWithRFPower_Transform.eLockStatus)==DMD_DVBC_LOCK)
959 if(*(Drv_DVBC_GetLockWithRFPower.eLockStatus)==DMD_DVBC_LOCK)
960 {
961 ULOGD("DEMOD","check in drv layer DVBC demod locked!!\n");
962 }
963 else
964 {
965 ULOGD("DEMOD","check in drv layer DVBC demod unlock!!\n");
966 return false;
967 }
968 #endif
969
970 return status;
971 }
972 #endif
973
974 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetSignalStrength(MS_U16 * u16Strength)975 MS_BOOL MDrv_DMD_DVBC_GetSignalStrength(MS_U16 *u16Strength)
976 {
977 return MDrv_DMD_DVBC_GetSignalStrengthWithRFPower(u16Strength, 200.0f);
978 }
979 #endif
980
981 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetSignalStrengthWithRFPower(MS_U16 * u16Strength,float fRFPowerDbm)982 MS_BOOL MDrv_DMD_DVBC_GetSignalStrengthWithRFPower(MS_U16 *u16Strength, float fRFPowerDbm)
983 {
984 MS_BOOL status = true;
985 DMD_IFAGC_SSI *ifagc_ssi;
986 DMD_IFAGC_ERR *ifagc_err;
987 float ch_power_rf=0.0f;
988 float ch_power_db=0.0f, ch_power_db_rel=0.0f;
989 float ch_power_if=0.0f, ch_power_ifa = 0.0f, ch_power_ifb =0.0f;
990 MS_U16 if_agc_val =0, if_agc_vala =0, if_agc_valb =0, if_agc_val_lsb =0, i;
991 float ch_power_takeover=0.0f;
992 MS_U8 ssi_tbl_len = 0, err_tbl_len = 0;
993
994 MS_U8 ifagc_reg;
995 MS_U8 ifagc_reg_lsb;
996 MS_U16 ifagc_err_reg;
997 DMD_DVBC_MODULATION_TYPE Qam_mode = DMD_DVBC_QAM16;
998 MS_U16 SymbolRate;
999 float FreqOff;
1000
1001 //DVBC_GetSignalStrengthWithRFPower_PARAM Drv_DVBC_GetSignalStrengthWithRFPower_PARAM;
1002 //Drv_DVBC_GetSignalStrengthWithRFPower_PARAM.u16Strength=u16Strength;
1003 //Drv_DVBC_GetSignalStrengthWithRFPower_PARAM.fRFPowerDbm=fRFPowerDbm;
1004
1005 DVBC_GetIFAGC_PARAM Drv_DVBC_GetIFAGC_PARAM;
1006 Drv_DVBC_GetIFAGC_PARAM.ifagc_reg=&ifagc_reg;
1007 Drv_DVBC_GetIFAGC_PARAM.ifagc_reg_lsb=&ifagc_reg_lsb;
1008 Drv_DVBC_GetIFAGC_PARAM.ifagc_err_reg=&ifagc_err_reg;
1009 Drv_DVBC_GetIFAGC_PARAM.ret=false;
1010
1011 if(u32DVBCopen==1)
1012 {
1013 if((AgcSsi_Para.pTuner_IfagcSsi_HiRef != NULL) && (AgcSsi_Para.pTuner_IfagcSsi_LoRef != NULL))
1014 {
1015 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetIFAGC,&Drv_DVBC_GetIFAGC_PARAM);
1016 status &= Drv_DVBC_GetIFAGC_PARAM.ret;
1017 ch_power_rf = fRFPowerDbm;
1018
1019 if_agc_val = ifagc_reg;
1020 if_agc_val_lsb = ifagc_reg_lsb;
1021
1022 ifagc_ssi = AgcSsi_Para.pTuner_IfagcSsi_LoRef;
1023 ssi_tbl_len = AgcSsi_Para.u16Tuner_IfagcSsi_LoRef_Size;
1024 ifagc_err = AgcSsi_Para.pTuner_IfagcErr_LoRef;
1025 err_tbl_len = AgcSsi_Para.u16Tuner_IfagcErr_LoRef_Size;
1026
1027 ch_power_if=ifagc_ssi[0].power_db;
1028 if (if_agc_val >=ifagc_ssi[0].agc_val)
1029 {
1030 for(i = 1; i < ssi_tbl_len; i++)
1031 {
1032 if (if_agc_val < ifagc_ssi[i].agc_val)
1033 {
1034 if_agc_valb = ifagc_ssi[i].agc_val;
1035 ch_power_ifb = ifagc_ssi[i].power_db;
1036
1037 i--;
1038 if_agc_vala = ifagc_ssi[i].agc_val;
1039 ch_power_ifa=ifagc_ssi[i].power_db;
1040 while ((i>1) && (if_agc_vala==ifagc_ssi[i-1].agc_val))
1041 {
1042 ch_power_ifa=ifagc_ssi[i-1].power_db;
1043 i--;
1044 }
1045 ch_power_if = ch_power_ifa+(ch_power_ifb-ch_power_ifa)*(float)((if_agc_val-if_agc_vala)*256+if_agc_val_lsb)/((if_agc_valb-if_agc_vala)*256);
1046 break;
1047 }
1048 }
1049 }
1050 #ifdef MS_DEBUG
1051 ULOGD("DEMOD","if prev %f %x\n", ch_power_ifa, if_agc_vala);
1052 ULOGD("DEMOD","if next %f %x\n", ch_power_ifb, if_agc_valb);
1053 #endif
1054
1055 for(i = 0; i < ssi_tbl_len; i++)
1056 {
1057 if (ifagc_ssi[i].agc_val <= ifagc_ssi[i+1].agc_val)
1058 {
1059 ch_power_takeover = ifagc_ssi[i+1].power_db;
1060 break;
1061 }
1062 }
1063
1064 #ifdef MS_DEBUG
1065 ULOGD("DEMOD","ch_power_rf = %f\n", ch_power_rf);
1066 ULOGD("DEMOD","ch_power_if = %f\n", ch_power_if);
1067 ULOGD("DEMOD","ch_power_takeover = %f\n", ch_power_takeover);
1068 #endif
1069
1070 // ch_power_db = (ch_power_rf > ch_power_if)? ch_power_rf : ch_power_if;
1071
1072 if(ch_power_rf > (ch_power_takeover + 0.5))
1073 {
1074 ch_power_db = ch_power_rf;
1075 }
1076 else if(ch_power_if < (ch_power_takeover - 0.5))
1077 {
1078 ch_power_db = ch_power_if;
1079 }
1080 else
1081 {
1082 ch_power_db = (ch_power_if + ch_power_rf)/2;
1083 }
1084
1085 // ch_power_db = (ch_power_rf > ch_power_if)? ch_power_if : ch_power_rf;
1086
1087 if(if_agc_val == 0xff)
1088 {
1089 for(i = 0; i < err_tbl_len; i++)
1090 {
1091 if ( ifagc_err_reg <= ifagc_err[i].agc_err ) // signed char comparison
1092 {
1093 ch_power_db += ifagc_err[i].attn_db;
1094 break;
1095 }
1096 }
1097 #ifdef MS_DEBUG
1098 ULOGD("DEMOD","if_agc_err = 0x%x\n", ifagc_err_reg);
1099 #endif
1100 }
1101 }
1102 else
1103 {
1104 #ifdef MS_DEBUG
1105 if (fRFPowerDbm>=100.0) // unreasonable input value, get RF level from RFAGG
1106 {
1107 ULOGD("DEMOD","Error!! please add AGC table\n");
1108 }
1109 #endif
1110 ch_power_db = fRFPowerDbm;
1111 }
1112
1113 status &= MDrv_DMD_DVBC_GetStatus(&Qam_mode, &SymbolRate, &FreqOff);
1114
1115 if( (MS_U8)Qam_mode <= (MS_U8)DMD_DVBC_QAM256)
1116 {
1117 ch_power_db_rel = ch_power_db + intern_dvb_c_qam_ref[(MS_U8)Qam_mode];
1118 }
1119 else
1120 {
1121 ch_power_db_rel = -100.0f;
1122 }
1123
1124 if(ch_power_db_rel <= -85.0f)
1125 {*u16Strength = 0;}
1126 else if (ch_power_db_rel <= -80.0f)
1127 {*u16Strength = (MS_U16)(0.0f + (ch_power_db_rel+85.0f)*10.0f/5.0f);}
1128 else if (ch_power_db_rel <= -75.0f)
1129 {*u16Strength = (MS_U16)(10.0f + (ch_power_db_rel+80.0f)*20.0f/5.0f);}
1130 else if (ch_power_db_rel <= -70.0f)
1131 {*u16Strength = (MS_U16)(30.0f + (ch_power_db_rel+75.0f)*30.0f/5.0f);}
1132 else if (ch_power_db_rel <= -65.0f)
1133 {*u16Strength = (MS_U16)(60.0f + (ch_power_db_rel+70.0f)*10.0f/5.0f);}
1134 else if (ch_power_db_rel <= -55.0f)
1135 {*u16Strength = (MS_U16)(70.0f + (ch_power_db_rel+65.0f)*20.0f/10.0f);}
1136 else if (ch_power_db_rel <= -45.0f)
1137 {*u16Strength = (MS_U16)(90.0f + (ch_power_db_rel+55.0f)*10.0f/10.0f);}
1138 else
1139 {*u16Strength = 100;}
1140
1141 DMD_DBG(ULOGD("DEMOD",">>> SSI_CH_PWR(dB) = %f , Score = %d<<<\n", ch_power_db, *u16Strength));
1142 DMD_DBG(ULOGD("DEMOD",">>> SSI = %d <<<\n", (int)*u16Strength));
1143
1144 return status;
1145 }
1146 else
1147 {
1148 return false;
1149 }
1150
1151 return status;
1152 }
1153 #endif
1154
1155 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetSignalQuality(MS_U16 * u16Quality)1156 MS_BOOL MDrv_DMD_DVBC_GetSignalQuality(MS_U16 *u16Quality)
1157 {
1158 return MDrv_DMD_DVBC_GetSignalQualityWithRFPower(u16Quality, 200.0f);
1159 }
1160 #endif
1161
1162 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetSignalQualityWithRFPower(MS_U16 * u16Quality,float fRFPowerDbm)1163 MS_BOOL MDrv_DMD_DVBC_GetSignalQualityWithRFPower(MS_U16 *u16Quality, float fRFPowerDbm)
1164 {
1165 float fber;
1166 float log_ber;
1167 MS_BOOL status = true;
1168 DMD_DVBC_MODULATION_TYPE Qam_mode = DMD_DVBC_QAM16;
1169 float f_snr = 0.0;
1170
1171 DMD_DVBC_LOCK_STATUS eLockStatus = DMD_DVBC_CHECKING;
1172 MS_U16 SymbolRate;
1173 float FreqOff;
1174
1175
1176 if(u32DVBCopen==1)
1177 {
1178 status &= MDrv_DMD_DVBC_GetSNR(&f_snr);
1179 status &= MDrv_DMD_DVBC_GetLock(DMD_DVBC_GETLOCK_PSYNC_LOCK, &eLockStatus);
1180 if(eLockStatus == DMD_DVBC_LOCK)
1181 {
1182 if (MDrv_DMD_DVBC_GetPostViterbiBer(&fber) == FALSE)
1183 {
1184 DMD_DBG(ULOGD("DEMOD","\nGetPostViterbiBer Fail!"));
1185 return FALSE;
1186 }
1187
1188 // log_ber = log10(fber)
1189 #ifdef MSOS_TYPE_LINUX
1190 log_ber = (-1.0f)*log10f(1.0f/fber);
1191 #else
1192 log_ber = (-1.0f)*Log10Approx(1.0f/fber); // Log10Approx() provide 1~2^32 input range only
1193 #endif
1194
1195 DMD_DBG(ULOGD("DEMOD","\nLog(BER) = %f",log_ber));
1196 status &= MDrv_DMD_DVBC_GetStatus(&Qam_mode, &SymbolRate, &FreqOff);
1197 if (Qam_mode == DMD_DVBC_QAM16)
1198 {
1199 if(log_ber <= (-5.5f))
1200 *u16Quality = 100;
1201 else if(log_ber <= (-5.1f))
1202 *u16Quality = (MS_U16)(90.0f + ((-5.1f)-log_ber)*10.0f/((-5.1f)-(-5.5f)));
1203 else if(log_ber <= (-4.9f))
1204 *u16Quality = (MS_U16)(80.0f + ((-4.9f)-log_ber)*10.0f/((-4.9f)-(-5.1f)));
1205 else if(log_ber <= (-4.5f))
1206 *u16Quality = (MS_U16)(70.0f + ((-4.5f)-log_ber)*10.0f/((-4.5f)-(-4.9f)));
1207 else if(log_ber <= (-3.7f))
1208 *u16Quality = (MS_U16)(60.0f + ((-3.7f)-log_ber)*10.0f/((-3.7f)-(-4.5f)));
1209 else if(log_ber <= (-3.2f))
1210 *u16Quality = (MS_U16)(50.0f + ((-3.2f)-log_ber)*10.0f/((-3.2f)-(-3.7f)));
1211 else if(log_ber <= (-2.9f))
1212 *u16Quality = (MS_U16)(40.0f + ((-2.9f)-log_ber)*10.0f/((-2.9f)-(-3.2f)));
1213 else if(log_ber <= (-2.5f))
1214 *u16Quality = (MS_U16)(30.0f + ((-2.5f)-log_ber)*10.0f/((-2.5f)-(-2.9f)));
1215 else if(log_ber <= (-2.2f))
1216 *u16Quality = (MS_U16)(20.0f + ((-2.2f)-log_ber)*10.0f/((-2.2f)-(-2.5f)));
1217 else if(log_ber <= (-2.0f))
1218 *u16Quality = (MS_U16)(0.0f + ((-2.0f)-log_ber)*10.0f/((-2.0f)-(-2.2f)));
1219 else
1220 *u16Quality = 0;
1221 }
1222 else if (Qam_mode == DMD_DVBC_QAM32)
1223 {
1224 if(log_ber <= (-5.0f))
1225 *u16Quality = 100;
1226 else if(log_ber <= (-4.7f))
1227 *u16Quality = (MS_U16)(90.0f + ((-4.7f)-log_ber)*10.0f/((-4.7f)-(-5.0f)));
1228 else if(log_ber <= (-4.5f))
1229 *u16Quality = (MS_U16)(80.0f + ((-4.5f)-log_ber)*10.0f/((-4.5f)-(-4.7f)));
1230 else if(log_ber <= (-3.8f))
1231 *u16Quality = (MS_U16)(70.0f + ((-3.8f)-log_ber)*10.0f/((-3.8f)-(-4.5f)));
1232 else if(log_ber <= (-3.5f))
1233 *u16Quality = (MS_U16)(60.0f + ((-3.5f)-log_ber)*10.0f/((-3.5f)-(-3.8f)));
1234 else if(log_ber <= (-3.0f))
1235 *u16Quality = (MS_U16)(50.0f + ((-3.0f)-log_ber)*10.0f/((-3.0f)-(-3.5f)));
1236 else if(log_ber <= (-2.7f))
1237 *u16Quality = (MS_U16)(40.0f + ((-2.7f)-log_ber)*10.0f/((-2.7f)-(-3.0f)));
1238 else if(log_ber <= (-2.4f))
1239 *u16Quality = (MS_U16)(30.0f + ((-2.4f)-log_ber)*10.0f/((-2.4f)-(-2.7f)));
1240 else if(log_ber <= (-2.2f))
1241 *u16Quality = (MS_U16)(20.0f + ((-2.2f)-log_ber)*10.0f/((-2.2f)-(-2.4f)));
1242 else if(log_ber <= (-2.0f))
1243 *u16Quality = (MS_U16)(0.0f + ((-2.0f)-log_ber)*10.0f/((-2.0f)-(-2.2f)));
1244 else
1245 *u16Quality = 0;
1246 }
1247 else if (Qam_mode == DMD_DVBC_QAM64)
1248 {
1249 if(log_ber <= (-5.4f))
1250 *u16Quality = 100;
1251 else if(log_ber <= (-5.1f))
1252 *u16Quality = (MS_U16)(90.0f + ((-5.1f)-log_ber)*10.0f/((-5.1f)-(-5.4f)));
1253 else if(log_ber <= (-4.9f))
1254 *u16Quality = (MS_U16)(80.0f + ((-4.9f)-log_ber)*10.0f/((-4.9f)-(-5.1f)));
1255 else if(log_ber <= (-4.3f))
1256 *u16Quality = (MS_U16)(70.0f + ((-4.3f)-log_ber)*10.0f/((-4.3f)-(-4.9f)));
1257 else if(log_ber <= (-3.7f))
1258 *u16Quality = (MS_U16)(60.0f + ((-3.7f)-log_ber)*10.0f/((-3.7f)-(-4.3f)));
1259 else if(log_ber <= (-3.2f))
1260 *u16Quality = (MS_U16)(50.0f + ((-3.2f)-log_ber)*10.0f/((-3.2f)-(-3.7f)));
1261 else if(log_ber <= (-2.9f))
1262 *u16Quality = (MS_U16)(40.0f + ((-2.9f)-log_ber)*10.0f/((-2.9f)-(-3.2f)));
1263 else if(log_ber <= (-2.4f))
1264 *u16Quality = (MS_U16)(30.0f + ((-2.4f)-log_ber)*10.0f/((-2.4f)-(-2.9f)));
1265 else if(log_ber <= (-2.2f))
1266 *u16Quality = (MS_U16)(20.0f + ((-2.2f)-log_ber)*10.0f/((-2.2f)-(-2.4f)));
1267 else if(log_ber <= (-2.05f))
1268 *u16Quality = (MS_U16)(0.0f + ((-2.05f)-log_ber)*10.0f/((-2.05f)-(-2.2f)));
1269 else
1270 *u16Quality = 0;
1271 }
1272 else if (Qam_mode == DMD_DVBC_QAM128)
1273 {
1274 if(log_ber <= (-5.1f))
1275 *u16Quality = 100;
1276 else if(log_ber <= (-4.9f))
1277 *u16Quality = (MS_U16)(90.0f + ((-4.9f)-log_ber)*10.0f/((-4.9f)-(-5.1f)));
1278 else if(log_ber <= (-4.7f))
1279 *u16Quality = (MS_U16)(80.0f + ((-4.7f)-log_ber)*10.0f/((-4.7f)-(-4.9f)));
1280 else if(log_ber <= (-4.1f))
1281 *u16Quality = (MS_U16)(70.0f + ((-4.1f)-log_ber)*10.0f/((-4.1f)-(-4.7f)));
1282 else if(log_ber <= (-3.5f))
1283 *u16Quality = (MS_U16)(60.0f + ((-3.5f)-log_ber)*10.0f/((-3.5f)-(-4.1f)));
1284 else if(log_ber <= (-3.1f))
1285 *u16Quality = (MS_U16)(50.0f + ((-3.1f)-log_ber)*10.0f/((-3.1f)-(-3.5f)));
1286 else if(log_ber <= (-2.7f))
1287 *u16Quality = (MS_U16)(40.0f + ((-2.7f)-log_ber)*10.0f/((-2.7f)-(-3.1f)));
1288 else if(log_ber <= (-2.5f))
1289 *u16Quality = (MS_U16)(30.0f + ((-2.5f)-log_ber)*10.0f/((-2.5f)-(-2.7f)));
1290 else if(log_ber <= (-2.06f))
1291 *u16Quality = (MS_U16)(20.0f + ((-2.06f)-log_ber)*10.0f/((-2.06f)-(-2.5f)));
1292 //else if(log_ber <= (-2.05))
1293 else
1294 {
1295 if (f_snr >= 27.2f)
1296 *u16Quality = 20;
1297 else if (f_snr >= 25.1f)
1298 *u16Quality = (MS_U16)(0.0f + (f_snr - 25.1f)*20.0f/(27.2f-25.1f));
1299 else
1300 *u16Quality = 0;
1301 }
1302 }
1303 else //256QAM
1304 {
1305 if(log_ber <= (-4.8f))
1306 *u16Quality = 100;
1307 else if(log_ber <= (-4.6f))
1308 *u16Quality = (MS_U16)(90.0f + ((-4.6f)-log_ber)*10.0f/((-4.6f)-(-4.8f)));
1309 else if(log_ber <= (-4.4f))
1310 *u16Quality = (MS_U16)(80.0f + ((-4.4f)-log_ber)*10.0f/((-4.4f)-(-4.6f)));
1311 else if(log_ber <= (-4.0f))
1312 *u16Quality = (MS_U16)(70.0f + ((-4.0f)-log_ber)*10.0f/((-4.0f)-(-4.4f)));
1313 else if(log_ber <= (-3.5f))
1314 *u16Quality = (MS_U16)(60.0f + ((-3.5f)-log_ber)*10.0f/((-3.5f)-(-4.0f)));
1315 else if(log_ber <= (-3.1f))
1316 *u16Quality = (MS_U16)(50.0f + ((-3.1f)-log_ber)*10.0f/((-3.1f)-(-3.5f)));
1317 else if(log_ber <= (-2.7f))
1318 *u16Quality = (MS_U16)(40.0f + ((-2.7f)-log_ber)*10.0f/((-2.7f)-(-3.1f)));
1319 else if(log_ber <= (-2.4f))
1320 *u16Quality = (MS_U16)(30.0f + ((-2.4f)-log_ber)*10.0f/((-2.4f)-(-2.7f)));
1321 else if(log_ber <= (-2.06f))
1322 *u16Quality = (MS_U16)(20.0f + ((-2.06f)-log_ber)*10.0f/((-2.06f)-(-2.4f)));
1323 //else if(log_ber <= (-2.05))
1324 else
1325 {
1326 if (f_snr >= 29.6f)
1327 *u16Quality = 20;
1328 else if (f_snr >= 27.3f)
1329 *u16Quality = (MS_U16)(0.0f + (f_snr - 27.3f)*20.0f/(29.6f-27.3f));
1330 else
1331 *u16Quality = 0;
1332 }
1333 }
1334 }
1335 else
1336 {
1337 *u16Quality = 0;
1338 }
1339
1340 DMD_DBG(ULOGD("DEMOD","BER = %8.3e\n", fber));
1341 DMD_DBG(ULOGD("DEMOD","Signal Quility = %d\n", *u16Quality));
1342 return TRUE;
1343 }
1344 else
1345 {
1346 return false;
1347 }
1348
1349 return status;
1350 }
1351 #endif
1352
1353 #if defined(CHIP_KAISER)||defined(CHIP_K6LITE)
MDrv_DMD_DVBC_ActiveDmdSwitch(MS_U8 demod_no)1354 MS_BOOL MDrv_DMD_DVBC_ActiveDmdSwitch(MS_U8 demod_no)
1355 {
1356 DVBC_ActiveDmdSwitch_PARAM Drv_DVBC_ActiveDmdSwitch_PARAM;
1357 Drv_DVBC_ActiveDmdSwitch_PARAM.demod_no=demod_no;
1358
1359 if(u32DVBCopen==1)
1360 {
1361 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_ActiveDmdSwitch,&Drv_DVBC_ActiveDmdSwitch_PARAM);
1362
1363 if(demod_no==0 && previous_demod_index==1)
1364 {
1365 AgcSsi_Para_1=AgcSsi_Para;
1366 AgcSsi_Para=AgcSsi_Para_0;
1367
1368 }
1369 else if(demod_no==1 && previous_demod_index==0)
1370 {
1371 AgcSsi_Para_0=AgcSsi_Para;
1372 AgcSsi_Para=AgcSsi_Para_1;
1373 }
1374
1375 previous_demod_index=demod_no;
1376 }
1377 else
1378 {
1379 return false;
1380 }
1381
1382 return Drv_DVBC_ActiveDmdSwitch_PARAM.ret;
1383 }
1384 #else
MDrv_DMD_DVBC_ActiveDmdSwitch(MS_U8 demod_no)1385 MS_BOOL MDrv_DMD_DVBC_ActiveDmdSwitch(MS_U8 demod_no)
1386 {
1387 ULOGD("DEMOD","Doesn't support DVBC_ActiveDmdSwitch function!!!\n");
1388 return false;
1389 }
1390 #endif
1391
1392 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetSNR(float * fSNR)1393 MS_BOOL MDrv_DMD_DVBC_GetSNR(float *fSNR)
1394 {
1395 MS_U16 snr_reg;
1396
1397 DVBC_GetSNR_PARAM Drv_DVBC_GetSNR_PARAM;
1398 Drv_DVBC_GetSNR_PARAM.snr_reg=&snr_reg;
1399 Drv_DVBC_GetSNR_PARAM.ret = false;
1400
1401 if(u32DVBCopen==1)
1402 {
1403 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetSNR,&Drv_DVBC_GetSNR_PARAM);
1404
1405 #ifdef MSOS_TYPE_LINUX
1406 *fSNR = 10.0f*log10f(65536.0f/(float)(snr_reg));
1407 #else
1408 *fSNR = 10.0f*Log10Approx(65536.0f/(float)(snr_reg));
1409 #endif
1410
1411 Drv_DVBC_GetSNR_PARAM.ret = true;
1412 }
1413 else
1414 {
1415 return false;
1416 }
1417
1418 return Drv_DVBC_GetSNR_PARAM.ret;
1419 }
1420 #endif
1421
1422 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetPostViterbiBer(float * ber)1423 MS_BOOL MDrv_DMD_DVBC_GetPostViterbiBer(float *ber)
1424 {
1425 MS_U16 BitErrPeriod_reg;
1426 MS_U32 BitErr_reg;
1427 MS_U16 PktErr;
1428
1429 DVBC_GetPostViterbiBer_PARAM Drv_DVBC_GetPostViterbiBer_PARAM;
1430 Drv_DVBC_GetPostViterbiBer_PARAM.BitErr_reg=&BitErr_reg;
1431 Drv_DVBC_GetPostViterbiBer_PARAM.BitErrPeriod_reg=&BitErrPeriod_reg;
1432 Drv_DVBC_GetPostViterbiBer_PARAM.ret=false;
1433
1434
1435 if(u32DVBCopen==1)
1436 {
1437 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetPostViterbiBer,&Drv_DVBC_GetPostViterbiBer_PARAM);
1438 MDrv_DMD_DVBC_GetPacketErr(&PktErr);
1439
1440 if (BitErrPeriod_reg == 0 ) //protect 0
1441 BitErrPeriod_reg = 1;
1442
1443 if (BitErr_reg <=0 )
1444 {
1445 *ber = 0.5f / ((float)(BitErrPeriod_reg)*128*188*8);
1446 }
1447 else
1448 {
1449 *ber = (float)BitErr_reg / ((float)(BitErrPeriod_reg)*128*188*8);
1450 }
1451 DMD_DBG(ULOGD("DEMOD","PostVitBER = %8.3e \n ", *ber));
1452 DMD_DBG(ULOGD("DEMOD","PktErr = %d \n ", (int)PktErr));
1453 Drv_DVBC_GetPostViterbiBer_PARAM.ret=true;
1454 }
1455 else
1456 {
1457 return false;
1458 }
1459
1460
1461 return Drv_DVBC_GetPostViterbiBer_PARAM.ret;
1462 }
1463 #endif
1464
MDrv_DMD_DVBC_GetPacketErr(MS_U16 * pktErr)1465 MS_BOOL MDrv_DMD_DVBC_GetPacketErr(MS_U16 *pktErr)
1466 {
1467 DVBC_GetPacketErr_PARAM Drv_DVBC_GetPacketErr_PARAM;
1468 Drv_DVBC_GetPacketErr_PARAM.pktErr=pktErr;
1469 Drv_DVBC_GetPacketErr_PARAM.ret=false;
1470
1471 if(u32DVBCopen==1)
1472 {
1473 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetPacketErr,&Drv_DVBC_GetPacketErr_PARAM);
1474 }
1475 else
1476 {
1477 return false;
1478 }
1479
1480 return Drv_DVBC_GetPacketErr_PARAM.ret;
1481 }
1482
MDrv_DMD_DVBC_GetCellID(MS_U16 * u16CellID)1483 MS_BOOL MDrv_DMD_DVBC_GetCellID(MS_U16 *u16CellID)
1484 {
1485 DVBC_GetCellID_PARAM Drv_DVBC_GetCellID_PARAM;
1486 Drv_DVBC_GetCellID_PARAM.u16CellID=u16CellID;
1487 Drv_DVBC_GetCellID_PARAM.ret=false;
1488
1489 if(u32DVBCopen==1)
1490 {
1491 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetCellID,&Drv_DVBC_GetCellID_PARAM);
1492 }
1493 else
1494 {
1495 return false;
1496 }
1497
1498 return Drv_DVBC_GetCellID_PARAM.ret;
1499
1500 }
1501
1502
1503 #ifndef MSOS_TYPE_LINUX_KERNEL
MDrv_DMD_DVBC_GetStatus(DMD_DVBC_MODULATION_TYPE * pQAMMode,MS_U16 * u16SymbolRate,float * pFreqOff)1504 MS_BOOL MDrv_DMD_DVBC_GetStatus(DMD_DVBC_MODULATION_TYPE *pQAMMode, MS_U16 *u16SymbolRate, float *pFreqOff)
1505 {
1506 MS_U32 config_Fc_reg;
1507 MS_U32 Fc_over_Fs_reg;
1508 MS_U16 Cfo_offset_reg;
1509
1510 DVBC_GetStatus_PARAM Drv_DVBC_GetStatus_PARAM;
1511 Drv_DVBC_GetStatus_PARAM.pQAMMode=pQAMMode;
1512 Drv_DVBC_GetStatus_PARAM.u16SymbolRate=u16SymbolRate;
1513 Drv_DVBC_GetStatus_PARAM.config_Fc_reg=&config_Fc_reg;
1514 Drv_DVBC_GetStatus_PARAM.Fc_over_Fs_reg=&Fc_over_Fs_reg;
1515 Drv_DVBC_GetStatus_PARAM.Cfo_offset_reg=&Cfo_offset_reg;
1516 Drv_DVBC_GetStatus_PARAM.ret=false;
1517
1518 float f_Fc, FreqCfo_offset;
1519
1520 if(u32DVBCopen==1)
1521 {
1522 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_GetStatus,&Drv_DVBC_GetStatus_PARAM);
1523
1524 f_Fc = (float)Fc_over_Fs_reg/134217728.0f * 45473.0f;
1525
1526 FreqCfo_offset = (MS_S32)(Cfo_offset_reg<<4)/16;
1527
1528 FreqCfo_offset = FreqCfo_offset/0x8000000/8.0f;
1529
1530 FreqCfo_offset = FreqCfo_offset * (*u16SymbolRate) - (f_Fc-(float)config_Fc_reg);
1531
1532 *pFreqOff = FreqCfo_offset;
1533
1534 #ifdef MS_DEBUG
1535 if (_u8DMD_DVBC_DbgLevel >= DMD_DVBC_DBGLV_INFO)
1536 {
1537 ULOGD("DEMOD","MDrv_DMD_DVBC_GetStatus %d %d\n", *pQAMMode, *u16SymbolRate, *pFreqOff);
1538 }
1539 #endif
1540 }
1541 else
1542 {
1543 return false;
1544 }
1545
1546 return Drv_DVBC_GetStatus_PARAM.ret;
1547 }
1548 #endif
1549
MDrv_DMD_DVBC_SetPowerState(EN_POWER_MODE u16PowerState)1550 MS_U32 MDrv_DMD_DVBC_SetPowerState(EN_POWER_MODE u16PowerState)
1551 {
1552 DVBC_SetPowerState_PARAM Drv_DVBC_SetPowerState_PARAM;
1553 Drv_DVBC_SetPowerState_PARAM.u16PowerState=u16PowerState;
1554 Drv_DVBC_SetPowerState_PARAM.ret_U32=false;
1555 DMD_DBG(ULOGD("DEMOD","[drvDMD_INTERN_DVBC.c]MDrv_DMD_DVBC_SetPowerState\n"));
1556 if(u32DVBCopen==1)
1557 {
1558 UtopiaIoctl(ppDVBCInstant,DMD_DVBC_DRV_CMD_SetPowerState,&Drv_DVBC_SetPowerState_PARAM);
1559 }
1560 else
1561 {
1562 return false;
1563 }
1564
1565 return Drv_DVBC_SetPowerState_PARAM.ret_U32;
1566 }
1567