1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
24 // Therefore, you hereby agree it is your sole responsibility to separately
25 // obtain any and all third party right and license necessary for your use of
26 // such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 // MStar`s confidential information and you agree to keep MStar`s
30 // confidential information in strictest confidence and not disclose to any
31 // third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 // kind. Any warranties are hereby expressly disclaimed by MStar, including
35 // without limitation, any warranties of merchantability, non-infringement of
36 // intellectual property rights, fitness for a particular purpose, error free
37 // and in conformity with any international standard. You agree to waive any
38 // claim against MStar for any loss, damage, cost or expense that you may
39 // incur related to your use of MStar Software.
40 // In no event shall MStar be liable for any direct, indirect, incidental or
41 // consequential damages, including without limitation, lost of profit or
42 // revenues, lost or damage of data, and unauthorized system use.
43 // You agree that this Section 4 shall still apply without being affected
44 // even if MStar Software has been modified by MStar in accordance with your
45 // request or instruction for your use, except otherwise agreed by both
46 // parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 // services in relation with MStar Software to you for your use of
50 // MStar Software in conjunction with your or your customer`s product
51 // ("Services").
52 // You understand and agree that, except otherwise agreed by both parties in
53 // writing, Services are provided on an "AS IS" basis and the warranty
54 // disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 // or otherwise:
58 // (a) conferring any license or right to use MStar name, trademark, service
59 // mark, symbol or any other identification;
60 // (b) obligating MStar or any of its affiliates to furnish any person,
61 // including without limitation, you and yor any information; or
62 // (c) conferring any license or right under any intellectual property right.
63 //
64 // 7. These terms shall be governed by and construed in accordance with the laws
65 // of Taiwan, R.O.C., excluding its conflict of law rules.
66 // Any and all dispute arising out hereof or related hereto shall be finally
67 // settled by arbitration referred to the Chinese Arbitration Association,
68 // Taipei in accordance with the ROC Arbitration Law and the Arbitration
69 // Rules of the Association by three (3) arbitrators appointed in accordance
70 // with the said Rules.
71 // The place of arbitra��cordance
72 // with the said Rules.
73 // The place of arbitration shall be in Taipei, Taiwan and the language shall
74 // be English.
75 // The arbitration award shall be final and binding to both parties.
76 //
77 //******************************************************************************
78 //<MStar Software>
79 ////////////////////////////////////////////////////////////////////////////////
80 //
81 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
82 // All rights reserved.
83 //
84 // Unless otherwise stipulated in writing, any and all information contained
85 // herein regardless in any format shall remain the sole proprietary of
86 // MStar Semiconductor Inc. and be kept in strict confidence
87 // ("MStar Confidential Information") by the recipient.
88 // Any unauthorized act including without limitation unauthorized disclosure,
89 // copying, use, reproduction, sale, distribution, modification, disassembling,
90 // reverse engineering and compiling of the contents of MStar Confidential
91 // Information is unlawful and strictly prohibited. MStar hereby reserves the
92 // rights to any and all damages, losses, costs and expenses resulting therefrom.
93 //
94 ////////////////////////////////////////////////////////////////////////////////
95
96 ///////////////////////////////////////////////////////////////////////////////////////////////////
97 ///
98 /// file drvDMD_DTMB_v2.c
99 /// @brief DMD DTMB Driver Interface
100 /// @author MStar Semiconductor Inc.
101 ///////////////////////////////////////////////////////////////////////////////////////////////////
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106
107 #ifdef MSOS_TYPE_LINUX_KERNEL
108 #include <linux/string.h>
109 #else
110 #include <string.h>
111 #include <stdio.h>
112 #endif
113
114 #include "utopia.h"
115 #include "utopia_dapi.h"
116
117 #include "drvDMD_DTMB_v2.h"
118
119 //-------------------------------------------------------------------------------------------------
120 // Driver Compiler Options
121 //-------------------------------------------------------------------------------------------------
122
123
124 //-------------------------------------------------------------------------------------------------
125 // Local Defines
126 //-------------------------------------------------------------------------------------------------
127
128 #ifdef MS_DEBUG
129 #define DMD_DBG(x) (x)
130 #else
131 #define DMD_DBG(x) //(x)
132 #endif
133
134 //-------------------------------------------------------------------------------------------------
135 // Local Structurs
136 //-------------------------------------------------------------------------------------------------
137
138 typedef enum _DTMB_POOL_ID
139 {
140 DTMB_POOL_ID_DMD0 = 0
141 } DTMB_POOL_ID;
142
143 typedef struct DLL_PACKED _DTMB_RESOURCE_PRIVATE
144 {
145 DMD_DTMB_ResData sDMD_DTMB_ResData[DMD_DTMB_MAX_DEMOD_NUM];
146 } DTMB_RESOURCE_PRIVATE, *PDTMB_RESOURCE_PRIVATE;;
147
148 #ifdef UTPA2
149
150 typedef MS_BOOL (*IOCTL_DTMB_SetDbgLevel)(DMD_DTMB_DbgLv);
151 typedef DMD_DTMB_Info* (*IOCTL_DTMB_GetInfo)(void);
152 typedef MS_BOOL (*IOCTL_DTMB_GetLibVer)(const MSIF_Version**);
153 typedef MS_BOOL (*IOCTL_DTMB_Init)(MS_U8, DMD_DTMB_InitData*, MS_U32);
154 typedef MS_BOOL (*IOCTL_DTMB_Exit)(MS_U8);
155 typedef MS_U32 (*IOCTL_DTMB_GetConfig)(MS_U8, DMD_DTMB_InitData*);
156 typedef MS_BOOL (*IOCTL_DTMB_SetConfig)(MS_U8, DMD_DTMB_DEMOD_TYPE, MS_BOOL);
157 typedef MS_BOOL (*IOCTL_DTMB_SetReset)(MS_U8);
158 typedef MS_BOOL (*IOCTL_DTMB_Set_QAM_SR)(MS_U8, DMD_DTMB_DEMOD_TYPE, MS_U16);
159 typedef MS_BOOL (*IOCTL_DTMB_SetActive)(MS_U8, MS_BOOL);
160 typedef MS_U32 (*IOCTL_DTMB_SetPowerState)(MS_U8, EN_POWER_MODE);
161 typedef DMD_DTMB_LOCK_STATUS (*IOCTL_DTMB_GetLock)(MS_U8, DMD_DTMB_GETLOCK_TYPE);
162 typedef MS_BOOL (*IOCTL_DTMB_GetModulationMode)(MS_U8, DMD_DTMB_MODULATION_INFO*);
163 typedef MS_BOOL (*IOCTL_DTMB_GetSignalStrength)(MS_U8, MS_U16*);
164 typedef MS_BOOL (*IOCTL_DTMB_ReadFrequencyOffset)(MS_U8, DMD_DTMB_CFO_DATA*);
165 typedef MS_U8 (*IOCTL_DTMB_GetSignalQuality)(MS_U8);
166 typedef MS_BOOL (*IOCTL_DTMB_GetPreLdpcBer)(MS_U8, DMD_DTMB_BER_DATA*);
167 typedef MS_BOOL (*IOCTL_DTMB_GetPreViterbiBer)(MS_U8, DMD_DTMB_BER_DATA*);
168 typedef MS_BOOL (*IOCTL_DTMB_GetPostViterbiBer)(MS_U8, DMD_DTMB_BER_DATA*);
169 typedef MS_BOOL (*IOCTL_DTMB_GetSNR)(MS_U8, DMD_DTMB_SNR_DATA*);
170 typedef MS_BOOL (*IOCTL_DTMB_SetSerialControl)(MS_U8, MS_U8);
171 typedef MS_BOOL (*IOCTL_DTMB_IIC_BYPASS_MODE)(MS_U8, MS_BOOL);
172 typedef MS_BOOL (*IOCTL_DTMB_SWITCH_SSPI_GPIO)(MS_U8, MS_BOOL);
173 typedef MS_BOOL (*IOCTL_DTMB_GPIO_GET_LEVEL)(MS_U8, MS_U8, MS_BOOL*);
174 typedef MS_BOOL (*IOCTL_DTMB_GPIO_SET_LEVEL)(MS_U8, MS_U8, MS_BOOL);
175 typedef MS_BOOL (*IOCTL_DTMB_GPIO_OUT_ENABLE)(MS_U8, MS_U8, MS_BOOL);
176 typedef MS_BOOL (*IOCTL_DTMB_DoIQSwap)(MS_U8, MS_BOOL);
177 typedef MS_BOOL (*IOCTL_DTMB_GetReg)(MS_U8, MS_U16, MS_U8*);
178 typedef MS_BOOL (*IOCTL_DTMB_SetReg)(MS_U8, MS_U16, MS_U8);
179
180 typedef struct _DTMB_INSTANT_PRIVATE
181 {
182 IOCTL_DTMB_SetDbgLevel fpSetDbgLevel;
183 IOCTL_DTMB_GetInfo fpGetInfo;
184 IOCTL_DTMB_GetLibVer fpGetLibVer;
185 IOCTL_DTMB_Init fpInit;
186 IOCTL_DTMB_Exit fpExit;
187 IOCTL_DTMB_GetConfig fpGetConfig;
188 IOCTL_DTMB_SetConfig fpSetConfig;
189 IOCTL_DTMB_SetReset fpSetReset;
190 IOCTL_DTMB_Set_QAM_SR fpSet_QAM_SR;
191 IOCTL_DTMB_SetActive fpSetActive;
192 #if DMD_DTMB_STR_EN
193 IOCTL_DTMB_SetPowerState fpSetPowerState;
194 #endif
195 IOCTL_DTMB_GetLock fpGetLock;
196 IOCTL_DTMB_GetModulationMode fpGetModulationMode;
197 IOCTL_DTMB_GetSignalStrength fpGetSignalStrength;
198 IOCTL_DTMB_ReadFrequencyOffset fpReadFrequencyOffset;
199 IOCTL_DTMB_GetSignalQuality fpGetSignalQuality;
200 IOCTL_DTMB_GetPreLdpcBer fpGetPreLdpcBer;
201 IOCTL_DTMB_GetPreViterbiBer fpGetPreViterbiBer;
202 IOCTL_DTMB_GetPostViterbiBer fpGetPostViterbiBer;
203 IOCTL_DTMB_GetSNR fpGetSNR;
204 IOCTL_DTMB_SetSerialControl fpSetSerialControl;
205 IOCTL_DTMB_IIC_BYPASS_MODE fpIIC_BYPASS_MODE;
206 IOCTL_DTMB_SWITCH_SSPI_GPIO fpSWITCH_SSPI_GPIO;
207 IOCTL_DTMB_GPIO_GET_LEVEL fpGPIO_GET_LEVEL;
208 IOCTL_DTMB_GPIO_SET_LEVEL fpGPIO_SET_LEVEL;
209 IOCTL_DTMB_GPIO_OUT_ENABLE fpGPIO_OUT_ENABLE;
210 IOCTL_DTMB_DoIQSwap fpDoIQSwap;
211 IOCTL_DTMB_GetReg fpGetReg;
212 IOCTL_DTMB_SetReg fpSetReg;
213 } DTMB_INSTANT_PRIVATE;
214
215 //-------------------------------------------------------------------------------------------------
216 // Global Variables
217 //-------------------------------------------------------------------------------------------------
218
219 extern DMD_DTMB_ResData *psDMD_DTMB_ResData;
220
221 //-------------------------------------------------------------------------------------------------
222 // Local Variables
223 //-------------------------------------------------------------------------------------------------
224
225
226 //-------------------------------------------------------------------------------------------------
227 // Debug Functions
228 //-------------------------------------------------------------------------------------------------
229
230
231 //-------------------------------------------------------------------------------------------------
232 // Local Functions
233 //-------------------------------------------------------------------------------------------------
234
235
236 //-------------------------------------------------------------------------------------------------
237 // Global Functions
238 //-------------------------------------------------------------------------------------------------
239
DTMBOpen(void ** ppInstance,MS_U32 u32ModuleVersion,void * pAttribute)240 MS_U32 DTMBOpen(void** ppInstance, MS_U32 u32ModuleVersion, void* pAttribute)
241 {
242 DTMB_INSTANT_PRIVATE *pDtmbPri = NULL;
243 void *pDtmbPriVoid = NULL;
244
245 printf("\n[DTMB INFO] dtmb open");
246
247 // instance is allocated here, also can allocate private for internal use, ex, BDMA_INSTANT_PRIVATE
248 UtopiaInstanceCreate(sizeof(DTMB_INSTANT_PRIVATE), ppInstance);
249 // setup func in private and assign the calling func in func ptr in instance private
250 UtopiaInstanceGetPrivate(*ppInstance, &pDtmbPriVoid);
251 pDtmbPri = (DTMB_INSTANT_PRIVATE*)pDtmbPriVoid;
252
253 pDtmbPri->fpSetDbgLevel = _MDrv_DMD_DTMB_SetDbgLevel;
254 pDtmbPri->fpGetInfo = _MDrv_DMD_DTMB_GetInfo;
255 pDtmbPri->fpGetLibVer = _MDrv_DMD_DTMB_GetLibVer;
256 pDtmbPri->fpInit = _MDrv_DMD_DTMB_MD_Init;
257 pDtmbPri->fpExit = _MDrv_DMD_DTMB_MD_Exit;
258 pDtmbPri->fpGetConfig = _MDrv_DMD_DTMB_MD_GetConfig;
259 pDtmbPri->fpSetConfig = _MDrv_DMD_DTMB_MD_SetConfig;
260 pDtmbPri->fpSetReset = _MDrv_DMD_DTMB_MD_SetReset;
261 pDtmbPri->fpSet_QAM_SR = _MDrv_DMD_DTMB_MD_Set_QAM_SR;
262 pDtmbPri->fpSetActive = _MDrv_DMD_DTMB_MD_SetActive;
263 #if DMD_DTMB_STR_EN
264 pDtmbPri->fpSetPowerState = _MDrv_DMD_DTMB_MD_SetPowerState;
265 #endif
266 pDtmbPri->fpGetLock = _MDrv_DMD_DTMB_MD_GetLock;
267 pDtmbPri->fpGetModulationMode = _MDrv_DMD_DTMB_MD_GetModulationMode;
268 pDtmbPri->fpGetSignalStrength = _MDrv_DMD_DTMB_MD_GetSignalStrength;
269 pDtmbPri->fpReadFrequencyOffset = _MDrv_DMD_DTMB_MD_ReadFrequencyOffset;
270 pDtmbPri->fpGetSignalQuality = _MDrv_DMD_DTMB_MD_GetSignalQuality;
271 pDtmbPri->fpGetPreLdpcBer = _MDrv_DMD_DTMB_MD_GetPreLdpcBer;
272 pDtmbPri->fpGetPreViterbiBer = _MDrv_DMD_DTMB_MD_GetPreViterbiBer;
273 pDtmbPri->fpGetPostViterbiBer = _MDrv_DMD_DTMB_MD_GetPostViterbiBer;
274 pDtmbPri->fpGetSNR = _MDrv_DMD_DTMB_MD_GetSNR;
275 pDtmbPri->fpSetSerialControl = _MDrv_DMD_DTMB_MD_SetSerialControl;
276 pDtmbPri->fpIIC_BYPASS_MODE = _MDrv_DMD_DTMB_MD_IIC_BYPASS_MODE;
277 pDtmbPri->fpSWITCH_SSPI_GPIO = _MDrv_DMD_DTMB_MD_SWITCH_SSPI_GPIO;
278 pDtmbPri->fpGPIO_GET_LEVEL = _MDrv_DMD_DTMB_MD_GPIO_GET_LEVEL;
279 pDtmbPri->fpGPIO_SET_LEVEL = _MDrv_DMD_DTMB_MD_GPIO_SET_LEVEL;
280 pDtmbPri->fpGPIO_OUT_ENABLE = _MDrv_DMD_DTMB_MD_GPIO_OUT_ENABLE;
281 pDtmbPri->fpDoIQSwap = _MDrv_DMD_DTMB_MD_DoIQSwap;
282 pDtmbPri->fpGetReg = _MDrv_DMD_DTMB_MD_GetReg;
283 pDtmbPri->fpSetReg = _MDrv_DMD_DTMB_MD_SetReg;
284
285 return UTOPIA_STATUS_SUCCESS;
286 }
287
288 #if DMD_DTMB_STR_EN
DTMBStr(MS_U32 u32PowerState,void * pModule)289 MS_U32 DTMBStr(MS_U32 u32PowerState, void* pModule)
290 {
291 void* pResource = NULL;
292 DTMB_RESOURCE_PRIVATE* psDTMBResPri = NULL;
293
294 MS_U32 i = 0;
295 MS_U32 u32Ret = FALSE;
296
297 if (UtopiaResourceObtain(pModule, DTMB_POOL_ID_DMD0, &pResource) != 0)
298 {
299 printf("UtopiaResourceObtainToInstant fail\n");
300 return UTOPIA_STATUS_ERR_RESOURCE;
301 }
302
303 if (UtopiaResourceGetPrivate(pResource, (void*)&psDTMBResPri) != 0)
304 {
305 printf("UtopiaResourceGetPrivate fail\n");
306 return UTOPIA_STATUS_FAIL;
307 }
308
309 psDMD_DTMB_ResData = ((PDTMB_RESOURCE_PRIVATE)psDTMBResPri)->sDMD_DTMB_ResData;
310
311 do
312 {
313 u32Ret = _MDrv_DMD_DTMB_MD_SetPowerState(i++, u32PowerState);
314 } while (i < DMD_DTMB_MAX_DEMOD_NUM && u32Ret);
315
316 UtopiaResourceRelease(pResource);
317
318 return (u32Ret ? UTOPIA_STATUS_SUCCESS : UTOPIA_STATUS_FAIL);
319 }
320 #endif
321
DTMBIoctl(void * pInstance,MS_U32 u32Cmd,void * pArgs)322 MS_U32 DTMBIoctl(void* pInstance, MS_U32 u32Cmd, void* pArgs)
323 {
324 void* pModule = NULL;
325 UtopiaInstanceGetModule(pInstance, &pModule);
326 void* pResource = NULL;
327 DTMB_RESOURCE_PRIVATE* psDTMBResPri = NULL;
328 DTMB_INSTANT_PRIVATE* psDTMBInstPri = NULL;
329 void* psDTMBInstPriVoid = NULL;
330 UtopiaInstanceGetPrivate(pInstance, (void**)&psDTMBInstPriVoid);
331 psDTMBInstPri = (DTMB_INSTANT_PRIVATE*)psDTMBInstPriVoid;
332
333 MS_U32 u32Ret = FALSE;
334
335 if (UtopiaResourceObtain(pModule, DTMB_POOL_ID_DMD0, &pResource) != 0)
336 {
337 printf("UtopiaResourceObtainToInstant fail\n");
338 return UTOPIA_STATUS_ERR_RESOURCE;
339 }
340
341 if (UtopiaResourceGetPrivate(pResource, (void*)&psDTMBResPri) != 0)
342 {
343 printf("UtopiaResourceGetPrivate fail\n");
344 return UTOPIA_STATUS_FAIL;
345 }
346
347 psDMD_DTMB_ResData = ((PDTMB_RESOURCE_PRIVATE)psDTMBResPri)->sDMD_DTMB_ResData;
348
349 switch (u32Cmd)
350 {
351 case DMD_DTMB_DRV_CMD_SetDbgLevel:
352 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_SetDbgLevel\n"));
353 u32Ret = psDTMBInstPri->fpSetDbgLevel(((PDTMB_DBG_LEVEL_PARAM)pArgs)->u8DbgLevel);
354 break;
355 case DMD_DTMB_DRV_CMD_GetInfo:
356 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_GetInfo\n"));
357 ((PDTMB_GET_INFO_PARAM)pArgs)->pInfo = psDTMBInstPri->fpGetInfo();
358 u32Ret = TRUE;
359 break;
360 case DMD_DTMB_DRV_CMD_GetLibVer:
361 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_GetLibVer\n"));
362 u32Ret = psDTMBInstPri->fpGetLibVer(((PDTMB_GET_LIB_VER_PARAM)pArgs)->ppVersion);
363 break;
364 case DMD_DTMB_DRV_CMD_Init:
365 ((PDTMB_INIT_PARAM)pArgs)->id = 0;
366 case DMD_DTMB_DRV_CMD_MD_Init:
367 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_Init\n"));
368 u32Ret = psDTMBInstPri->fpInit(((PDTMB_INIT_PARAM)pArgs)->id, ((PDTMB_INIT_PARAM)pArgs)->pDMD_DTMB_InitData, ((PDTMB_INIT_PARAM)pArgs)->u32InitDataLen);
369 break;
370 case DMD_DTMB_DRV_CMD_Exit:
371 ((PDTMB_ID_PARAM)pArgs)->id = 0;
372 case DMD_DTMB_DRV_CMD_MD_Exit:
373 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_Exit\n"));
374 u32Ret = psDTMBInstPri->fpExit(((PDTMB_ID_PARAM)pArgs)->id);
375 break;
376 case DMD_DTMB_DRV_CMD_GetConfig:
377 ((PDTMB_INIT_PARAM)pArgs)->id = 0;
378 case DMD_DTMB_DRV_CMD_MD_GetConfig:
379 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetConfig\n"));
380 u32Ret = psDTMBInstPri->fpGetConfig(((PDTMB_INIT_PARAM)pArgs)->id, ((PDTMB_INIT_PARAM)pArgs)->pDMD_DTMB_InitData);
381 break;
382 case DMD_DTMB_DRV_CMD_SetConfig:
383 ((PDTMB_SET_CONFIG_PARAM)pArgs)->id = 0;
384 case DMD_DTMB_DRV_CMD_MD_SetConfig:
385 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetConfig\n"));
386 u32Ret = psDTMBInstPri->fpSetConfig(((PDTMB_SET_CONFIG_PARAM)pArgs)->id, ((PDTMB_SET_CONFIG_PARAM)pArgs)->eType, ((PDTMB_SET_CONFIG_PARAM)pArgs)->bEnable);
387 break;
388 case DMD_DTMB_DRV_CMD_SetReset:
389 ((PDTMB_ID_PARAM)pArgs)->id = 0;
390 case DMD_DTMB_DRV_CMD_MD_SetReset:
391 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetReset\n"));
392 u32Ret = psDTMBInstPri->fpSetReset(((PDTMB_ID_PARAM)pArgs)->id);
393 break;
394 case DMD_DTMB_DRV_CMD_Set_QAM_SR:
395 ((PDTMB_SET_QAM_SR_PARAM)pArgs)->id = 0;
396 case DMD_DTMB_DRV_CMD_MD_Set_QAM_SR:
397 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_Set_QAM_SR\n"));
398 u32Ret = psDTMBInstPri->fpSet_QAM_SR(((PDTMB_SET_QAM_SR_PARAM)pArgs)->id, ((PDTMB_SET_QAM_SR_PARAM)pArgs)->eType, ((PDTMB_SET_QAM_SR_PARAM)pArgs)->symbol_rate);
399 break;
400 case DMD_DTMB_DRV_CMD_SetActive:
401 ((PDTMB_SET_ACTIVE_PARAM)pArgs)->id = 0;
402 case DMD_DTMB_DRV_CMD_MD_SetActive:
403 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetActive\n"));
404 u32Ret = psDTMBInstPri->fpSetActive(((PDTMB_SET_ACTIVE_PARAM)pArgs)->id, ((PDTMB_SET_ACTIVE_PARAM)pArgs)->bEnable);
405 break;
406 case DMD_DTMB_DRV_CMD_SetPowerState:
407 ((PDTMB_SET_POWER_STATE_PARAM)pArgs)->id = 0;
408 case DMD_DTMB_DRV_CMD_MD_SetPowerState:
409 #if DMD_DTMB_STR_EN
410 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetPowerState\n"));
411 u32Ret = psDTMBInstPri->fpSetPowerState(((PDTMB_SET_POWER_STATE_PARAM)pArgs)->id, ((PDTMB_SET_POWER_STATE_PARAM)pArgs)->u16PowerState);
412 #else
413 printf("DTMBIoctl - Don't support MDrv_DMD_DTMB_MD_SetPowerState\n");
414 #endif
415 break;
416 case DMD_DTMB_DRV_CMD_GetLock:
417 ((PDTMB_GET_LOCK_PARAM)pArgs)->id = 0;
418 case DMD_DTMB_DRV_CMD_MD_GetLock:
419 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetLock\n"));
420 ((PDTMB_GET_LOCK_PARAM)pArgs)->status = psDTMBInstPri->fpGetLock(((PDTMB_GET_LOCK_PARAM)pArgs)->id, ((PDTMB_GET_LOCK_PARAM)pArgs)->eType);
421 u32Ret = TRUE;
422 break;
423 case DMD_DTMB_DRV_CMD_GetModulationMode:
424 ((PDTMB_GET_MODULATION_MODE_PARAM)pArgs)->id = 0;
425 case DMD_DTMB_DRV_CMD_MD_GetModulationMode:
426 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetModulationMode\n"));
427 u32Ret = psDTMBInstPri->fpGetModulationMode(((PDTMB_GET_MODULATION_MODE_PARAM)pArgs)->id, &(((PDTMB_GET_MODULATION_MODE_PARAM)pArgs)->info));
428 break;
429 case DMD_DTMB_DRV_CMD_GetSignalStrength:
430 ((PDTMB_GET_SIGNAL_STRENGTH_PARAM)pArgs)->id = 0;
431 case DMD_DTMB_DRV_CMD_MD_GetSignalStrength:
432 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetSignalStrength\n"));
433 u32Ret = psDTMBInstPri->fpGetSignalStrength(((PDTMB_GET_SIGNAL_STRENGTH_PARAM)pArgs)->id, &(((PDTMB_GET_SIGNAL_STRENGTH_PARAM)pArgs)->u16Strength));
434 break;
435 case DMD_DTMB_DRV_CMD_ReadFrequencyOffset:
436 ((PDTMB_READ_FREQ_OFFSET_PARAM)pArgs)->id = 0;
437 case DMD_DTMB_DRV_CMD_MD_ReadFrequencyOffset:
438 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_ReadFrequencyOffset\n"));
439 u32Ret = psDTMBInstPri->fpReadFrequencyOffset(((PDTMB_READ_FREQ_OFFSET_PARAM)pArgs)->id, &(((PDTMB_READ_FREQ_OFFSET_PARAM)pArgs)->cfo));
440 break;
441 case DMD_DTMB_DRV_CMD_GetSignalQuality:
442 ((PDTMB_GET_SIGNAL_QUALITY_PARAM)pArgs)->id = 0;
443 case DMD_DTMB_DRV_CMD_MD_GetSignalQuality:
444 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetSignalQuality\n"));
445 ((PDTMB_GET_SIGNAL_QUALITY_PARAM)pArgs)->u8Percentage = psDTMBInstPri->fpGetSignalQuality(((PDTMB_GET_SIGNAL_QUALITY_PARAM)pArgs)->id);
446 u32Ret = TRUE;
447 break;
448 case DMD_DTMB_DRV_CMD_GetPreLdpcBer:
449 ((PDTMB_GET_BER_PARAM)pArgs)->id = 0;
450 case DMD_DTMB_DRV_CMD_MD_GetPreLdpcBer:
451 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetPreLdpcBer\n"));
452 u32Ret = psDTMBInstPri->fpGetPreLdpcBer(((PDTMB_GET_BER_PARAM)pArgs)->id, &(((PDTMB_GET_BER_PARAM)pArgs)->ber));
453 break;
454 case DMD_DTMB_DRV_CMD_GetPreViterbiBer:
455 case DMD_DTMB_DRV_CMD_MD_GetPreViterbiBer:
456 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetPreViterbiBer\n"));
457 u32Ret = psDTMBInstPri->fpGetPreViterbiBer(((PDTMB_GET_BER_PARAM)pArgs)->id, &(((PDTMB_GET_BER_PARAM)pArgs)->ber));
458 break;
459 case DMD_DTMB_DRV_CMD_GetPostViterbiBer:
460 ((PDTMB_GET_BER_PARAM)pArgs)->id = 0;
461 case DMD_DTMB_DRV_CMD_MD_GetPostViterbiBer:
462 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetPostViterbiBer\n"));
463 u32Ret = psDTMBInstPri->fpGetPostViterbiBer(((PDTMB_GET_BER_PARAM)pArgs)->id, &(((PDTMB_GET_BER_PARAM)pArgs)->ber));
464 break;
465 case DMD_DTMB_DRV_CMD_GetSNR:
466 ((PDTMB_GET_SNR_PARAM)pArgs)->id = 0;
467 case DMD_DTMB_DRV_CMD_MD_GetSNR:
468 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetSNR\n"));
469 u32Ret = psDTMBInstPri->fpGetSNR(((PDTMB_GET_SNR_PARAM)pArgs)->id, &(((PDTMB_GET_SNR_PARAM)pArgs)->snr));
470 break;
471 case DMD_DTMB_DRV_CMD_SetSerialControl:
472 ((PDTMB_SET_SERIAL_CONTROL_PARAM)pArgs)->id = 0;
473 case DMD_DTMB_DRV_CMD_MD_SetSerialControl:
474 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetSerialControl\n"));
475 u32Ret = psDTMBInstPri->fpSetSerialControl(((PDTMB_SET_SERIAL_CONTROL_PARAM)pArgs)->id, ((PDTMB_SET_SERIAL_CONTROL_PARAM)pArgs)->u8TsConfigData);
476 break;
477 case DMD_DTMB_DRV_CMD_IIC_BYPASS_MODE:
478 ((PDTMB_IIC_BYPASS_MODE_PARAM)pArgs)->id = 0;
479 case DMD_DTMB_DRV_CMD_MD_IIC_BYPASS_MODE:
480 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_IIC_BYPASS_MODE\n"));
481 u32Ret = psDTMBInstPri->fpIIC_BYPASS_MODE(((PDTMB_IIC_BYPASS_MODE_PARAM)pArgs)->id, ((PDTMB_IIC_BYPASS_MODE_PARAM)pArgs)->bEnable);
482 break;
483 case DMD_DTMB_DRV_CMD_SWITCH_SSPI_GPIO:
484 ((PDTMB_SWITCH_SSPI_GPIO_PARAM)pArgs)->id = 0;
485 case DMD_DTMB_DRV_CMD_MD_SWITCH_SSPI_GPIO:
486 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SWITCH_SSPI_GPIO\n"));
487 u32Ret = psDTMBInstPri->fpSWITCH_SSPI_GPIO(((PDTMB_SWITCH_SSPI_GPIO_PARAM)pArgs)->id, ((PDTMB_SWITCH_SSPI_GPIO_PARAM)pArgs)->bEnable);
488 break;
489 case DMD_DTMB_DRV_CMD_GPIO_GET_LEVEL:
490 ((PDTMB_GPIO_LEVEL_PARAM)pArgs)->id = 0;
491 case DMD_DTMB_DRV_CMD_MD_GPIO_GET_LEVEL:
492 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GPIO_GET_LEVEL\n"));
493 u32Ret = psDTMBInstPri->fpGPIO_GET_LEVEL(((PDTMB_GPIO_LEVEL_PARAM)pArgs)->id, ((PDTMB_GPIO_LEVEL_PARAM)pArgs)->u8Pin, &(((PDTMB_GPIO_LEVEL_PARAM)pArgs)->bLevel));
494 break;
495 case DMD_DTMB_DRV_CMD_GPIO_SET_LEVEL:
496 ((PDTMB_GPIO_LEVEL_PARAM)pArgs)->id = 0;
497 case DMD_DTMB_DRV_CMD_MD_GPIO_SET_LEVEL:
498 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GPIO_SET_LEVEL\n"));
499 u32Ret = psDTMBInstPri->fpGPIO_SET_LEVEL(((PDTMB_GPIO_LEVEL_PARAM)pArgs)->id, ((PDTMB_GPIO_LEVEL_PARAM)pArgs)->u8Pin, ((PDTMB_GPIO_LEVEL_PARAM)pArgs)->bLevel);
500 break;
501 case DMD_DTMB_DRV_CMD_GPIO_OUT_ENABLE:
502 ((PDTMB_GPIO_OUT_ENABLE_PARAM)pArgs)->id = 0;
503 case DMD_DTMB_DRV_CMD_MD_GPIO_OUT_ENABLE:
504 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GPIO_OUT_ENABLE\n"));
505 u32Ret = psDTMBInstPri->fpGPIO_OUT_ENABLE(((PDTMB_GPIO_OUT_ENABLE_PARAM)pArgs)->id, ((PDTMB_GPIO_OUT_ENABLE_PARAM)pArgs)->u8Pin, ((PDTMB_GPIO_OUT_ENABLE_PARAM)pArgs)->bEnableOut);
506 break;
507 case DMD_DTMB_DRV_CMD_DoIQSwap:
508 ((PDTMB_DO_IQSWAP_PARAM)pArgs)->id = 0;
509 case DMD_DTMB_DRV_CMD_MD_DoIQSwap:
510 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_DoIQSwap\n"));
511 u32Ret = psDTMBInstPri->fpDoIQSwap(((PDTMB_DO_IQSWAP_PARAM)pArgs)->id, ((PDTMB_DO_IQSWAP_PARAM)pArgs)->bIsQPad);
512 break;
513 case DMD_DTMB_DRV_CMD_GetReg:
514 ((PDTMB_REG_PARAM)pArgs)->id = 0;
515 case DMD_DTMB_DRV_CMD_MD_GetReg:
516 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_GetReg\n"));
517 u32Ret = psDTMBInstPri->fpGetReg(((PDTMB_REG_PARAM)pArgs)->id, ((PDTMB_REG_PARAM)pArgs)->u16Addr, &(((PDTMB_REG_PARAM)pArgs)->u8Data));
518 break;
519 case DMD_DTMB_DRV_CMD_SetReg:
520 ((PDTMB_REG_PARAM)pArgs)->id = 0;
521 case DMD_DTMB_DRV_CMD_MD_SetReg:
522 DMD_DBG(printf("DTMBIoctl - MDrv_DMD_DTMB_MD_SetReg\n"));
523 u32Ret = psDTMBInstPri->fpSetReg(((PDTMB_REG_PARAM)pArgs)->id, ((PDTMB_REG_PARAM)pArgs)->u16Addr, ((PDTMB_REG_PARAM)pArgs)->u8Data);
524 break;
525 default:
526 break;
527 }
528
529 UtopiaResourceRelease(pResource);
530
531 return (u32Ret ? UTOPIA_STATUS_SUCCESS : UTOPIA_STATUS_FAIL);
532 }
533
DTMBClose(void * pInstance)534 MS_U32 DTMBClose(void* pInstance)
535 {
536 UtopiaInstanceDelete(pInstance);
537
538 return UTOPIA_STATUS_SUCCESS;
539 }
540
DTMBRegisterToUtopia(FUtopiaOpen ModuleType)541 void DTMBRegisterToUtopia(FUtopiaOpen ModuleType)
542 {
543 // 1. deal with module
544 void* pUtopiaModule = NULL;
545 UtopiaModuleCreate(MODULE_DTMB, 8, &pUtopiaModule);
546 UtopiaModuleRegister(pUtopiaModule);
547 // register func for module, after register here, then ap call UtopiaOpen/UtopiaIoctl/UtopiaClose can call to these registered standard func
548 UtopiaModuleSetupFunctionPtr(pUtopiaModule, (FUtopiaOpen)DTMBOpen, (FUtopiaClose)DTMBClose, (FUtopiaIOctl)DTMBIoctl);
549 // register func for module, after register here, then ap call UtopiaSTR can call to registered standard func
550 #if DMD_DTMB_STR_EN
551 UtopiaModuleSetupSTRFunctionPtr(pUtopiaModule, (FUtopiaSTR)DTMBStr);
552 #endif
553
554 // 2. deal with resource
555 void* psResource = NULL;
556 // start func to add res, call once will create 2 access in resource. Also can declare BDMA_POOL_ID_BDMA1 for another channel depend on driver owner.
557 UtopiaModuleAddResourceStart(pUtopiaModule, DTMB_POOL_ID_DMD0);
558 // resource can alloc private for internal use, ex, BDMA_RESOURCE_PRIVATE
559 UtopiaResourceCreate("dtmb0", sizeof(DTMB_RESOURCE_PRIVATE), &psResource);
560 // func to reg res
561 UtopiaResourceRegister(pUtopiaModule, psResource, DTMB_POOL_ID_DMD0);
562 // end function to add res
563 UtopiaModuleAddResourceEnd(pUtopiaModule, DTMB_POOL_ID_DMD0);
564 }
565
566 #endif // #ifdef UTPA2
567