1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define ENABLE_AUDIO_DEC_R2_BIN FALSE //�ѩ�Milan DDR�Ŷ��ܺ�Adefault �Hflash load code �Ӹ`��r2 code ��audio lib��DDR�Ŷ�
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include <string.h>
102
103 #include "MsCommon.h"
104 #include "MsIRQ.h"
105 #include "MsOS.h"
106 #include "MsTypes.h"
107
108 #include "drvBDMA.h"
109 #include "drvSERFLASH.h"
110
111 #include "regCHIP.h"
112
113 #include "halAUDSP.h"
114 #include "drvAUDIO.h"
115 #include "regAUDIO.h"
116 #include "halAUDIO.h"
117 #include "halMAD2.h"
118 #include "halSIF.h"
119 #include "halADVAUDIO.h"
120 #include "ddr_config.h"
121 #include "r2_shm_comm.h"
122 #include "decR2_shm.h"
123 #if ASND_R2_SUPPORT
124 #include "sndR2_shm.h"
125 #endif
126
127 #ifdef CONFIG_MBOOT//Mboot Mini system
128 #include "dspcode_s/aucode_s.c"
129 #include "dspcode_s/aucode_dec.c"
130 #include "dspcode_s/aucode_mboot_r2.c"
131 #else
132 #include "dspcode_s/aucode_palsum.c"
133 #include "dspcode_s/aucode_btsc.c"
134 #include "dspcode_s/aucode_s.c"
135 #include "dspcode_s/aucode_dec.c"
136 #include "dspcode_s/aucode_adec_r2.c"
137 #if ASND_R2_SUPPORT
138 #include "dspcode_s/aucode_asnd_r2.c"
139 #endif
140 #include "dspcode_s/aucode_dde.c"
141 #include "dspcode_s/aucode_ms10_dde.c"
142
143 #include "dspcode_adv/aucode_puresnd.c"
144 #include "dspcode_adv/aucode_dps.c"
145 #include "dspcode_adv/aucode_dbx.c"
146 #endif
147
148
149
150 #if defined(MSOS_TYPE_NUTTX)
151 extern int lib_lowprintf(const char *format, ...);
152 #define DBG_PREFIX lib_lowprintf
153 #else
154 #define DBG_PREFIX printf
155 #endif
156
157 #if (defined ANDROID)
158 #include <sys/mman.h>
159 #include <cutils/ashmem.h>
160 #include <cutils/log.h>
161
162 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
163 #define LOGI ALOGI
164 #endif
165
166 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
167 #define LOGE ALOGE
168 #endif
169
170 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
171 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
172 #else
173 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
174 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
175 #endif
176
177 #define HALAUDSP_CHECK_SHM_INIT \
178 do { \
179 if (g_AudioVars2 == NULL) \
180 { \
181 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
182 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
183 if (HAL_AUDIO_InitialVars() == FALSE) \
184 { \
185 MS_ASSERT(0); \
186 } \
187 } \
188 } while(0)
189
190 //-------------------------------------------------------------------------------------------------
191 // Driver Compiler Options
192 //-------------------------------------------------------------------------------------------------
193
194 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
195 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
196 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
197
198 #ifdef CONFIG_MBOOT //mboot Speed up
199 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
200 // 1: verify dsp code (for debug)
201 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
202 // 1: check IDMA ready (for debug)
203 #else
204 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
205 // 1: verify dsp code (for debug)
206 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
207 // 1: check IDMA ready (for debug)
208 #endif
209
210 #define AU_NULL 0
211
212 #ifdef CONFIG_MBOOT
213 #define FLASH_COPY(x,y,z,i,j) TRUE
214 #define FLASH_CHKDONE() TRUE
215 #else
216 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
217 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
218 #endif
219
220 LOAD_CODE_INFO g_loadcodeinfo;
221 MS_BOOL g_bDSPLoadCode = FALSE;
222
223 #ifndef CONFIG_MBOOT
224 AUDIO_ALG_INFO audio_se_dec_info[]=
225 {
226 // ---------- Decoder2 DSP Code ----------
227 //AU_DVB_SYS_NONE[0]
228 {
229 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
230 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
231 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
232 AU_NULL, AU_NULL, AU_NULL,
233 "SE dec_none",
234 },
235
236 //MPEG_AD[1]
237 {
238 AU_NULL, AU_NULL, AU_NULL,
239 AU_NULL, AU_NULL, AU_NULL,
240 AU_NULL, AU_NULL, AU_NULL,
241 AU_NULL, AU_NULL, AU_NULL,
242 "mpeg_ad",
243 },
244
245 //AC3_AD[2]
246 {
247 AU_NULL, AU_NULL, AU_NULL,
248 AU_NULL, AU_NULL, AU_NULL,
249 AU_NULL, AU_NULL, AU_NULL,
250 AU_NULL, AU_NULL, AU_NULL,
251 "ac3_ad",
252 },
253
254 //AC3P_AD[3]
255 {
256 AU_NULL, AU_NULL, AU_NULL,
257 AU_NULL, AU_NULL, AU_NULL,
258 AU_NULL, AU_NULL, AU_NULL,
259 AU_NULL, AU_NULL, AU_NULL,
260 "ac3p_ad",
261 },
262
263 //AAC_AD[4]
264 {
265 AU_NULL, AU_NULL, AU_NULL,
266 AU_NULL, AU_NULL, AU_NULL,
267 AU_NULL, AU_NULL, AU_NULL,
268 AU_NULL, AU_NULL, AU_NULL,
269 "aac_ad",
270 },
271
272 //DDE[5]
273 {
274 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
275 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
276 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
277 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
278 "dde",
279 },
280
281 //GAAC_AD[6]
282 {
283 AU_NULL, AU_NULL, AU_NULL,
284 AU_NULL, AU_NULL, AU_NULL,
285 AU_NULL, AU_NULL, AU_NULL,
286 AU_NULL, AU_NULL, AU_NULL,
287 "gaac_ad"
288 },
289
290 //MP3[7]
291 {
292 AU_NULL, AU_NULL, AU_NULL,
293 AU_NULL, AU_NULL, AU_NULL,
294 AU_NULL, AU_NULL, AU_NULL,
295 AU_NULL, AU_NULL, AU_NULL,
296 "mp3",
297 },
298
299 //mpeg_en[8]
300 {
301 AU_NULL, AU_NULL, AU_NULL,
302 AU_NULL, AU_NULL, AU_NULL,
303 AU_NULL, AU_NULL, AU_NULL,
304 AU_NULL, AU_NULL, AU_NULL,
305 "mpeg_en",
306 },
307
308 //XPCM2[9]
309 {
310 AU_NULL, AU_NULL, AU_NULL,
311 AU_NULL, AU_NULL, AU_NULL,
312 AU_NULL, AU_NULL, AU_NULL,
313 AU_NULL, AU_NULL, AU_NULL,
314 "XPCM2",
315 },
316
317 //KTV[A]
318 {
319 AU_NULL, AU_NULL, AU_NULL,
320 AU_NULL, AU_NULL, AU_NULL,
321 AU_NULL, AU_NULL, AU_NULL,
322 AU_NULL, AU_NULL, AU_NULL,
323 "KTV",
324 },
325
326 //KTV2[B]
327 {
328 AU_NULL, AU_NULL, AU_NULL,
329 AU_NULL, AU_NULL, AU_NULL,
330 AU_NULL, AU_NULL, AU_NULL,
331 AU_NULL, AU_NULL, AU_NULL,
332 "KTV2",
333 },
334 };
335
336 AUDIO_ALG_INFO audio_snd_mm_dec_info[]=
337 {
338 //DEC_NONE[0]
339 {
340 AU_NULL, AU_NULL, AU_NULL,
341 AU_NULL, AU_NULL, AU_NULL,
342 AU_NULL, AU_NULL, AU_NULL,
343 AU_NULL, AU_NULL, AU_NULL,
344 "DEC none",
345 },
346
347 //DEC_DEC_NONE[1]
348 {
349 AU_NULL, AU_NULL, AU_NULL,
350 AU_NULL, AU_NULL, AU_NULL,
351 AU_NULL, AU_NULL, AU_NULL,
352 AU_NULL, AU_NULL, AU_NULL,
353 "DEC none",
354 },
355
356 //DEC_ENC_NONE[2]
357 {
358 AU_NULL, AU_NULL, AU_NULL,
359 AU_NULL, AU_NULL, AU_NULL,
360 AU_NULL, AU_NULL, AU_NULL,
361 AU_NULL, AU_NULL, AU_NULL,
362 "DEC none",
363 },
364
365 //MPEG[3]
366 {
367 AU_NULL, AU_NULL, AU_NULL,
368 AU_NULL, AU_NULL, AU_NULL,
369 AU_NULL, AU_NULL, AU_NULL,
370 AU_NULL, AU_NULL, AU_NULL,
371 "mpeg2",
372 },
373
374 //AC3[4]
375 {
376 AU_NULL, AU_NULL, AU_NULL,
377 AU_NULL, AU_NULL, AU_NULL,
378 AU_NULL, AU_NULL, AU_NULL,
379 AU_NULL, AU_NULL, AU_NULL,
380 "ac3p_2"
381 },
382
383 //AC3+[5]
384 {
385 AU_NULL, AU_NULL, AU_NULL,
386 AU_NULL, AU_NULL, AU_NULL,
387 AU_NULL, AU_NULL, AU_NULL,
388 AU_NULL, AU_NULL, AU_NULL,
389 "ac3p_2"
390 },
391
392 //AAC[6]
393 {
394 AU_NULL, AU_NULL, AU_NULL,
395 AU_NULL, AU_NULL, AU_NULL,
396 AU_NULL, AU_NULL, AU_NULL,
397 AU_NULL, AU_NULL, AU_NULL,
398 "aac2"
399 },
400
401 //MP3[7]
402 {
403 AU_NULL, AU_NULL, AU_NULL,
404 AU_NULL, AU_NULL, AU_NULL,
405 AU_NULL, AU_NULL, AU_NULL,
406 AU_NULL, AU_NULL, AU_NULL,
407 "mp3_2",
408 },
409
410 //WMA[8]
411 {
412 AU_NULL, AU_NULL, AU_NULL,
413 AU_NULL, AU_NULL, AU_NULL,
414 AU_NULL, AU_NULL, AU_NULL,
415 AU_NULL, AU_NULL, AU_NULL,
416 "wma2"
417 },
418
419 //Reserved3[9]
420 {
421 AU_NULL, AU_NULL, AU_NULL,
422 AU_NULL, AU_NULL, AU_NULL,
423 AU_NULL, AU_NULL, AU_NULL,
424 AU_NULL, AU_NULL, AU_NULL,
425 "Reserved3",
426 },
427
428 //RM[A]
429 {
430 AU_NULL, AU_NULL, AU_NULL,
431 AU_NULL, AU_NULL, AU_NULL,
432 AU_NULL, AU_NULL, AU_NULL,
433 AU_NULL, AU_NULL, AU_NULL,
434 "cook2",
435 },
436
437 //XPCM[B]
438 {
439 AU_NULL, AU_NULL, AU_NULL,
440 AU_NULL, AU_NULL, AU_NULL,
441 AU_NULL, AU_NULL, AU_NULL,
442 AU_NULL, AU_NULL, AU_NULL,
443 "xpcm2",
444 },
445
446 //TONE[C]
447 {
448 AU_NULL, AU_NULL, AU_NULL,
449 AU_NULL, AU_NULL, AU_NULL,
450 AU_NULL, AU_NULL, AU_NULL,
451 AU_NULL, AU_NULL, AU_NULL,
452 "tone",
453 },
454
455 //DTS[D]
456 {
457 AU_NULL, AU_NULL, AU_NULL,
458 AU_NULL, AU_NULL, AU_NULL,
459 AU_NULL, AU_NULL, AU_NULL,
460 AU_NULL, AU_NULL, AU_NULL,
461 "dts2",
462 },
463
464 //MS10_DDT[E]
465 {
466 AU_NULL, AU_NULL, AU_NULL,
467 AU_NULL, AU_NULL, AU_NULL,
468 AU_NULL, AU_NULL, AU_NULL,
469 AU_NULL, AU_NULL, AU_NULL,
470 "ms10_ddt2",
471 },
472
473 //MS10_DDC[F]
474 {
475 AU_NULL, AU_NULL, AU_NULL,
476 AU_NULL, AU_NULL, AU_NULL,
477 AU_NULL, AU_NULL, AU_NULL,
478 AU_NULL, AU_NULL, AU_NULL,
479 "null",
480 },
481
482 //WMA_PRO[10]
483 {
484 AU_NULL, AU_NULL, AU_NULL,
485 AU_NULL, AU_NULL, AU_NULL,
486 AU_NULL, AU_NULL, AU_NULL,
487 AU_NULL, AU_NULL, AU_NULL,
488 "wma_pro2"
489 },
490
491 //FLAC[11]
492 {
493 AU_NULL, AU_NULL, AU_NULL,
494 AU_NULL, AU_NULL, AU_NULL,
495 AU_NULL, AU_NULL, AU_NULL,
496 AU_NULL, AU_NULL, AU_NULL,
497 "flac",
498 },
499
500 //VORBIS[12]
501 {
502 AU_NULL, AU_NULL, AU_NULL,
503 AU_NULL, AU_NULL, AU_NULL,
504 AU_NULL, AU_NULL, AU_NULL,
505 AU_NULL, AU_NULL, AU_NULL,
506 "vorbis_2",
507 },
508
509 //DTSLBR[13]
510 {
511 AU_NULL, AU_NULL, AU_NULL,
512 AU_NULL, AU_NULL, AU_NULL,
513 AU_NULL, AU_NULL, AU_NULL,
514 AU_NULL, AU_NULL, AU_NULL,
515 "dtslbr",
516 },
517
518 //AMR_NB[14]
519 {
520 AU_NULL, AU_NULL, AU_NULL,
521 AU_NULL, AU_NULL, AU_NULL,
522 AU_NULL, AU_NULL, AU_NULL,
523 AU_NULL, AU_NULL, AU_NULL,
524 "amr_nb2",
525 },
526
527 //AMR_WB[15]
528 {
529 AU_NULL, AU_NULL, AU_NULL,
530 AU_NULL, AU_NULL, AU_NULL,
531 AU_NULL, AU_NULL, AU_NULL,
532 AU_NULL, AU_NULL, AU_NULL,
533 "amr_wb2",
534 },
535 };
536
537 AUDIO_ALG_INFO audio_adv_sndeff_info[] =
538 {
539 //PL2, 0
540 {
541 AU_NULL, AU_NULL, AU_NULL,
542 AU_NULL, AU_NULL, AU_NULL,
543 AU_NULL, AU_NULL, AU_NULL,
544 AU_NULL, AU_NULL, AU_NULL,
545 "null",
546 },
547
548 //BBE, 1
549 {
550 AU_NULL, AU_NULL, AU_NULL,
551 AU_NULL, AU_NULL, AU_NULL,
552 AU_NULL, AU_NULL, AU_NULL,
553 AU_NULL, AU_NULL, AU_NULL,
554 "null",
555 },
556
557 //SRS, 2
558 {
559 AU_NULL, AU_NULL, AU_NULL,
560 AU_NULL, AU_NULL, AU_NULL,
561 AU_NULL, AU_NULL, AU_NULL,
562 AU_NULL, AU_NULL, AU_NULL,
563 "null",
564 },
565
566 //VDS, 3
567 {
568 AU_NULL, AU_NULL, AU_NULL,
569 AU_NULL, AU_NULL, AU_NULL,
570 AU_NULL, AU_NULL, AU_NULL,
571 AU_NULL, AU_NULL, AU_NULL,
572 "null",
573 },
574
575 //VSPK, 4
576 {
577 AU_NULL, AU_NULL, AU_NULL,
578 AU_NULL, AU_NULL, AU_NULL,
579 AU_NULL, AU_NULL, AU_NULL,
580 AU_NULL, AU_NULL, AU_NULL,
581 "null",
582 },
583
584 //SUPV, 5
585 {
586 AU_NULL, AU_NULL, AU_NULL,
587 AU_NULL, AU_NULL, AU_NULL,
588 AU_NULL, AU_NULL, AU_NULL,
589 AU_NULL, AU_NULL, AU_NULL,
590 "null",
591 },
592
593 //TSHD, 6
594 {
595 AU_NULL, AU_NULL, AU_NULL,
596 AU_NULL, AU_NULL, AU_NULL,
597 AU_NULL, AU_NULL, AU_NULL,
598 AU_NULL, AU_NULL, AU_NULL,
599 "tshd",
600 },
601
602 //XEN, 7
603 {
604 AU_NULL, AU_NULL, AU_NULL,
605 AU_NULL, AU_NULL, AU_NULL,
606 AU_NULL, AU_NULL, AU_NULL,
607 AU_NULL, AU_NULL, AU_NULL,
608 "null",
609 },
610
611 //TSHDVIQ, 8
612 {
613 AU_NULL, AU_NULL, AU_NULL,
614 AU_NULL, AU_NULL, AU_NULL,
615 AU_NULL, AU_NULL, AU_NULL,
616 AU_NULL, AU_NULL, AU_NULL,
617 "null",
618 },
619
620 //ADV, 9
621 {
622 AU_NULL, AU_NULL, AU_NULL,
623 AU_NULL, AU_NULL, AU_NULL,
624 AU_NULL, AU_NULL, AU_NULL,
625 AU_NULL, AU_NULL, AU_NULL,
626 "null",
627 },
628
629 //DBX, 10
630 {
631 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1 + 6,
632 AU_NULL, AU_NULL, AU_NULL,
633 AU_NULL, AU_NULL, AU_NULL,
634 AU_NULL, AU_NULL, AU_NULL,
635 "dbx",
636 },
637
638 //THEATERSOUND, 11
639 {
640 AU_NULL, AU_NULL, AU_NULL,
641 AU_NULL, AU_NULL, AU_NULL,
642 AU_NULL, AU_NULL, AU_NULL,
643 AU_NULL, AU_NULL, AU_NULL,
644 "theather sound",
645 },
646
647 //PURESND, 12
648 {
649 MST_CODEC_PURESND_PM1_ADDR, MST_CODEC_PURESND_PM1_SIZE, mst_codec_puresnd_pm1 + 6,
650 AU_NULL, AU_NULL, AU_NULL,
651 MST_CODEC_PURESND_PM3_ADDR, MST_CODEC_PURESND_PM3_SIZE, mst_codec_puresnd_pm3 + 6,
652 MST_CODEC_PURESND_PM4_ADDR, MST_CODEC_PURESND_PM4_SIZE, mst_codec_puresnd_pm4 + 6,
653 "puresnd",
654 },
655
656 //STUDIOSOUND_3D, 13
657 {
658 AU_NULL, AU_NULL, AU_NULL,
659 AU_NULL, AU_NULL, AU_NULL,
660 AU_NULL, AU_NULL, AU_NULL,
661 AU_NULL, AU_NULL, AU_NULL,
662 "null",
663 },
664
665 //DPS, 14
666 {
667 MST_CODEC_DPS_PM1_ADDR, MST_CODEC_DPS_PM1_SIZE, mst_codec_dps_pm1 + 6,
668 AU_NULL, AU_NULL, AU_NULL,
669 MST_CODEC_DPS_PM3_ADDR, MST_CODEC_DPS_PM3_SIZE, mst_codec_dps_pm3 + 6,
670 AU_NULL, AU_NULL, AU_NULL,
671 "BONGIOVI DPS",
672 },
673 };
674
675 AUDIO_ALG_INFO audio_soundeffect_info[]=
676 {
677 // SE System
678 {
679 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
680 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
681 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
682 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
683 "T12 SE system"
684 },
685 };
686
687 AUDIO_ALG_INFO audio_sif_dec_info[]=
688 {
689 //NONE
690 {
691 AU_NULL, AU_NULL, AU_NULL,
692 AU_NULL, AU_NULL, AU_NULL,
693 AU_NULL, AU_NULL, AU_NULL,
694 AU_NULL, AU_NULL, AU_NULL,
695 "NULL",
696 },
697
698 //BTSC[0]
699 {
700 MST_CODEC_SIF_BTSC_PM1_ADDR, MST_CODEC_SIF_BTSC_PM1_SIZE, mst_codec_sif_btsc_pm1 + 6,
701 MST_CODEC_SIF_BTSC_PM2_ADDR, MST_CODEC_SIF_BTSC_PM2_SIZE, mst_codec_sif_btsc_pm2 + 6,
702 MST_CODEC_SIF_BTSC_PM3_ADDR, MST_CODEC_SIF_BTSC_PM3_SIZE, mst_codec_sif_btsc_pm3 + 6,
703 AU_NULL, AU_NULL, AU_NULL,
704 "BTSC",
705 },
706
707 //EIAJ[1]
708 {
709 AU_NULL, AU_NULL, AU_NULL,
710 AU_NULL, AU_NULL, AU_NULL,
711 AU_NULL, AU_NULL, AU_NULL,
712 AU_NULL, AU_NULL, AU_NULL,
713 "EIAJ",
714 },
715
716 //palsum[2]
717 {
718 MST_CODEC_SIF_PALSUM_PM1_ADDR, MST_CODEC_SIF_PALSUM_PM1_SIZE, mst_codec_sif_palsum_pm1 + 6,
719 MST_CODEC_SIF_PALSUM_PM2_ADDR, MST_CODEC_SIF_PALSUM_PM2_SIZE, mst_codec_sif_palsum_pm2 + 6,
720 MST_CODEC_SIF_PALSUM_PM3_ADDR, MST_CODEC_SIF_PALSUM_PM3_SIZE, mst_codec_sif_palsum_pm3 + 6,
721 AU_NULL, AU_NULL, AU_NULL,
722 "PAL-SUM",
723 },
724
725 //palsum[3]
726 {
727 AU_NULL, AU_NULL, AU_NULL,
728 AU_NULL, AU_NULL, AU_NULL,
729 AU_NULL, AU_NULL, AU_NULL,
730 AU_NULL, AU_NULL, AU_NULL,
731 "PAL-SUM-VIF-42M",
732 },
733
734 //palsum[4]
735 {
736 AU_NULL, AU_NULL, AU_NULL,
737 AU_NULL, AU_NULL, AU_NULL,
738 AU_NULL, AU_NULL, AU_NULL,
739 AU_NULL, AU_NULL, AU_NULL,
740 "PAL-SUM-VIF-44M",
741 },
742
743 //FM_RADIO[5]
744 {
745 AU_NULL, AU_NULL, AU_NULL,
746 AU_NULL, AU_NULL, AU_NULL,
747 AU_NULL, AU_NULL, AU_NULL,
748 AU_NULL, AU_NULL, AU_NULL,
749 "FM-RADIO",
750 },
751 };
752
753 AUDIO_ALG_INFO audio_se_enc_info[]=
754 {
755 // ---------- Decoder2 DSP Code ----------
756 //AU_DVB_SYS_NONE[0]
757 {
758 AU_NULL, AU_NULL, AU_NULL,
759 AU_NULL, AU_NULL, AU_NULL,
760 AU_NULL, AU_NULL, AU_NULL,
761 AU_NULL, AU_NULL, AU_NULL,
762 "Enc_none",
763 },
764
765 //DTSE[1]
766 {
767 AU_NULL, AU_NULL, AU_NULL,
768 AU_NULL, AU_NULL, AU_NULL,
769 AU_NULL, AU_NULL, AU_NULL,
770 AU_NULL, AU_NULL, AU_NULL,
771 "DTSE",
772 },
773
774 //MS10-DDE[2]
775 {
776 MST_CODEC_MS10_DDE_PM1_ADDR, MST_CODEC_MS10_DDE_PM1_SIZE, mst_codec_ms10_dde_pm1 + 6,
777 MST_CODEC_MS10_DDE_PM2_ADDR, MST_CODEC_MS10_DDE_PM2_SIZE, mst_codec_ms10_dde_pm2 + 6,
778 MST_CODEC_MS10_DDE_PM3_ADDR, MST_CODEC_MS10_DDE_PM3_SIZE, mst_codec_ms10_dde_pm3 + 6,
779 MST_CODEC_MS10_DDE_PM4_ADDR, MST_CODEC_MS10_DDE_PM4_SIZE, mst_codec_ms10_dde_pm4 + 6,
780 "MS10-DDE",
781 },
782
783 //DDE[3]
784 {
785 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
786 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
787 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
788 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
789 "DDE",
790 },
791 };
792
793 #else //=======================CONFIG_MBOOT=========================================//
794 AUDIO_ALG_INFO audio_se_dec_info[]=
795 {
796 // ---------- Decoder2 DSP Code ----------
797 //AU_DVB_SYS_NONE[0]
798 {
799 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
800 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
801 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
802 AU_NULL, AU_NULL, AU_NULL,
803 "SE dec_none",
804 },
805
806 //MPEG_AD[1]
807 {
808 AU_NULL, AU_NULL, AU_NULL,
809 AU_NULL, AU_NULL, AU_NULL,
810 AU_NULL, AU_NULL, AU_NULL,
811 AU_NULL, AU_NULL, AU_NULL,
812 AU_NULL,
813 },
814
815 //AC3_AD[2]
816 {
817 AU_NULL, AU_NULL, AU_NULL,
818 AU_NULL, AU_NULL, AU_NULL,
819 AU_NULL, AU_NULL, AU_NULL,
820 AU_NULL, AU_NULL, AU_NULL,
821 AU_NULL,
822 },
823
824 //AC3P_AD[3]
825 {
826 AU_NULL, AU_NULL, AU_NULL,
827 AU_NULL, AU_NULL, AU_NULL,
828 AU_NULL, AU_NULL, AU_NULL,
829 AU_NULL, AU_NULL, AU_NULL,
830 AU_NULL,
831 },
832
833 //AAC_AD[4]
834 {
835 AU_NULL, AU_NULL, AU_NULL,
836 AU_NULL, AU_NULL, AU_NULL,
837 AU_NULL, AU_NULL, AU_NULL,
838 AU_NULL, AU_NULL, AU_NULL,
839 AU_NULL,
840 },
841
842 //DDE[5]
843 {
844 AU_NULL, AU_NULL, AU_NULL,
845 AU_NULL, AU_NULL, AU_NULL,
846 AU_NULL, AU_NULL, AU_NULL,
847 AU_NULL, AU_NULL, AU_NULL,
848 AU_NULL,
849 },
850
851 //GAAC_AD[6]
852 {
853 AU_NULL, AU_NULL, AU_NULL,
854 AU_NULL, AU_NULL, AU_NULL,
855 AU_NULL, AU_NULL, AU_NULL,
856 AU_NULL, AU_NULL, AU_NULL,
857 AU_NULL,
858 },
859
860 //MP3[7]
861 {
862 AU_NULL, AU_NULL, AU_NULL,
863 AU_NULL, AU_NULL, AU_NULL,
864 AU_NULL, AU_NULL, AU_NULL,
865 AU_NULL, AU_NULL, AU_NULL,
866 AU_NULL,
867 },
868
869 //mpeg_en[8]
870 {
871 AU_NULL, AU_NULL, AU_NULL,
872 AU_NULL, AU_NULL, AU_NULL,
873 AU_NULL, AU_NULL, AU_NULL,
874 AU_NULL, AU_NULL, AU_NULL,
875 AU_NULL,
876 },
877
878 //XPCM2[9]
879 {
880 AU_NULL, AU_NULL, AU_NULL,
881 AU_NULL, AU_NULL, AU_NULL,
882 AU_NULL, AU_NULL, AU_NULL,
883 AU_NULL, AU_NULL, AU_NULL,
884 AU_NULL,
885 },
886
887 //KTV[A]
888 {
889 AU_NULL, AU_NULL, AU_NULL,
890 AU_NULL, AU_NULL, AU_NULL,
891 AU_NULL, AU_NULL, AU_NULL,
892 AU_NULL, AU_NULL, AU_NULL,
893 AU_NULL,
894 },
895
896 //KTV2[B]
897 {
898 AU_NULL, AU_NULL, AU_NULL,
899 AU_NULL, AU_NULL, AU_NULL,
900 AU_NULL, AU_NULL, AU_NULL,
901 AU_NULL, AU_NULL, AU_NULL,
902 AU_NULL,
903 },
904 };
905
906 AUDIO_ALG_INFO audio_snd_mm_dec_info[]=
907 {
908 //DEC_NONE[0]
909 {
910 AU_NULL, AU_NULL, AU_NULL,
911 AU_NULL, AU_NULL, AU_NULL,
912 AU_NULL, AU_NULL, AU_NULL,
913 AU_NULL, AU_NULL, AU_NULL,
914 "DEC none",
915 },
916 };
917
918 AUDIO_ALG_INFO audio_soundeffect_info[]=
919 {
920 // SE System
921 {
922 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
923 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
924 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
925 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
926 "T12 SE system"
927 },
928 };
929
930 AUDIO_ALG_INFO audio_sif_dec_info[]=
931 {
932 //NONE
933 {
934 AU_NULL, AU_NULL, AU_NULL,
935 AU_NULL, AU_NULL, AU_NULL,
936 AU_NULL, AU_NULL, AU_NULL,
937 AU_NULL, AU_NULL, AU_NULL,
938 "NULL",
939 },
940
941 //BTSC[0]
942 {
943 AU_NULL, AU_NULL, AU_NULL,
944 AU_NULL, AU_NULL, AU_NULL,
945 AU_NULL, AU_NULL, AU_NULL,
946 AU_NULL, AU_NULL, AU_NULL,
947 AU_NULL,
948 },
949 //EIAJ[1]
950 {
951 AU_NULL, AU_NULL, AU_NULL,
952 AU_NULL, AU_NULL, AU_NULL,
953 AU_NULL, AU_NULL, AU_NULL,
954 AU_NULL, AU_NULL, AU_NULL,
955 AU_NULL,
956 },
957 //palsum[2]
958 {
959 AU_NULL, AU_NULL, AU_NULL,
960 AU_NULL, AU_NULL, AU_NULL,
961 AU_NULL, AU_NULL, AU_NULL,
962 AU_NULL, AU_NULL, AU_NULL,
963 AU_NULL,
964 },
965 //palsum[3]
966 {
967 AU_NULL, AU_NULL, AU_NULL,
968 AU_NULL, AU_NULL, AU_NULL,
969 AU_NULL, AU_NULL, AU_NULL,
970 AU_NULL, AU_NULL, AU_NULL,
971 AU_NULL,
972 },
973 //palsum[4]
974 {
975 AU_NULL, AU_NULL, AU_NULL,
976 AU_NULL, AU_NULL, AU_NULL,
977 AU_NULL, AU_NULL, AU_NULL,
978 AU_NULL, AU_NULL, AU_NULL,
979 AU_NULL,
980 },
981 //FM_RADIO[5]
982 {
983 AU_NULL, AU_NULL, AU_NULL,
984 AU_NULL, AU_NULL, AU_NULL,
985 AU_NULL, AU_NULL, AU_NULL,
986 AU_NULL, AU_NULL, AU_NULL,
987 AU_NULL,
988 },
989
990 };
991
992 AUDIO_ALG_INFO audio_adv_sndeff_info[] =
993 {
994
995 //PL2, 0
996 {
997 AU_NULL, AU_NULL, AU_NULL,
998 AU_NULL, AU_NULL, AU_NULL,
999 AU_NULL, AU_NULL, AU_NULL,
1000 AU_NULL, AU_NULL, AU_NULL,
1001 "pl2",
1002 },
1003 //BBE, 1
1004 {
1005 AU_NULL, AU_NULL, AU_NULL,
1006 AU_NULL, AU_NULL, AU_NULL,
1007 AU_NULL, AU_NULL, AU_NULL,
1008 AU_NULL, AU_NULL, AU_NULL,
1009 "null",
1010 },
1011 //SRS, 2
1012 {
1013 AU_NULL, AU_NULL, AU_NULL,
1014 AU_NULL, AU_NULL, AU_NULL,
1015 AU_NULL, AU_NULL, AU_NULL,
1016 AU_NULL, AU_NULL, AU_NULL,
1017 "null",
1018 },
1019 //VDS, 3
1020 {
1021 AU_NULL, AU_NULL, AU_NULL,
1022 AU_NULL, AU_NULL, AU_NULL,
1023 AU_NULL, AU_NULL, AU_NULL,
1024 AU_NULL, AU_NULL, AU_NULL,
1025 "null",
1026 },
1027 //VSPK, 4
1028 {
1029 AU_NULL, AU_NULL, AU_NULL,
1030 AU_NULL, AU_NULL, AU_NULL,
1031 AU_NULL, AU_NULL, AU_NULL,
1032 AU_NULL, AU_NULL, AU_NULL,
1033 "null",
1034 },
1035 //SUPV, 5
1036 {
1037 AU_NULL, AU_NULL, AU_NULL,
1038 AU_NULL, AU_NULL, AU_NULL,
1039 AU_NULL, AU_NULL, AU_NULL,
1040 AU_NULL, AU_NULL, AU_NULL,
1041 "null",
1042 },
1043 //TSHD, 6
1044 {
1045 AU_NULL, AU_NULL, AU_NULL,
1046 AU_NULL, AU_NULL, AU_NULL,
1047 AU_NULL, AU_NULL, AU_NULL,
1048 AU_NULL, AU_NULL, AU_NULL,
1049 "null",
1050 },
1051 //XEN, 7
1052 {
1053 AU_NULL, AU_NULL, AU_NULL,
1054 AU_NULL, AU_NULL, AU_NULL,
1055 AU_NULL, AU_NULL, AU_NULL,
1056 AU_NULL, AU_NULL, AU_NULL,
1057 "null",
1058 },
1059 //TSHDVIQ, #8
1060 {
1061 AU_NULL, AU_NULL, AU_NULL,
1062 AU_NULL, AU_NULL, AU_NULL,
1063 AU_NULL, AU_NULL, AU_NULL,
1064 AU_NULL, AU_NULL, AU_NULL,
1065 "null",
1066 },
1067 //ADV, 9
1068 {
1069 AU_NULL, AU_NULL, AU_NULL,
1070 AU_NULL, AU_NULL, AU_NULL,
1071 AU_NULL, AU_NULL, AU_NULL,
1072 AU_NULL, AU_NULL, AU_NULL,
1073 "null",
1074 },
1075 };
1076
1077 AUDIO_ALG_INFO audio_se_enc_info[]=
1078 {
1079 // ---------- Decoder2 DSP Code ----------
1080 //AU_DVB_SYS_NONE[0]
1081 {
1082 AU_NULL, AU_NULL, AU_NULL,
1083 AU_NULL, AU_NULL, AU_NULL,
1084 AU_NULL, AU_NULL, AU_NULL,
1085 AU_NULL, AU_NULL, AU_NULL,
1086 "Enc_none",
1087 },
1088
1089 //DTSE[1]
1090 {
1091 AU_NULL, AU_NULL, AU_NULL,
1092 AU_NULL, AU_NULL, AU_NULL,
1093 AU_NULL, AU_NULL, AU_NULL,
1094 AU_NULL, AU_NULL, AU_NULL,
1095 "DTSE",
1096 },
1097
1098 //MS10-DDE[2]
1099 {
1100 AU_NULL, AU_NULL, AU_NULL,
1101 AU_NULL, AU_NULL, AU_NULL,
1102 AU_NULL, AU_NULL, AU_NULL,
1103 AU_NULL, AU_NULL, AU_NULL,
1104 "MS10-DDE",
1105 },
1106
1107 //DDE[3]
1108 {
1109 AU_NULL, AU_NULL, AU_NULL,
1110 AU_NULL, AU_NULL, AU_NULL,
1111 AU_NULL, AU_NULL, AU_NULL,
1112 AU_NULL, AU_NULL, AU_NULL,
1113 "DDE",
1114 },
1115 };
1116
1117 #endif
1118
1119
1120 #ifndef MSOS_TYPE_NOS
1121 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
1122 #endif
1123 //-------------------------------------------------------------------------------------------------
1124 // Local Defines
1125 //-------------------------------------------------------------------------------------------------
1126 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
1127 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
1128 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
1129
1130 //-------------------------------------------------------------------------------------------------
1131 // Local Structures
1132 //-------------------------------------------------------------------------------------------------
1133
1134
1135 //-------------------------------------------------------------------------------------------------
1136 // Global Variables
1137 //-------------------------------------------------------------------------------------------------
1138 extern MS_BOOL g_bAudio_loadcode_from_dram;
1139 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
1140
1141 extern MS_S32 _s32AUDIOMutexIDMA;
1142
1143 #ifndef MSOS_TYPE_NUTTX
1144 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
1145 #endif
1146
1147
1148 //-------------------------------------------------------------------------------------------------
1149 // Local Variables
1150 //-------------------------------------------------------------------------------------------------
1151 static MS_U8 g_u8DspCodeTypeLoaded = 0;
1152
1153
1154 //-------------------------------------------------------------------------------------------------
1155 // Debug Functions
1156 //-------------------------------------------------------------------------------------------------
1157
1158
1159 //-------------------------------------------------------------------------------------------------
1160 // Local Functions
1161 //-------------------------------------------------------------------------------------------------
1162
1163
1164 //-------------------------------------------------------------------------------------------------
1165 // Global Functions
1166 //-------------------------------------------------------------------------------------------------
1167 ////////////////////////////////////////////////////////////////////////////////
1168 /// @brief \b Function \b Name: MDrv_AUDIO_DspLoadCodeKernel()
1169 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
1170 /// @param <IN> \b \b u8Type : -- DSP load code type
1171 /// DSP_segment -- select DSP load code seg
1172 /// DSP_select -- select DSP1 or DSP2
1173 /// @param <OUT> \b NONE :
1174 /// @param <RET> \b NONE :
1175 /// @param <GLOBAL> \b NONE :
1176 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(MS_U8 u8Type)1177 MS_BOOL HAL_AUDSP_DspLoadCode(MS_U8 u8Type)
1178 {
1179 #ifndef MSOS_TYPE_NUTTX
1180 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
1181 #endif
1182 MS_U32 MIU_addr;
1183 AUDIO_ALG_INFO *pau_info=NULL;
1184 MS_U8 DSP_select=0;
1185
1186 HALAUDSP_CHECK_SHM_INIT;
1187
1188 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",u8Type);
1189
1190 switch(u8Type & 0xF0)
1191 {
1192 case 0x00:
1193 case 0x10:
1194 return TRUE; // Decoder in DEC-R2
1195
1196 break;
1197
1198 case 0x30://AU_DVB2_STANDARD_MAD_TYPE
1199 if(u8Type >= AU_DVB2_STANDARD_MAX )
1200 {
1201 printf(" [audio_se_dec_info]:decoder type out of range.\r\n");
1202 return FALSE;
1203 }
1204 pau_info = &audio_se_dec_info[u8Type&0xF];
1205 DSP_select = DSP_SE;
1206
1207 break;
1208 case 0x40://AU_DVB2_ADVSND_TYPE
1209 case 0x50:
1210 if(u8Type >= AU_DVB2_ADVSND_MAX )
1211 {
1212 printf(" [audio_adv_sndeff_info]:decoder type out of range.\r\n");
1213 return FALSE;
1214 }
1215 pau_info = &audio_adv_sndeff_info[u8Type&0xF];
1216 DSP_select= DSP_SE;
1217 break;
1218
1219 case 0x60://AU_SE_SYSTEM
1220 pau_info = &audio_soundeffect_info[0];
1221 DSP_select = DSP_SE;
1222 break;
1223
1224 case 0xb0://AU_DVB_STANDARD_SIF_TYPE
1225 if ( (u8Type & (~0x08)) > AU_SIF_FM_RADIO )
1226 {
1227 printf(" [audio_sif_info]:decoder type out of range.\r\n");
1228 return FALSE;
1229 }
1230 pau_info = &audio_sif_dec_info[u8Type&0x07];
1231 DSP_select = DSP_SE;
1232 break;
1233
1234 case 0xd0://AU_DVB2_ENCODE_TYPE
1235 if(u8Type >= AU_DVB2_ENCODE_MAX )
1236 {
1237 printf(" [audio_encode_info]:encoder type out of range.\r\n");
1238 return FALSE;
1239 }
1240 pau_info = &audio_se_enc_info[u8Type&0x3];
1241 DSP_select= DSP_SE;
1242 break;
1243
1244 case 0xe0://AU_DEC_SYSTEM
1245 return TRUE; // Decoder in DEC-R2
1246
1247 break;
1248
1249 default:
1250 DBG_AUDSP_ERROR(" [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
1251 return FALSE;
1252 }
1253
1254 #ifndef MSOS_TYPE_NUTTX
1255 AUDIO_TEE_INFO_SHM_CHECK_NULL;
1256 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (MS_U8)u8Type);
1257 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(1);
1258 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
1259 if (DSP_select == DSP_DEC)
1260 {
1261 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_DEC;
1262 }
1263 else if (DSP_select == DSP_SE)
1264 {
1265 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
1266 }
1267
1268 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
1269 {
1270 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
1271 return FALSE;
1272 HAL_AUDSP_SetDspCodeTypeLoaded(u8Type);
1273 return TRUE;
1274 }
1275 #endif
1276
1277 if(pau_info->cm_len == 0)
1278 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1279 HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
1280
1281 if(DSP_select == DSP_DEC)
1282 {
1283 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1284 }
1285 else
1286 {
1287 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1288 }
1289
1290 if ( u8Type == 0x60 )
1291 {
1292 pau_info->cm_addr = 0x0008;
1293 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
1294 pau_info->cm_buf = (mst_codec_pm1+ 30);
1295 }
1296
1297 // Download PM of Algorithm
1298 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n",pau_info->pm_addr);
1299 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n",(MS_U32)pau_info->pm_buf);
1300 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n",pau_info->pm_len);
1301
1302 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
1303 return FALSE;
1304 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
1305 return FALSE;
1306
1307 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n",pau_info->cm_addr);
1308 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n",(MS_U32)pau_info->cm_buf);
1309 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n",pau_info->cm_len);
1310
1311 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
1312 return FALSE;
1313 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
1314 return FALSE;
1315
1316 // Download PM of PreFetch
1317 if(pau_info->prefetch_len != 0)
1318 {
1319 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
1320 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
1321 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
1322
1323 MIU_addr = (MS_U32)pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1324 DBG_AUDSP_LOAD(" MIU of PreFetch: 0x%lX\r\n", MIU_addr);
1325 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(pau_info->prefetch_buf)), pau_info->prefetch_len);
1326 }
1327
1328 // Download PM of Cache
1329 if(pau_info->cache_len != 0)
1330 {
1331 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
1332 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
1333 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
1334
1335 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1336 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
1337 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(pau_info->cache_buf)), pau_info->cache_len);
1338 }
1339
1340 // Load SE-DSP system code
1341 if(u8Type == 0x60)
1342 {
1343 #if ASND_R2_SUPPORT
1344 HAL_AUR2_WriteByte(REG_SNDR2_RESET_CTRL, 0x00); // STOP SND-R2
1345 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
1346 #endif
1347 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
1348 AUDIO_DELAY1US(1000);
1349
1350 #ifdef CONFIG_MBOOT
1351 //============ Load R2 code ===============
1352 // Memory sequence : Mboot-R2(DEC-R2)
1353 //====================================
1354
1355 // Load DEC-R2
1356 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1357
1358 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1359 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1360 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1361 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1362 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1363 HAL_DEC_R2_init_SHM_param();
1364 AUDIO_DELAY1US(1000);
1365 MsOS_FlushMemory();
1366
1367 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1368 #else
1369 //============ Load R2 code ===============
1370 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1371 //====================================
1372
1373 // Load DEC-R2
1374 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1375
1376 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1377 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1378 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1379 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1380 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1381 HAL_DEC_R2_init_SHM_param();
1382 AUDIO_DELAY1US(1000);
1383 MsOS_FlushMemory();
1384
1385 #if ASND_R2_SUPPORT
1386 // Load SND-R2
1387 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV)+ADEC__R2_DDR_SIZE;
1388 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_snd_r2)), SND_R2_SHM_DDR_OFFSET);
1389 memset((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE), 0, ASND__R2_DDR_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
1390 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
1391 (void*)(mst_snd_r2+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
1392 MST_SND_R2_AUDIO_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
1393 AUDIO_DELAY1MS(1);
1394 MsOS_FlushMemory();
1395
1396 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
1397 #endif
1398 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1399 #endif
1400
1401 if(!HAL_AUDSP_DspLoadCodeSegment(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
1402 if(!HAL_AUDSP_DspVerifySegmentCode(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
1403 if(!HAL_AUDSP_DspLoadCodeSegment(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
1404 if(!HAL_AUDSP_DspVerifySegmentCode(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
1405 }
1406
1407 MsOS_FlushMemory();
1408
1409 HAL_AUDSP_SetDspCodeTypeLoaded(u8Type);
1410 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=%s(0x%x))\r\n", pau_info->AlgName, u8Type);
1411
1412 return TRUE;
1413 }
1414
HAL_AUDSP_Get_Alg_Info(MS_U8 Id,MS_U8 u8Type)1415 void * HAL_AUDSP_Get_Alg_Info(MS_U8 Id, MS_U8 u8Type)
1416 {
1417 void * pAudio_Info;
1418 AUDIO_DSP_ID DSP_Id;
1419
1420 DSP_Id = (AUDIO_DSP_ID) Id;
1421 switch ( DSP_Id )
1422 {
1423 case AUDIO_DSP_ID_DEC:
1424 //Cathy Temp
1425 case AUDIO_DSP_ID_SND:
1426 pAudio_Info = (void *) &audio_snd_mm_dec_info[u8Type];
1427 break;
1428
1429 default:
1430 HALAUDSP_ERROR ("Un-Support DSP ID (%d)\r\n", DSP_Id);
1431 pAudio_Info = NULL;
1432 return pAudio_Info;
1433 }
1434
1435 HALAUDSP_ERROR ("DSP %s Got the Alg Info (0x%X)\r\n", DSP_Id == AUDIO_DSP_ID_DEC ? "DEC" : "SND", u8Type);
1436
1437 return pAudio_Info;
1438 }
1439
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)1440 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
1441 {
1442 MS_U32 MIU_addr;
1443 AUDIO_ALG_INFO * pau_info = (AUDIO_ALG_INFO *) info;
1444
1445 if ( pau_info->cm_len == 0 )
1446 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1447
1448 // HALAUDSP_ERROR ("@@@@@@@@@@ ====== %s: %s start ======\r\n", __FUNCTION__, pau_info->AlgName);
1449
1450 //HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
1451
1452 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, ((DSP_select == DSP_DEC) ? 0x00 : 0x01));
1453
1454 /* Download PM of Algorithm */
1455 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n", pau_info->pm_addr);
1456 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_U32) pau_info->pm_buf);
1457 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n", pau_info->pm_len);
1458
1459 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
1460 {
1461 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Fail !!\r\n");
1462 return FALSE;
1463 }
1464
1465 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
1466 {
1467 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Verify Fail !!\r\n");
1468 return FALSE;
1469 }
1470
1471 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n", pau_info->cm_addr);
1472 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_U32) pau_info->cm_buf);
1473 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n", pau_info->cm_len);
1474
1475 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
1476 {
1477 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Fail !!\r\n");
1478 return FALSE;
1479 }
1480
1481 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
1482 {
1483 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Verify Fail !!\r\n");
1484 return FALSE;
1485 }
1486
1487 /* Download PM of PreFetch */
1488 if ( pau_info->prefetch_len != 0 )
1489 {
1490 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
1491 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
1492 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
1493
1494 MIU_addr = (MS_U32) pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1495 HALAUDSP_ERROR (" MIU of PreFetch: 0x%lX\r\n", MIU_addr);
1496
1497 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((MS_U32)(pau_info->prefetch_buf)), pau_info->prefetch_len);
1498 }
1499
1500 /* Download PM of Cache */
1501 if ( pau_info->cache_len != 0 )
1502 {
1503 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
1504 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
1505 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
1506
1507 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1508 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
1509
1510 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((MS_U32)(pau_info->cache_buf)), pau_info->cache_len);
1511 }
1512
1513 MsOS_FlushMemory();
1514
1515 DBG_AUDSP_LOAD("DSP %s finished (type=%s)\r\n", ((DSP_select == DSP_DEC) ? "DEC" : "SND"), pau_info->AlgName);
1516
1517 return TRUE;
1518 }
1519
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)1520 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
1521 {
1522 MS_U8 * dsp_bootcode;
1523 #ifndef CONFIG_MBOOT
1524 MS_U32 MIU_addr;
1525 #endif
1526
1527 if ( pau_info->cm_len == 0 )
1528 {
1529 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1530 }
1531
1532 dsp_bootcode = pau_info->cm_buf;
1533
1534 pau_info->cm_addr = 0x0008;
1535 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
1536 pau_info->cm_buf = (mst_codec_pm1 + 30);
1537
1538 if ( !HAL_AUDSP_DspLoadCode2(DSP_select, pau_info) )
1539 {
1540 return FALSE;
1541 }
1542
1543 if ( DSP_select == DSP_SE )
1544 {
1545 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000);
1546 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x00); //Stop R2
1547 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
1548 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
1549 AUDIO_DELAY1US(1000);
1550 #ifndef CONFIG_MBOOT
1551 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(2);
1552 memcpy((void *) (MS_PA2KSEG1 (MIU_addr)), (void *) ((MS_U32) (mst_codec_r2)), MST_CODEC_R2_AUDIO_SIZE);
1553 #endif
1554 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x27); //Eanble R2
1555 }
1556
1557
1558 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0001, dsp_bootcode + 3, 21, DSP_select) )
1559 {
1560 return FALSE;
1561 }
1562
1563 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0001, dsp_bootcode + 3, 21, DSP_select) )
1564 {
1565 return FALSE;
1566 }
1567
1568 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0000, dsp_bootcode, 3, DSP_select) )
1569 {
1570 return FALSE;
1571 }
1572
1573 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0000, dsp_bootcode, 3, DSP_select) )
1574 {
1575 return FALSE;
1576 }
1577
1578
1579 MsOS_FlushMemory();
1580
1581 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
1582 printf("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
1583
1584 return TRUE;
1585 }
1586
1587 ////////////////////////////////////////////////////////////////////////////////
1588 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
1589 /// @brief \b Function \b Description: This routine is used to load DSP code
1590 /// @param <IN> \b dsp_addr :
1591 /// @param <IN> \b dspCode_buf :
1592 /// @param <IN> \b dspCode_buflen :
1593 /// @param <OUT> \b NONE :
1594 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
1595 /// FALSE--DSP Load code fail
1596 /// @param <GLOBAL> \b NONE :
1597 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)1598 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
1599 {
1600 MS_U32 i,j;
1601 MS_U32 idma_wrbase_addr_l, dsp_brg_data_l, dsp_brg_data_h, bdma_mode_addr;
1602
1603 HALAUDSP_CHECK_SHM_INIT;
1604
1605 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
1606
1607 g_bDSPLoadCode = TRUE;
1608
1609 if(DSP_select == DSP_DEC)
1610 {
1611 idma_wrbase_addr_l = REG_DEC_IDMA_WRBASE_ADDR_L;
1612 dsp_brg_data_l = REG_DEC_DSP_BRG_DATA_L;
1613 dsp_brg_data_h = REG_DEC_DSP_BRG_DATA_H;
1614 bdma_mode_addr = REG_DEC_BDMA_CFG;
1615 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1616 }
1617 else
1618 {
1619 idma_wrbase_addr_l = REG_SE_IDMA_WRBASE_ADDR_L;
1620 dsp_brg_data_l = REG_SE_DSP_BRG_DATA_L;
1621 dsp_brg_data_h = REG_SE_DSP_BRG_DATA_H;
1622 bdma_mode_addr = REG_SE_BDMA_CFG;
1623 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1624 }
1625
1626 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma
1627
1628 if(dspCode_buflen>0)
1629 {
1630 /* set iDMA addr */
1631
1632 HAL_AUDIO_WriteReg(idma_wrbase_addr_l, dsp_addr);
1633
1634 AUDIO_DELAY1US(1000);
1635
1636 for( i=0; i<dspCode_buflen; i+=3)
1637 {
1638 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i+1));
1639 HAL_AUDIO_WriteByte(dsp_brg_data_h,*(dspCode_buf+i+2));
1640
1641 for(j=0;j<2;j++);//for delay only
1642
1643 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i));
1644 HAL_AUDIO_WriteByte(dsp_brg_data_h,0x00);
1645
1646 if(DSP_select == DSP_DEC)
1647 {
1648 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
1649 {
1650 g_bDSPLoadCode = FALSE;
1651
1652 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1653
1654 return FALSE;
1655 }
1656 }
1657 else
1658 {
1659 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
1660 {
1661 g_bDSPLoadCode = FALSE;
1662
1663 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1664
1665 return FALSE;
1666 }
1667 }
1668 }
1669 }
1670
1671 g_bDSPLoadCode = FALSE;
1672
1673 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1674
1675 return TRUE;
1676 }
1677
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)1678 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
1679 {
1680 MS_U32 i;
1681 MS_U8 dat[3];
1682 MS_U32 idma_rdbase_addr_l, idma_ctrl0, idma_rddata_h_0, idma_rddata_h_1, idma_rddata_l, bdma_mode_addr;
1683
1684 #if (DSP_VERIFY_DSP_CODE==0)
1685 return TRUE; //don't verify just return;
1686 #endif
1687
1688 HALAUDSP_CHECK_SHM_INIT;
1689
1690 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
1691
1692 g_bDSPLoadCode = TRUE;
1693
1694 if ( DSP_select == DSP_DEC )
1695 {
1696 idma_rdbase_addr_l = REG_DEC_IDMA_RDBASE_ADDR_L;
1697 idma_ctrl0 = REG_DEC_IDMA_CTRL0;
1698 idma_rddata_h_0 = REG_DEC_IDMA_RDDATA_H_0;
1699 idma_rddata_h_1 = REG_DEC_IDMA_RDDATA_H_1;
1700 idma_rddata_l = REG_DEC_IDMA_RDDATA_L;
1701 bdma_mode_addr = REG_DEC_BDMA_CFG;
1702 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1703 }
1704 else
1705 {
1706 idma_rdbase_addr_l = REG_SE_IDMA_RDBASE_ADDR_L;
1707 idma_ctrl0 = REG_SE_IDMA_CTRL0;
1708 idma_rddata_h_0 = REG_SE_IDMA_RDDATA_H_0;
1709 idma_rddata_h_1 = REG_SE_IDMA_RDDATA_H_1;
1710 idma_rddata_l = REG_SE_IDMA_RDDATA_L;
1711 bdma_mode_addr = REG_SE_BDMA_CFG;
1712 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1713 }
1714
1715 //HAL_AUDIO_WriteMaskByte(0x3CEC, 0x40, 0x00);
1716 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma (enable idma)
1717 HAL_AUDIO_WriteReg(idma_rdbase_addr_l, dsp_addr);
1718 AUDIO_DELAY1US(1000);
1719
1720 for (i=0; i<dspCode_buflen; i+=3)
1721 {
1722 HAL_AUDIO_WriteMaskByte(idma_ctrl0, 0x08, 0x08 );
1723 #if (DSP_IDMA_CHK_READY == 1)
1724 if(DSP_select == DSP_DEC)
1725 {
1726 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
1727 {
1728 g_bDSPLoadCode = FALSE;
1729
1730 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1731
1732 return FALSE;
1733 }
1734 }
1735 else
1736 {
1737 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
1738 {
1739 g_bDSPLoadCode = FALSE;
1740
1741 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1742
1743 return FALSE;
1744 }
1745 }
1746 #endif
1747 dat[1] = HAL_AUDIO_ReadByte(idma_rddata_h_0);
1748 dat[2] = HAL_AUDIO_ReadByte(idma_rddata_h_1);
1749 dat[0] = HAL_AUDIO_ReadByte(idma_rddata_l);
1750
1751 //printf("@@%x\n", (dat[2] << 16) | (dat[1] << 8) | (dat[0]));
1752
1753 if ( (dat[0]!=dspCode_buf[i]) || (dat[1]!=dspCode_buf[i+1]) ||
1754 (dat[2]!=dspCode_buf[i+2]))
1755 {
1756 printf("check data %x\n", (unsigned int)i);
1757 printf("dat0 %X <===> ",dspCode_buf[i]);
1758 printf("%x \n", dat[0]);
1759 printf("dat1 %X <===> ",dspCode_buf[i+1]);
1760 printf("%x \n", dat[1]);
1761 printf("dat2 %x <===> ",dspCode_buf[i+2]);
1762 printf("%X \n", dat[2]);
1763 printf(" Dsp code verify error!!\r\n");
1764
1765 g_bDSPLoadCode = FALSE;
1766
1767 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1768
1769 return FALSE;
1770 }
1771 }
1772
1773 DBG_AUDSP(" Dsp code verify ok!!\n\r");
1774
1775 g_bDSPLoadCode = FALSE;
1776
1777 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1778
1779 return TRUE;
1780 }
1781
1782 ////////////////////////////////////////////////////////////////////////////////
1783 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
1784 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
1785 /// @param <IN> \b IdmaChk_type :
1786 /// 0x10 : check write ready
1787 /// 0x80 : check read ready
1788 /// @param <OUT> \b NONE :
1789 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1790 /// FALSE--IDMA not ready
1791 /// @param <GLOBAL> \b NONE :
1792 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)1793 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
1794 {
1795 MS_U8 j = 0;
1796
1797 while(j<200)
1798 {
1799 j++;
1800 if( (HAL_AUDIO_ReadByte(REG_DEC_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1801 return TRUE;
1802 }
1803
1804 DBG_AUDSP_ERROR("DSP DEC Idma check ready fail!(%d)\r\n",j);
1805 return FALSE;
1806 }
1807
1808 ////////////////////////////////////////////////////////////////////////////////
1809 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
1810 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
1811 /// @param <IN> \b IdmaChk_type :
1812 /// 0x10 : check write ready
1813 /// 0x80 : check read ready
1814 /// @param <OUT> \b NONE :
1815 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1816 /// FALSE--IDMA not ready
1817 /// @param <GLOBAL> \b NONE :
1818 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)1819 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
1820 {
1821 MS_U8 j = 0;
1822
1823 while(j<200)
1824 {
1825 j++;
1826 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1827 return TRUE;
1828 }
1829
1830 DBG_AUDSP_ERROR("DSP SE Idma check ready fail!(%d)\r\n",j);
1831 return FALSE;
1832 }
1833
1834 ////////////////////////////////////////////////////////////////////////////////
1835 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
1836 /// @brief \b Function \b Description: This function is used to set the DSP code type.
1837 /// @param <IN> \b NONE :
1838 /// @param <OUT> \b NONE :
1839 /// @param <RET> \b MS_U8: DSP code type.
1840 /// @param <GLOBAL> \b NONE :
1841 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)1842 void HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)
1843 {
1844 g_u8DspCodeTypeLoaded=u8Type;
1845 }
1846
1847 ////////////////////////////////////////////////////////////////////////////////
1848 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1849 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1850 /// @param <IN> \b NONE :
1851 /// @param <OUT> \b NONE :
1852 /// @param <RET> \b MS_U8: DSP code type.
1853 /// @param <GLOBAL> \b NONE :
1854 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)1855 MS_U8 HAL_AUDSP_GetDspCodeTypeLoaded(void)
1856 {
1857 return g_u8DspCodeTypeLoaded;
1858 }
1859
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)1860 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
1861 {
1862 g_loadcodeinfo.pau_info = pau_info;
1863 g_loadcodeinfo.DSP_select= DSP_select;
1864 }
1865
1866 ////////////////////////////////////////////////////////////////////////////////
1867 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1868 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1869 /// @param <IN> \b NONE :
1870 /// @param <OUT> \b NONE :
1871 /// @param <RET> \b MS_U8: DSP code type.
1872 /// @param <GLOBAL> \b NONE :
1873 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)1874 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
1875 {
1876 return &g_loadcodeinfo;
1877 }
1878
1879 ////////////////////////////////////////////////////////////////////////////////
1880 /// @brief \b Function \b Name: HAL_AUDSP_DECR2LoadCode()
1881 /// @brief \b Function \b Description: Load DEC-R2 code to DDR
1882 /// @param <IN> \b NONE :
1883 /// @param <OUT> \b NONE :
1884 /// @param <RET> \b NONE :
1885 /// @param <GLOBAL> \b NONE :
1886 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DECR2LoadCode(void)1887 void HAL_AUDSP_DECR2LoadCode(void)
1888 {
1889 MS_U32 MIU_addr;
1890
1891 printf("======audio: start DEC-R2 load code======\n");
1892
1893 HAL_AUDIO_WriteMaskByte(REG_AUDIO_SYNTH_EXPANDER, 0x02, 0x00); //BANK 1130 control by MCU
1894
1895 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP DEC-R2
1896 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register
1897 AUDIO_DELAY1MS(1);
1898
1899 //============ Load R2 code ===============
1900 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1901 //====================================
1902
1903 // Load DEC-R2
1904 #if (ENABLE_AUDIO_DEC_R2_BIN == FALSE)
1905 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1906
1907 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1908 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1909 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1910 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1911 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1912 #else
1913 {
1914 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1915
1916 if (pf_loadR2CodeFromBin)
1917 {
1918 MsOS_Dcache_Flush(0, 64 * 1024 * 1024);
1919 MsOS_FlushMemory();
1920 pf_loadR2CodeFromBin(0, MIU_addr, ADEC__R2_DDR_SIZE);
1921 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET), 0, DEC_R2_SHM_DDR_SIZE);
1922 }
1923 else
1924 {
1925 printf("[%s] error !! call pf_loadR2CodeFromBin is NULL\n", __FUNCTION__);
1926 }
1927 }
1928 #endif
1929
1930 HAL_DEC_R2_init_SHM_param();
1931 AUDIO_DELAY1MS(1);
1932 MsOS_FlushMemory();
1933
1934 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1935 HAL_MAD2_SetMcuCmd(0xF3);
1936
1937 printf("======audio: end DEC-R2 load code======\n");
1938 }
1939
1940