1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define ENABLE_AUDIO_DEC_R2_BIN FALSE //�ѩ�Milan DDR�Ŷ��ܺ�Adefault �Hflash load code �Ӹ`��r2 code ��audio lib��DDR�Ŷ�
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include <string.h>
102
103 #include "MsCommon.h"
104 #include "MsIRQ.h"
105 #include "MsOS.h"
106 #include "MsTypes.h"
107
108 #include "drvBDMA.h"
109 #include "drvSERFLASH.h"
110
111 #include "regCHIP.h"
112
113 #include "halAUDSP.h"
114 #include "drvAUDIO.h"
115 #include "regAUDIO.h"
116 #include "halAUDIO.h"
117 #include "halMAD2.h"
118 #include "halSIF.h"
119 #include "halADVAUDIO.h"
120 #include "ddr_config.h"
121 #include "r2_shm_comm.h"
122 #include "decR2_shm.h"
123 #include "sndR2_shm.h"
124
125 #ifdef MBOOT//Mboot Mini system
126 #include "dspcode_s/aucode_s.c"
127 #include "dspcode_s/aucode_dec.c"
128 #include "dspcode_s/aucode_mboot_r2.c"
129 #include "dspcode_s/aucode_none.c"
130 #else
131 #include "dspcode_s/aucode_palsum.c"
132 #include "dspcode_s/aucode_btsc.c"
133 #include "dspcode_s/aucode_s.c"
134 #include "dspcode_s/aucode_dec.c"
135 #include "dspcode_s/aucode_adec_r2.c"
136 #include "dspcode_s/aucode_dde.c"
137 #include "dspcode_s/aucode_ms10_dde.c"
138 #include "dspcode_s/aucode_dts_t.c"
139 #include "dspcode_s/aucode_none.c"
140 #include "dspcode_adv/aucode_tshd.c"
141 #include "dspcode_adv/aucode_dps.c"
142 #include "dspcode_adv/aucode_dbx.c"
143 #endif
144
145
146 #if defined(MSOS_TYPE_NUTTX)
147 extern int lib_lowprintf(const char *format, ...);
148 #define DBG_PREFIX lib_lowprintf
149 #else
150 #define DBG_PREFIX printf
151 #endif
152
153 #if (defined ANDROID)
154 #include <sys/mman.h>
155 #include <cutils/ashmem.h>
156 #include <cutils/log.h>
157
158 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
159 #define LOGI ALOGI
160 #endif
161
162 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
163 #define LOGE ALOGE
164 #endif
165
166 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
167 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
168 #else
169 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
170 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
171 #endif
172
173 #define HALAUDSP_CHECK_SHM_INIT \
174 do { \
175 if (g_AudioVars2 == NULL) \
176 { \
177 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
178 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
179 if (HAL_AUDIO_InitialVars() == FALSE) \
180 { \
181 MS_ASSERT(0); \
182 } \
183 } \
184 } while(0)
185
186 //-------------------------------------------------------------------------------------------------
187 // Driver Compiler Options
188 //-------------------------------------------------------------------------------------------------
189
190 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
191 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
192 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
193
194 #ifdef MBOOT //mboot Speed up
195 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
196 // 1: verify dsp code (for debug)
197 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
198 // 1: check IDMA ready (for debug)
199 #else
200 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
201 // 1: verify dsp code (for debug)
202 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
203 // 1: check IDMA ready (for debug)
204 #endif
205
206 #define AU_NULL 0
207
208 #ifdef MBOOT
209 #define FLASH_COPY(x,y,z,i,j) TRUE
210 #define FLASH_CHKDONE() TRUE
211 #else
212 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
213 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
214 #endif
215
216 LOAD_CODE_INFO g_loadcodeinfo;
217 MS_BOOL g_bDSPLoadCode = FALSE;
218
219 #ifndef MBOOT
220 AUDIO_ALG_INFO dsp_info[]=
221 {
222 // ---------- Decoder2 DSP Code ----------
223 // DVB2 Dec None
224 {
225 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
226 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
227 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
228 MST_CODEC_DEC_PM4_ADDR, MST_CODEC_DEC_PM4_SIZE, mst_codec_dec_pm4 + 6,
229 "DVB2_NONE",
230 AU_DVB2_NONE,
231 },
232
233 // SE System
234 {
235 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
236 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
237 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
238 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
239 "SE SYSTEM",
240 AU_SE_SYSTEM,
241 },
242
243 // ADV SND None
244 {
245 MST_CODEC_NONE_PM1_ADDR, MST_CODEC_NONE_PM1_SIZE, mst_codec_none_pm1 + 6,
246 AU_NULL, AU_NULL, AU_NULL,
247 MST_CODEC_NONE_PM3_ADDR, MST_CODEC_NONE_PM3_SIZE, mst_codec_none_pm3 + 6,
248 AU_NULL, AU_NULL, AU_NULL,
249 "SE adv_none",
250 AU_SND_EFFECT,
251 },
252
253 // DVB2_ENCODE
254 //AU_DVB2_ENCODE_DTSE
255 {
256 MST_CODEC_DTS_T_PM1_ADDR, MST_CODEC_DTS_T_PM1_SIZE, mst_codec_dts_t_pm1 + 6,
257 MST_CODEC_DTS_T_PM2_ADDR, MST_CODEC_DTS_T_PM2_SIZE, mst_codec_dts_t_pm2 + 6,
258 MST_CODEC_DTS_T_PM3_ADDR, MST_CODEC_DTS_T_PM3_SIZE, mst_codec_dts_t_pm3 + 6,
259 AU_NULL, AU_NULL, AU_NULL,
260 "dts_e",
261 AU_DVB2_ENCODE_DTSE,
262 },
263
264 //AU_DVB2_ENCODE_MS10_DDE
265 {
266 MST_CODEC_MS10_DDE_PM1_ADDR, MST_CODEC_MS10_DDE_PM1_SIZE, mst_codec_ms10_dde_pm1 + 6,
267 MST_CODEC_MS10_DDE_PM2_ADDR, MST_CODEC_MS10_DDE_PM2_SIZE, mst_codec_ms10_dde_pm2 + 6,
268 MST_CODEC_MS10_DDE_PM3_ADDR, MST_CODEC_MS10_DDE_PM3_SIZE, mst_codec_ms10_dde_pm3 + 6,
269 MST_CODEC_MS10_DDE_PM4_ADDR, MST_CODEC_MS10_DDE_PM4_SIZE, mst_codec_ms10_dde_pm4 + 6,
270 "ms10_dde",
271 AU_DVB2_ENCODE_MS10_DDE,
272 },
273
274 //AU_DVB2_ENCODE_DDE
275 {
276 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
277 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
278 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
279 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
280 "dde",
281 AU_DVB2_ENCODE_DDE,
282 },
283
284 // SIF
285 //BTSC
286 {
287 MST_CODEC_SIF_BTSC_PM1_ADDR, MST_CODEC_SIF_BTSC_PM1_SIZE, mst_codec_sif_btsc_pm1 + 6,
288 MST_CODEC_SIF_BTSC_PM2_ADDR, MST_CODEC_SIF_BTSC_PM2_SIZE, mst_codec_sif_btsc_pm2 + 6,
289 MST_CODEC_SIF_BTSC_PM3_ADDR, MST_CODEC_SIF_BTSC_PM3_SIZE, mst_codec_sif_btsc_pm3 + 6,
290 AU_NULL, AU_NULL, AU_NULL,
291 "SIF BTSC",
292 AU_SIF_BTSC,
293 },
294
295 //PALSUM
296 {
297 MST_CODEC_SIF_PALSUM_PM1_ADDR, MST_CODEC_SIF_PALSUM_PM1_SIZE, mst_codec_sif_palsum_pm1 + 6,
298 MST_CODEC_SIF_PALSUM_PM2_ADDR, MST_CODEC_SIF_PALSUM_PM2_SIZE, mst_codec_sif_palsum_pm2 + 6,
299 MST_CODEC_SIF_PALSUM_PM3_ADDR, MST_CODEC_SIF_PALSUM_PM3_SIZE, mst_codec_sif_palsum_pm3 + 6,
300 AU_NULL, AU_NULL, AU_NULL,
301 "SIF PALSUM",
302 AU_SIF_PALSUM,
303 },
304
305 // ADV_SNDEFF
306 //TSHD
307 {
308 MST_CODEC_TSHD_PM1_ADDR, MST_CODEC_TSHD_PM1_SIZE, mst_codec_tshd_pm1 + 6,
309 MST_CODEC_TSHD_PM2_ADDR, MST_CODEC_TSHD_PM2_SIZE, mst_codec_tshd_pm2 + 6,
310 MST_CODEC_TSHD_PM3_ADDR, MST_CODEC_TSHD_PM3_SIZE, mst_codec_tshd_pm3 + 6,
311 AU_NULL, AU_NULL, AU_NULL,
312 "ADVSND TSHD",
313 AU_DVB2_ADVSND_TSHD,
314 },
315
316 //DBX
317 {
318 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1 + 6,
319 MST_CODEC_DBX_PM2_ADDR, MST_CODEC_DBX_PM2_SIZE, mst_codec_dbx_pm2 + 6,
320 MST_CODEC_DBX_PM3_ADDR, MST_CODEC_DBX_PM3_SIZE, mst_codec_dbx_pm3 + 6,
321 AU_NULL, AU_NULL, AU_NULL,
322 "ADVSND DBX",
323 AU_DVB2_ADVSND_DBX,
324 },
325
326 //DPS
327 {
328 MST_CODEC_DPS_PM1_ADDR, MST_CODEC_DPS_PM1_SIZE, mst_codec_dps_pm1 + 6,
329 MST_CODEC_DPS_PM2_ADDR, MST_CODEC_DPS_PM2_SIZE, mst_codec_dps_pm2 + 6,
330 MST_CODEC_DPS_PM3_ADDR, MST_CODEC_DPS_PM3_SIZE, mst_codec_dps_pm3 + 6,
331 AU_NULL, AU_NULL, AU_NULL,
332 "ADVSND BONGIOVI_DPS",
333 AU_DVB2_ADVSND_BONGIOVI_DPS,
334 },
335 };
336
337 #else //=======================MBOOT=========================================//
338 AUDIO_ALG_INFO dsp_info[]=
339 {
340 // ---------- Decoder2 DSP Code ----------
341 // DVB2 Dec None
342 {
343 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
344 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
345 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
346 MST_CODEC_DEC_PM4_ADDR, MST_CODEC_DEC_PM4_SIZE, mst_codec_dec_pm4 + 6,
347 "DVB2_NONE",
348 AU_DVB2_NONE,
349 },
350
351 // SE System
352 {
353 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
354 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
355 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
356 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
357 "SE SYSTEM",
358 AU_SE_SYSTEM,
359 },
360
361 // ADV SND None
362 {
363 MST_CODEC_NONE_PM1_ADDR, MST_CODEC_NONE_PM1_SIZE, mst_codec_none_pm1 + 6,
364 AU_NULL, AU_NULL, AU_NULL,
365 MST_CODEC_NONE_PM3_ADDR, MST_CODEC_NONE_PM3_SIZE, mst_codec_none_pm3 + 6,
366 AU_NULL, AU_NULL, AU_NULL,
367 "SE adv_none",
368 AU_SND_EFFECT,
369 },
370
371 };
372
373 #endif
374
375
376 #ifndef MSOS_TYPE_NOS
377 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
378 #endif
379 //-------------------------------------------------------------------------------------------------
380 // Local Defines
381 //-------------------------------------------------------------------------------------------------
382 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
383 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
384 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
385
386 //-------------------------------------------------------------------------------------------------
387 // Local Structures
388 //-------------------------------------------------------------------------------------------------
389
390
391 //-------------------------------------------------------------------------------------------------
392 // Global Variables
393 //-------------------------------------------------------------------------------------------------
394 extern MS_BOOL g_bAudio_loadcode_from_dram;
395 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
396
397 extern MS_S32 _s32AUDIOMutexIDMA;
398
399 #ifndef MSOS_TYPE_NUTTX
400 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
401 #endif
402
403
404 //-------------------------------------------------------------------------------------------------
405 // Local Variables
406 //-------------------------------------------------------------------------------------------------
407 static AUDIO_DSP_CODE_TYPE g_DspCodeTypeLoaded = AU_DVB_NONE;
408
409
410 //-------------------------------------------------------------------------------------------------
411 // Debug Functions
412 //-------------------------------------------------------------------------------------------------
413
414
415 //-------------------------------------------------------------------------------------------------
416 // Local Functions
417 //-------------------------------------------------------------------------------------------------
418
419
420 //-------------------------------------------------------------------------------------------------
421 // Global Functions
422 //-------------------------------------------------------------------------------------------------
423 ////////////////////////////////////////////////////////////////////////////////
424 /// @brief \b Function \b Name: HAL_AUDSP_DspLoadCode()
425 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
426 /// @param <IN> \b \b dspCodeType : -- DSP load code type
427 /// DSP_segment -- select DSP load code seg
428 /// DSP_select -- select DSP1 or DSP2
429 /// @param <OUT> \b NONE :
430 /// @param <RET> \b NONE :
431 /// @param <GLOBAL> \b NONE :
432 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)433 MS_BOOL HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)
434 {
435 #ifndef MSOS_TYPE_NUTTX
436 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
437 #endif
438 MS_U32 MIU_addr;
439 AUDIO_ALG_INFO *pau_info=NULL;
440 MS_U8 DSP_select=0;
441 int ii;
442
443 HALAUDSP_CHECK_SHM_INIT;
444
445 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",dspCodeType);
446
447 if (IS_AUDIO_DSP_CODE_TYPE_DEC1_SYSTEM(dspCodeType))
448 {
449 return TRUE; // Decoder in DEC-R2
450 }
451 else if (IS_AUDIO_DSP_CODE_TYPE_DEC_SYSTEM(dspCodeType)) //AU_DEC_SYSTEM
452 {
453 return TRUE; // Decoder in DEC-R2
454 }
455 else if ((IS_AUDIO_DSP_CODE_TYPE_DEC2_SYSTEM(dspCodeType)) || (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType)) ||( IS_AUDIO_DSP_CODE_TYPE_SIF(dspCodeType)) || (IS_AUDIO_DSP_CODE_TYPE_ADVSND(dspCodeType)) || (IS_AUDIO_DSP_CODE_TYPE_SE_ENC(dspCodeType)))
456 {
457 for (ii=0; ii< sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO);ii++)
458 {
459 if (dspCodeType == dsp_info[ii].dspCodeType)
460 break;
461 }
462 if (ii < (sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO)))
463 {
464 pau_info = &dsp_info[ii];
465 DSP_select = DSP_SE;
466 }
467 else
468 {
469 DBG_AUDSP_ERROR(" [dsp_info]:decoder type not found.\r\n");
470 return FALSE;
471 }
472 }
473 else
474 {
475 DBG_AUDSP_ERROR(" [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
476 return FALSE;
477 }
478
479 #ifndef MSOS_TYPE_NUTTX
480 AUDIO_TEE_INFO_SHM_CHECK_NULL;
481 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (dspCodeType&0xFF));
482 REE_TO_TEE_MBX_MSG_SET_PARAM(1, ((dspCodeType&0xFF00)>>8));
483 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(2);
484 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
485 if (DSP_select == DSP_DEC)
486 {
487 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_DEC;
488 }
489 else if (DSP_select == DSP_SE)
490 {
491 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
492 }
493
494 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
495 {
496 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
497 return FALSE;
498 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
499 return TRUE;
500 }
501 #endif
502
503 if(pau_info->cm_len == 0)
504 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
505 HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
506
507 if(DSP_select == DSP_DEC)
508 {
509 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
510 }
511 else
512 {
513 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
514 }
515
516 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
517 {
518 pau_info->cm_addr = 0x0008;
519 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
520 pau_info->cm_buf = (mst_codec_pm1+ 30);
521 }
522
523 // Download PM of Algorithm
524 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n",pau_info->pm_addr);
525 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n",(MS_U32)pau_info->pm_buf);
526 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n",pau_info->pm_len);
527
528 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
529 return FALSE;
530 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
531 return FALSE;
532
533 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n",pau_info->cm_addr);
534 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n",(MS_U32)pau_info->cm_buf);
535 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n",pau_info->cm_len);
536
537 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
538 return FALSE;
539 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
540 return FALSE;
541
542 // Download PM of PreFetch
543 if(pau_info->prefetch_len != 0)
544 {
545 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
546 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
547 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
548
549 MIU_addr = (MS_U32)pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
550 DBG_AUDSP_LOAD(" MIU of PreFetch: 0x%lX\r\n", MIU_addr);
551
552 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->prefetch_buf)), pau_info->prefetch_len);
553 }
554
555 // Download PM of Cache
556 if(pau_info->cache_len != 0)
557 {
558 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
559 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
560 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
561
562 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
563 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
564 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->cache_buf)), pau_info->cache_len);
565 }
566
567 // Load SE-DSP system code
568 if(IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
569 {
570 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP SND-R2
571 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
572 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
573 AUDIO_DELAY1MS(1);
574
575 #ifdef MBOOT
576 //============ Load R2 code ===============
577 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
578 //====================================
579
580 // Load DEC-R2
581 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
582
583 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
584 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
585 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
586 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
587 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
588 HAL_DEC_R2_init_SHM_param();
589 AUDIO_DELAY1MS(1);
590 MsOS_FlushMemory();
591
592 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
593 #else
594 //============ Load R2 code ===============
595 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
596 //====================================
597
598 // Load DEC-R2
599 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
600
601 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
602 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
603 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
604 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
605 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
606 HAL_DEC_R2_init_SHM_param();
607 AUDIO_DELAY1MS(1);
608 MsOS_FlushMemory();
609 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
610 #endif
611
612 if(!HAL_AUDSP_DspLoadCodeSegment(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
613 if(!HAL_AUDSP_DspVerifySegmentCode(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
614 if(!HAL_AUDSP_DspLoadCodeSegment(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
615 if(!HAL_AUDSP_DspVerifySegmentCode(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
616 }
617
618 MsOS_FlushMemory();
619
620 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
621 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=%s(0x%x))\r\n", pau_info->AlgName, dspCodeType);
622
623 return TRUE;
624 }
625
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)626 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
627 {
628 MS_U32 MIU_addr;
629 AUDIO_ALG_INFO * pau_info = (AUDIO_ALG_INFO *) info;
630
631 if ( pau_info->cm_len == 0 )
632 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
633
634 // HALAUDSP_ERROR ("@@@@@@@@@@ ====== %s: %s start ======\r\n", __FUNCTION__, pau_info->AlgName);
635
636 //HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
637
638 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, ((DSP_select == DSP_DEC) ? 0x00 : 0x01));
639
640 /* Download PM of Algorithm */
641 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n", pau_info->pm_addr);
642 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_U32) pau_info->pm_buf);
643 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n", pau_info->pm_len);
644
645 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
646 {
647 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Fail !!\r\n");
648 return FALSE;
649 }
650
651 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
652 {
653 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Verify Fail !!\r\n");
654 return FALSE;
655 }
656
657 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n", pau_info->cm_addr);
658 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_U32) pau_info->cm_buf);
659 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n", pau_info->cm_len);
660
661 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
662 {
663 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Fail !!\r\n");
664 return FALSE;
665 }
666
667 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
668 {
669 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Verify Fail !!\r\n");
670 return FALSE;
671 }
672
673 /* Download PM of PreFetch */
674 if ( pau_info->prefetch_len != 0 )
675 {
676 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
677 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
678 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
679
680 MIU_addr = (MS_U32) pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
681 HALAUDSP_ERROR (" MIU of PreFetch: 0x%X\r\n", MIU_addr);
682
683 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->prefetch_buf)), pau_info->prefetch_len);
684 }
685
686 /* Download PM of Cache */
687 if ( pau_info->cache_len != 0 )
688 {
689 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
690 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
691 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
692
693 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
694 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
695
696 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->cache_buf)), pau_info->cache_len);
697 }
698
699 MsOS_FlushMemory();
700
701 DBG_AUDSP_LOAD("DSP %s finished (type=%s)\r\n", ((DSP_select == DSP_DEC) ? "DEC" : "SND"), pau_info->AlgName);
702
703 return TRUE;
704 }
705
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)706 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
707 {
708 MS_U8 * dsp_bootcode;
709 #ifndef MBOOT
710 MS_U32 MIU_addr;
711 #endif
712
713 if ( pau_info->cm_len == 0 )
714 {
715 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
716 }
717
718 dsp_bootcode = pau_info->cm_buf;
719
720 pau_info->cm_addr = 0x0008;
721 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
722 pau_info->cm_buf = (mst_codec_pm1 + 30);
723
724 if ( !HAL_AUDSP_DspLoadCode2(DSP_select, pau_info) )
725 {
726 return FALSE;
727 }
728
729 if ( DSP_select == DSP_SE )
730 {
731 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000);
732 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x00); //Stop R2
733 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
734 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
735 AUDIO_DELAY1MS(1);
736 #ifndef MBOOT
737 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(2);
738 memcpy((void *) (MS_PA2KSEG1 (MIU_addr)), (void *) ( (mst_codec_r2)), MST_CODEC_R2_AUDIO_SIZE);
739 #endif
740 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x27); //Eanble R2
741 }
742
743
744 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0001, dsp_bootcode + 3, 21, DSP_select) )
745 {
746 return FALSE;
747 }
748
749 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0001, dsp_bootcode + 3, 21, DSP_select) )
750 {
751 return FALSE;
752 }
753
754 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0000, dsp_bootcode, 3, DSP_select) )
755 {
756 return FALSE;
757 }
758
759 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0000, dsp_bootcode, 3, DSP_select) )
760 {
761 return FALSE;
762 }
763
764
765 MsOS_FlushMemory();
766
767 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
768 printf("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
769
770 return TRUE;
771 }
772
773 ////////////////////////////////////////////////////////////////////////////////
774 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
775 /// @brief \b Function \b Description: This routine is used to load DSP code
776 /// @param <IN> \b dsp_addr :
777 /// @param <IN> \b dspCode_buf :
778 /// @param <IN> \b dspCode_buflen :
779 /// @param <OUT> \b NONE :
780 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
781 /// FALSE--DSP Load code fail
782 /// @param <GLOBAL> \b NONE :
783 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)784 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
785 {
786 MS_U32 i,j;
787 MS_U32 idma_wrbase_addr_l, dsp_brg_data_l, dsp_brg_data_h, bdma_mode_addr;
788
789 HALAUDSP_CHECK_SHM_INIT;
790
791 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
792
793 g_bDSPLoadCode = TRUE;
794
795 if(DSP_select == DSP_DEC)
796 {
797 idma_wrbase_addr_l = REG_DEC_IDMA_WRBASE_ADDR_L;
798 dsp_brg_data_l = REG_DEC_DSP_BRG_DATA_L;
799 dsp_brg_data_h = REG_DEC_DSP_BRG_DATA_H;
800 bdma_mode_addr = REG_DEC_BDMA_CFG;
801 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
802 }
803 else
804 {
805 idma_wrbase_addr_l = REG_SE_IDMA_WRBASE_ADDR_L;
806 dsp_brg_data_l = REG_SE_DSP_BRG_DATA_L;
807 dsp_brg_data_h = REG_SE_DSP_BRG_DATA_H;
808 bdma_mode_addr = REG_SE_BDMA_CFG;
809 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
810 }
811
812 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma
813
814 if(dspCode_buflen>0)
815 {
816 /* set iDMA addr */
817
818 HAL_AUDIO_WriteReg(idma_wrbase_addr_l, dsp_addr);
819
820 AUDIO_DELAY1MS(1);
821
822 for( i=0; i<dspCode_buflen; i+=3)
823 {
824 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i+1));
825 HAL_AUDIO_WriteByte(dsp_brg_data_h,*(dspCode_buf+i+2));
826
827 for(j=0;j<2;j++);//for delay only
828
829 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i));
830 HAL_AUDIO_WriteByte(dsp_brg_data_h,0x00);
831
832 if(DSP_select == DSP_DEC)
833 {
834 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
835 {
836 g_bDSPLoadCode = FALSE;
837
838 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
839
840 return FALSE;
841 }
842 }
843 else
844 {
845 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
846 {
847 g_bDSPLoadCode = FALSE;
848
849 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
850
851 return FALSE;
852 }
853 }
854 }
855 }
856
857 g_bDSPLoadCode = FALSE;
858
859 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
860
861 return TRUE;
862 }
863
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)864 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
865 {
866 MS_U32 i;
867 MS_U8 dat[3];
868 MS_U32 idma_rdbase_addr_l, idma_ctrl0, idma_rddata_h_0, idma_rddata_h_1, idma_rddata_l, bdma_mode_addr;
869
870 #if (DSP_VERIFY_DSP_CODE==0)
871 return TRUE; //don't verify just return;
872 #endif
873
874 HALAUDSP_CHECK_SHM_INIT;
875
876 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
877
878 g_bDSPLoadCode = TRUE;
879
880 if ( DSP_select == DSP_DEC )
881 {
882 idma_rdbase_addr_l = REG_DEC_IDMA_RDBASE_ADDR_L;
883 idma_ctrl0 = REG_DEC_IDMA_CTRL0;
884 idma_rddata_h_0 = REG_DEC_IDMA_RDDATA_H_0;
885 idma_rddata_h_1 = REG_DEC_IDMA_RDDATA_H_1;
886 idma_rddata_l = REG_DEC_IDMA_RDDATA_L;
887 bdma_mode_addr = REG_DEC_BDMA_CFG;
888 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
889 }
890 else
891 {
892 idma_rdbase_addr_l = REG_SE_IDMA_RDBASE_ADDR_L;
893 idma_ctrl0 = REG_SE_IDMA_CTRL0;
894 idma_rddata_h_0 = REG_SE_IDMA_RDDATA_H_0;
895 idma_rddata_h_1 = REG_SE_IDMA_RDDATA_H_1;
896 idma_rddata_l = REG_SE_IDMA_RDDATA_L;
897 bdma_mode_addr = REG_SE_BDMA_CFG;
898 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
899 }
900
901 //HAL_AUDIO_WriteMaskByte(0x3CEC, 0x40, 0x00);
902 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma (enable idma)
903 HAL_AUDIO_WriteReg(idma_rdbase_addr_l, dsp_addr);
904 AUDIO_DELAY1MS(1);
905
906 for (i=0; i<dspCode_buflen; i+=3)
907 {
908 HAL_AUDIO_WriteMaskByte(idma_ctrl0, 0x08, 0x08 );
909 #if (DSP_IDMA_CHK_READY == 1)
910 if(DSP_select == DSP_DEC)
911 {
912 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
913 {
914 g_bDSPLoadCode = FALSE;
915
916 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
917
918 return FALSE;
919 }
920 }
921 else
922 {
923 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
924 {
925 g_bDSPLoadCode = FALSE;
926
927 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
928
929 return FALSE;
930 }
931 }
932 #endif
933 dat[1] = HAL_AUDIO_ReadByte(idma_rddata_h_0);
934 dat[2] = HAL_AUDIO_ReadByte(idma_rddata_h_1);
935 dat[0] = HAL_AUDIO_ReadByte(idma_rddata_l);
936
937 //printf("@@%x\n", (dat[2] << 16) | (dat[1] << 8) | (dat[0]));
938
939 if ( (dat[0]!=dspCode_buf[i]) || (dat[1]!=dspCode_buf[i+1]) ||
940 (dat[2]!=dspCode_buf[i+2]))
941 {
942 printf("check data %x\n", i);
943 printf("dat0 %X <===> ",dspCode_buf[i]);
944 printf("%x \n", dat[0]);
945 printf("dat1 %X <===> ",dspCode_buf[i+1]);
946 printf("%x \n", dat[1]);
947 printf("dat2 %x <===> ",dspCode_buf[i+2]);
948 printf("%X \n", dat[2]);
949 printf(" Dsp code verify error!!\r\n");
950
951 g_bDSPLoadCode = FALSE;
952
953 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
954
955 return FALSE;
956 }
957 }
958
959 DBG_AUDSP(" Dsp code verify ok!!\n\r");
960
961 g_bDSPLoadCode = FALSE;
962
963 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
964
965 return TRUE;
966 }
967
968 ////////////////////////////////////////////////////////////////////////////////
969 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
970 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
971 /// @param <IN> \b IdmaChk_type :
972 /// 0x10 : check write ready
973 /// 0x80 : check read ready
974 /// @param <OUT> \b NONE :
975 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
976 /// FALSE--IDMA not ready
977 /// @param <GLOBAL> \b NONE :
978 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)979 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
980 {
981 MS_U8 j = 0;
982
983 while(j<200)
984 {
985 j++;
986 if( (HAL_AUDIO_ReadByte(REG_DEC_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
987 return TRUE;
988 }
989
990 DBG_AUDSP_ERROR("DSP DEC Idma check ready fail!(%d)\r\n",j);
991 return FALSE;
992 }
993
994 ////////////////////////////////////////////////////////////////////////////////
995 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
996 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
997 /// @param <IN> \b IdmaChk_type :
998 /// 0x10 : check write ready
999 /// 0x80 : check read ready
1000 /// @param <OUT> \b NONE :
1001 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1002 /// FALSE--IDMA not ready
1003 /// @param <GLOBAL> \b NONE :
1004 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)1005 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
1006 {
1007 MS_U8 j = 0;
1008
1009 while(j<200)
1010 {
1011 j++;
1012 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1013 return TRUE;
1014 }
1015
1016 DBG_AUDSP_ERROR("DSP SE Idma check ready fail!(%d)\r\n",j);
1017 return FALSE;
1018 }
1019
1020 ////////////////////////////////////////////////////////////////////////////////
1021 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
1022 /// @brief \b Function \b Description: This function is used to set the DSP code type.
1023 /// @param <IN> \b NONE :
1024 /// @param <OUT> \b NONE :
1025 /// @param <RET> \b dspCodeType: DSP code type.
1026 /// @param <GLOBAL> \b NONE :
1027 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(AUDIO_DSP_CODE_TYPE dspCodeType)1028 void HAL_AUDSP_SetDspCodeTypeLoaded(AUDIO_DSP_CODE_TYPE dspCodeType)
1029 {
1030 g_DspCodeTypeLoaded = dspCodeType;
1031 }
1032
1033 ////////////////////////////////////////////////////////////////////////////////
1034 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1035 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1036 /// @param <IN> \b NONE :
1037 /// @param <OUT> \b NONE :
1038 /// @param <RET> \b AUDIO_DSP_CODE_TYPE: DSP code type.
1039 /// @param <GLOBAL> \b NONE :
1040 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)1041 AUDIO_DSP_CODE_TYPE HAL_AUDSP_GetDspCodeTypeLoaded(void)
1042 {
1043 return g_DspCodeTypeLoaded;
1044 }
1045
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)1046 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
1047 {
1048 g_loadcodeinfo.pau_info = pau_info;
1049 g_loadcodeinfo.DSP_select= DSP_select;
1050 }
1051
1052 ////////////////////////////////////////////////////////////////////////////////
1053 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1054 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1055 /// @param <IN> \b NONE :
1056 /// @param <OUT> \b NONE :
1057 /// @param <RET> \b MS_U8: DSP code type.
1058 /// @param <GLOBAL> \b NONE :
1059 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)1060 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
1061 {
1062 return &g_loadcodeinfo;
1063 }
1064
1065 ////////////////////////////////////////////////////////////////////////////////
1066 /// @brief \b Function \b Name: HAL_AUDSP_DECR2LoadCode()
1067 /// @brief \b Function \b Description: Load DEC-R2 code to DDR
1068 /// @param <IN> \b NONE :
1069 /// @param <OUT> \b NONE :
1070 /// @param <RET> \b NONE :
1071 /// @param <GLOBAL> \b NONE :
1072 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DECR2LoadCode(void)1073 void HAL_AUDSP_DECR2LoadCode(void)
1074 {
1075 MS_U32 MIU_addr;
1076
1077 printf("======audio: start DEC-R2 load code======\n");
1078
1079 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP DEC-R2
1080 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register
1081 AUDIO_DELAY1MS(1);
1082
1083 //============ Load R2 code ===============
1084 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1085 //====================================
1086
1087 // Load DEC-R2
1088 #if (ENABLE_AUDIO_DEC_R2_BIN == FALSE)
1089 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1090
1091 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1092 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1093 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1094 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1095 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1096 #else
1097 {
1098 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1099
1100 if (pf_loadR2CodeFromBin)
1101 {
1102 MsOS_Dcache_Flush(0, 64 * 1024 * 1024);
1103 MsOS_FlushMemory();
1104 pf_loadR2CodeFromBin(0, MIU_addr, ADEC__R2_DDR_SIZE);
1105 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET), 0, DEC_R2_SHM_DDR_SIZE);
1106 }
1107 else
1108 {
1109 printf("[%s] error !! call pf_loadR2CodeFromBin is NULL\n", __FUNCTION__);
1110 }
1111 }
1112 #endif
1113
1114 HAL_DEC_R2_init_SHM_param();
1115 AUDIO_DELAY1MS(1);
1116 MsOS_FlushMemory();
1117
1118 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1119 HAL_MAD2_SetMcuCmd(0xF3);
1120
1121 printf("======audio: end DEC-R2 load code======\n");
1122 }
1123
1124