1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _DECODER_INFO_H_ 96 #define _DECODER_INFO_H_ 97 98 //=========================================================================== 99 // define supported decoder here 100 //=========================================================================== 101 #ifndef CONFIG_MBOOT // Normal mode 102 #define DSP_SUPPORT_XPCM 1 103 #define DSP_SUPPORT_MP3 1 104 #define DSP_SUPPORT_MPEG 1 105 #define DSP_SUPPORT_AC3P 1 106 #define DSP_SUPPORT_MS10_DDT 0 107 #define DSP_SUPPORT_GAAC 1 108 #define DSP_SUPPORT_WMA_PRO 1 109 #define DSP_SUPPORT_DTS_DMP 1 110 #define DSP_SUPPORT_DTS_LBR 0 111 #define DSP_SUPPORT_RA8LBR 1 112 #define DSP_SUPPORT_VORBIS 1 113 #define DSP_SUPPORT_AMR_NB 1 114 #define DSP_SUPPORT_AMR_WB 1 115 #define DSP_SUPPORT_DRAD 1 116 #define DSP_SUPPORT_FLAC 1 117 #define DSP_SUPPORT_PALSUM 1 118 #define DSP_SUPPORT_BTSC 1 119 #define DSP_SUPPORT_TSHD 1 120 #define DSP_SUPPORT_TSXT 1 121 #define DSP_SUPPORT_PURESND 1 122 #define DSP_SUPPORT_DEC 1 123 #define DSP_SUPPORT_DDE 0 124 #define DSP_SUPPORT_DBX 1 125 #else //Mboot mode 126 #define DSP_SUPPORT_XPCM 0 127 #define DSP_SUPPORT_MP3 1 128 #define DSP_SUPPORT_MPEG 0 129 #define DSP_SUPPORT_AC3P 0 130 #define DSP_SUPPORT_MS10_DDT 0 131 #define DSP_SUPPORT_GAAC 0 132 #define DSP_SUPPORT_WMA_PRO 0 133 #define DSP_SUPPORT_DTS_DMP 0 134 #define DSP_SUPPORT_DTS_LBR 0 135 #define DSP_SUPPORT_RA8LBR 0 136 #define DSP_SUPPORT_VORBIS 0 137 #define DSP_SUPPORT_AMR_NB 0 138 #define DSP_SUPPORT_AMR_WB 0 139 #define DSP_SUPPORT_DRAD 0 140 #define DSP_SUPPORT_FLAC 0 141 #define DSP_SUPPORT_PALSUM 0 142 #define DSP_SUPPORT_BTSC 0 143 #define DSP_SUPPORT_TSHD 0 144 #define DSP_SUPPORT_TSXT 0 145 #define DSP_SUPPORT_PURESND 0 146 #define DSP_SUPPORT_DBX 0 147 #define DSP_SUPPORT_DEC 0 148 #define DSP_SUPPORT_DDE 0 149 #endif 150 151 //=========================================================================== 152 // Include files 153 //=========================================================================== 154 155 #include "dspcode_s/aucode_s.c" 156 157 #if(DSP_SUPPORT_XPCM) 158 #include "dspcode_s/aucode_xpcm.c" 159 #endif 160 #if(DSP_SUPPORT_MP3) 161 #include "dspcode_s/aucode_mp3.c" 162 #endif 163 #if(DSP_SUPPORT_MPEG) 164 #include "dspcode_s/aucode_mpeg.c" 165 #endif 166 #if(DSP_SUPPORT_AC3P) 167 #include "dspcode_s/aucode_ac3p.c" 168 #endif 169 #if(DSP_SUPPORT_MS10_DDT) 170 #include "dspcode_s/aucode_ms10_ddt.c" 171 #endif 172 #if(DSP_SUPPORT_GAAC) 173 #include "dspcode_s/aucode_gaac.c" 174 #endif 175 #if(DSP_SUPPORT_WMA_PRO) 176 #include "dspcode_s/aucode_wma_pro.c" 177 #endif 178 #if(DSP_SUPPORT_DTS_DMP) 179 #include "dspcode_s/aucode_dts_dmp.c" 180 #endif 181 #if(DSP_SUPPORT_DTS_LBR) 182 #include "dspcode_s/aucode_dts_lbr.c" 183 #endif 184 #if(DSP_SUPPORT_RA8LBR) 185 #include "dspcode_s/aucode_ra8lbr.c" 186 #endif 187 #if(DSP_SUPPORT_VORBIS) 188 #include "dspcode_s/aucode_vorbis.c" 189 #endif 190 #if(DSP_SUPPORT_AMR_NB) 191 #include "dspcode_s/aucode_amr_nb.c" 192 #endif 193 #if(DSP_SUPPORT_AMR_WB) 194 #include "dspcode_s/aucode_amr_wb.c" 195 #endif 196 #if(DSP_SUPPORT_DRAD) 197 #include "dspcode_s/aucode_drad.c" 198 #endif 199 #if(DSP_SUPPORT_FLAC) 200 #include "dspcode_s/aucode_flac.c" 201 #endif 202 #if(DSP_SUPPORT_PALSUM) 203 #include "dspcode_s/aucode_palsum.c" 204 #endif 205 #if(DSP_SUPPORT_BTSC) 206 #include "dspcode_s/aucode_btsc.c" 207 #endif 208 #if(DSP_SUPPORT_TSHD) 209 #include "dspcode_s/aucode_tshd.c" 210 #endif 211 #if(DSP_SUPPORT_TSXT) 212 #include "dspcode_s/aucode_tsxt.c" 213 #endif 214 #if(DSP_SUPPORT_PURESND) 215 #include "dspcode_s/aucode_puresnd.c" 216 #endif 217 #if(DSP_SUPPORT_DEC) 218 #include "dspcode_s/aucode_dec.c" 219 #endif 220 #if(DSP_SUPPORT_DDE) 221 #include "dspcode_s/aucode_dde.c" 222 #endif 223 #if(DSP_SUPPORT_DBX) 224 #include "dspcode_s/aucode_dbx.c" 225 #endif 226 //=========================================================== 227 #ifndef MST_CODEC_XPCM_PM1_ADDR 228 #define MST_CODEC_XPCM_PM1_ADDR 0 229 #define MST_CODEC_XPCM_PM1_SIZE 0 230 #define mst_codec_xpcm_pm1 0 231 #endif 232 #ifndef MST_CODEC_XPCM_PM2_ADDR 233 #define MST_CODEC_XPCM_PM2_ADDR 0 234 #define MST_CODEC_XPCM_PM2_SIZE 0 235 #define mst_codec_xpcm_pm2 0 236 #endif 237 #ifndef MST_CODEC_XPCM_PM3_ADDR 238 #define MST_CODEC_XPCM_PM3_ADDR 0 239 #define MST_CODEC_XPCM_PM3_SIZE 0 240 #define mst_codec_xpcm_pm3 0 241 #endif 242 #ifndef MST_CODEC_XPCM_PM4_ADDR 243 #define MST_CODEC_XPCM_PM4_ADDR 0 244 #define MST_CODEC_XPCM_PM4_SIZE 0 245 #define mst_codec_xpcm_pm4 0 246 #endif 247 #ifndef MST_CODEC_MP3_PM1_ADDR 248 #define MST_CODEC_MP3_PM1_ADDR 0 249 #define MST_CODEC_MP3_PM1_SIZE 0 250 #define mst_codec_mp3_pm1 0 251 #endif 252 #ifndef MST_CODEC_MP3_PM2_ADDR 253 #define MST_CODEC_MP3_PM2_ADDR 0 254 #define MST_CODEC_MP3_PM2_SIZE 0 255 #define mst_codec_mp3_pm2 0 256 #endif 257 #ifndef MST_CODEC_MP3_PM3_ADDR 258 #define MST_CODEC_MP3_PM3_ADDR 0 259 #define MST_CODEC_MP3_PM3_SIZE 0 260 #define mst_codec_mp3_pm3 0 261 #endif 262 #ifndef MST_CODEC_MP3_PM4_ADDR 263 #define MST_CODEC_MP3_PM4_ADDR 0 264 #define MST_CODEC_MP3_PM4_SIZE 0 265 #define mst_codec_mp3_pm4 0 266 #endif 267 #ifndef MST_CODEC_MPEG_PM1_ADDR 268 #define MST_CODEC_MPEG_PM1_ADDR 0 269 #define MST_CODEC_MPEG_PM1_SIZE 0 270 #define mst_codec_mpeg_pm1 0 271 #endif 272 #ifndef MST_CODEC_MPEG_PM2_ADDR 273 #define MST_CODEC_MPEG_PM2_ADDR 0 274 #define MST_CODEC_MPEG_PM2_SIZE 0 275 #define mst_codec_mpeg_pm2 0 276 #endif 277 #ifndef MST_CODEC_MPEG_PM3_ADDR 278 #define MST_CODEC_MPEG_PM3_ADDR 0 279 #define MST_CODEC_MPEG_PM3_SIZE 0 280 #define mst_codec_mpeg_pm3 0 281 #endif 282 #ifndef MST_CODEC_MPEG_PM4_ADDR 283 #define MST_CODEC_MPEG_PM4_ADDR 0 284 #define MST_CODEC_MPEG_PM4_SIZE 0 285 #define mst_codec_mpeg_pm4 0 286 #endif 287 #ifndef MST_CODEC_AC3P_PM1_ADDR 288 #define MST_CODEC_AC3P_PM1_ADDR 0 289 #define MST_CODEC_AC3P_PM1_SIZE 0 290 #define mst_codec_ac3p_pm1 0 291 #endif 292 #ifndef MST_CODEC_AC3P_PM2_ADDR 293 #define MST_CODEC_AC3P_PM2_ADDR 0 294 #define MST_CODEC_AC3P_PM2_SIZE 0 295 #define mst_codec_ac3p_pm2 0 296 #endif 297 #ifndef MST_CODEC_AC3P_PM3_ADDR 298 #define MST_CODEC_AC3P_PM3_ADDR 0 299 #define MST_CODEC_AC3P_PM3_SIZE 0 300 #define mst_codec_ac3p_pm3 0 301 #endif 302 #ifndef MST_CODEC_AC3P_PM4_ADDR 303 #define MST_CODEC_AC3P_PM4_ADDR 0 304 #define MST_CODEC_AC3P_PM4_SIZE 0 305 #define mst_codec_ac3p_pm4 0 306 #endif 307 #ifndef MST_CODEC_MS10_DDT_PM1_ADDR 308 #define MST_CODEC_MS10_DDT_PM1_ADDR 0 309 #define MST_CODEC_MS10_DDT_PM1_SIZE 0 310 #define mst_codec_ms10_ddt_pm1 0 311 #endif 312 #ifndef MST_CODEC_MS10_DDT_PM2_ADDR 313 #define MST_CODEC_MS10_DDT_PM2_ADDR 0 314 #define MST_CODEC_MS10_DDT_PM2_SIZE 0 315 #define mst_codec_ms10_ddt_pm2 0 316 #endif 317 #ifndef MST_CODEC_MS10_DDT_PM3_ADDR 318 #define MST_CODEC_MS10_DDT_PM3_ADDR 0 319 #define MST_CODEC_MS10_DDT_PM3_SIZE 0 320 #define mst_codec_ms10_ddt_pm3 0 321 #endif 322 #ifndef MST_CODEC_MS10_DDT_PM4_ADDR 323 #define MST_CODEC_MS10_DDT_PM4_ADDR 0 324 #define MST_CODEC_MS10_DDT_PM4_SIZE 0 325 #define mst_codec_ms10_ddt_pm4 0 326 #endif 327 #ifndef MST_CODEC_GAAC_PM1_ADDR 328 #define MST_CODEC_GAAC_PM1_ADDR 0 329 #define MST_CODEC_GAAC_PM1_SIZE 0 330 #define mst_codec_gaac_pm1 0 331 #endif 332 #ifndef MST_CODEC_GAAC_PM2_ADDR 333 #define MST_CODEC_GAAC_PM2_ADDR 0 334 #define MST_CODEC_GAAC_PM2_SIZE 0 335 #define mst_codec_gaac_pm2 0 336 #endif 337 #ifndef MST_CODEC_GAAC_PM3_ADDR 338 #define MST_CODEC_GAAC_PM3_ADDR 0 339 #define MST_CODEC_GAAC_PM3_SIZE 0 340 #define mst_codec_gaac_pm3 0 341 #endif 342 #ifndef MST_CODEC_GAAC_PM4_ADDR 343 #define MST_CODEC_GAAC_PM4_ADDR 0 344 #define MST_CODEC_GAAC_PM4_SIZE 0 345 #define mst_codec_gaac_pm4 0 346 #endif 347 #ifndef MST_CODEC_WMA_PRO_PM1_ADDR 348 #define MST_CODEC_WMA_PRO_PM1_ADDR 0 349 #define MST_CODEC_WMA_PRO_PM1_SIZE 0 350 #define mst_codec_wma_pro_pm1 0 351 #endif 352 #ifndef MST_CODEC_WMA_PRO_PM2_ADDR 353 #define MST_CODEC_WMA_PRO_PM2_ADDR 0 354 #define MST_CODEC_WMA_PRO_PM2_SIZE 0 355 #define mst_codec_wma_pro_pm2 0 356 #endif 357 #ifndef MST_CODEC_WMA_PRO_PM3_ADDR 358 #define MST_CODEC_WMA_PRO_PM3_ADDR 0 359 #define MST_CODEC_WMA_PRO_PM3_SIZE 0 360 #define mst_codec_wma_pro_pm3 0 361 #endif 362 #ifndef MST_CODEC_WMA_PRO_PM4_ADDR 363 #define MST_CODEC_WMA_PRO_PM4_ADDR 0 364 #define MST_CODEC_WMA_PRO_PM4_SIZE 0 365 #define mst_codec_wma_pro_pm4 0 366 #endif 367 #ifndef MST_CODEC_DTS_DMP_PM1_ADDR 368 #define MST_CODEC_DTS_DMP_PM1_ADDR 0 369 #define MST_CODEC_DTS_DMP_PM1_SIZE 0 370 #define mst_codec_dts_dmp_pm1 0 371 #endif 372 #ifndef MST_CODEC_DTS_DMP_PM2_ADDR 373 #define MST_CODEC_DTS_DMP_PM2_ADDR 0 374 #define MST_CODEC_DTS_DMP_PM2_SIZE 0 375 #define mst_codec_dts_dmp_pm2 0 376 #endif 377 #ifndef MST_CODEC_DTS_DMP_PM3_ADDR 378 #define MST_CODEC_DTS_DMP_PM3_ADDR 0 379 #define MST_CODEC_DTS_DMP_PM3_SIZE 0 380 #define mst_codec_dts_dmp_pm3 0 381 #endif 382 #ifndef MST_CODEC_DTS_DMP_PM4_ADDR 383 #define MST_CODEC_DTS_DMP_PM4_ADDR 0 384 #define MST_CODEC_DTS_DMP_PM4_SIZE 0 385 #define mst_codec_dts_dmp_pm4 0 386 #endif 387 #ifndef MST_CODEC_DTS_LBR_PM1_ADDR 388 #define MST_CODEC_DTS_LBR_PM1_ADDR 0 389 #define MST_CODEC_DTS_LBR_PM1_SIZE 0 390 #define mst_codec_dts_lbr_pm1 0 391 #endif 392 #ifndef MST_CODEC_DTS_LBR_PM2_ADDR 393 #define MST_CODEC_DTS_LBR_PM2_ADDR 0 394 #define MST_CODEC_DTS_LBR_PM2_SIZE 0 395 #define mst_codec_dts_lbr_pm2 0 396 #endif 397 #ifndef MST_CODEC_DTS_LBR_PM3_ADDR 398 #define MST_CODEC_DTS_LBR_PM3_ADDR 0 399 #define MST_CODEC_DTS_LBR_PM3_SIZE 0 400 #define mst_codec_dts_lbr_pm3 0 401 #endif 402 #ifndef MST_CODEC_DTS_LBR_PM4_ADDR 403 #define MST_CODEC_DTS_LBR_PM4_ADDR 0 404 #define MST_CODEC_DTS_LBR_PM4_SIZE 0 405 #define mst_codec_dts_lbr_pm4 0 406 #endif 407 #ifndef MST_CODEC_RA8LBR_PM1_ADDR 408 #define MST_CODEC_RA8LBR_PM1_ADDR 0 409 #define MST_CODEC_RA8LBR_PM1_SIZE 0 410 #define mst_codec_ra8lbr_pm1 0 411 #endif 412 #ifndef MST_CODEC_RA8LBR_PM2_ADDR 413 #define MST_CODEC_RA8LBR_PM2_ADDR 0 414 #define MST_CODEC_RA8LBR_PM2_SIZE 0 415 #define mst_codec_ra8lbr_pm2 0 416 #endif 417 #ifndef MST_CODEC_RA8LBR_PM3_ADDR 418 #define MST_CODEC_RA8LBR_PM3_ADDR 0 419 #define MST_CODEC_RA8LBR_PM3_SIZE 0 420 #define mst_codec_ra8lbr_pm3 0 421 #endif 422 #ifndef MST_CODEC_RA8LBR_PM4_ADDR 423 #define MST_CODEC_RA8LBR_PM4_ADDR 0 424 #define MST_CODEC_RA8LBR_PM4_SIZE 0 425 #define mst_codec_ra8lbr_pm4 0 426 #endif 427 #ifndef MST_CODEC_VORBIS_PM1_ADDR 428 #define MST_CODEC_VORBIS_PM1_ADDR 0 429 #define MST_CODEC_VORBIS_PM1_SIZE 0 430 #define mst_codec_vorbis_pm1 0 431 #endif 432 #ifndef MST_CODEC_VORBIS_PM2_ADDR 433 #define MST_CODEC_VORBIS_PM2_ADDR 0 434 #define MST_CODEC_VORBIS_PM2_SIZE 0 435 #define mst_codec_vorbis_pm2 0 436 #endif 437 #ifndef MST_CODEC_VORBIS_PM3_ADDR 438 #define MST_CODEC_VORBIS_PM3_ADDR 0 439 #define MST_CODEC_VORBIS_PM3_SIZE 0 440 #define mst_codec_vorbis_pm3 0 441 #endif 442 #ifndef MST_CODEC_VORBIS_PM4_ADDR 443 #define MST_CODEC_VORBIS_PM4_ADDR 0 444 #define MST_CODEC_VORBIS_PM4_SIZE 0 445 #define mst_codec_vorbis_pm4 0 446 #endif 447 #ifndef MST_CODEC_AMR_NB_PM1_ADDR 448 #define MST_CODEC_AMR_NB_PM1_ADDR 0 449 #define MST_CODEC_AMR_NB_PM1_SIZE 0 450 #define mst_codec_amr_nb_pm1 0 451 #endif 452 #ifndef MST_CODEC_AMR_NB_PM2_ADDR 453 #define MST_CODEC_AMR_NB_PM2_ADDR 0 454 #define MST_CODEC_AMR_NB_PM2_SIZE 0 455 #define mst_codec_amr_nb_pm2 0 456 #endif 457 #ifndef MST_CODEC_AMR_NB_PM3_ADDR 458 #define MST_CODEC_AMR_NB_PM3_ADDR 0 459 #define MST_CODEC_AMR_NB_PM3_SIZE 0 460 #define mst_codec_amr_nb_pm3 0 461 #endif 462 #ifndef MST_CODEC_AMR_NB_PM4_ADDR 463 #define MST_CODEC_AMR_NB_PM4_ADDR 0 464 #define MST_CODEC_AMR_NB_PM4_SIZE 0 465 #define mst_codec_amr_nb_pm4 0 466 #endif 467 #ifndef MST_CODEC_AMR_WB_PM1_ADDR 468 #define MST_CODEC_AMR_WB_PM1_ADDR 0 469 #define MST_CODEC_AMR_WB_PM1_SIZE 0 470 #define mst_codec_amr_wb_pm1 0 471 #endif 472 #ifndef MST_CODEC_AMR_WB_PM2_ADDR 473 #define MST_CODEC_AMR_WB_PM2_ADDR 0 474 #define MST_CODEC_AMR_WB_PM2_SIZE 0 475 #define mst_codec_amr_wb_pm2 0 476 #endif 477 #ifndef MST_CODEC_AMR_WB_PM3_ADDR 478 #define MST_CODEC_AMR_WB_PM3_ADDR 0 479 #define MST_CODEC_AMR_WB_PM3_SIZE 0 480 #define mst_codec_amr_wb_pm3 0 481 #endif 482 #ifndef MST_CODEC_AMR_WB_PM4_ADDR 483 #define MST_CODEC_AMR_WB_PM4_ADDR 0 484 #define MST_CODEC_AMR_WB_PM4_SIZE 0 485 #define mst_codec_amr_wb_pm4 0 486 #endif 487 #ifndef MST_CODEC_DRAD_PM1_ADDR 488 #define MST_CODEC_DRAD_PM1_ADDR 0 489 #define MST_CODEC_DRAD_PM1_SIZE 0 490 #define mst_codec_drad_pm1 0 491 #endif 492 #ifndef MST_CODEC_DRAD_PM2_ADDR 493 #define MST_CODEC_DRAD_PM2_ADDR 0 494 #define MST_CODEC_DRAD_PM2_SIZE 0 495 #define mst_codec_drad_pm2 0 496 #endif 497 #ifndef MST_CODEC_DRAD_PM3_ADDR 498 #define MST_CODEC_DRAD_PM3_ADDR 0 499 #define MST_CODEC_DRAD_PM3_SIZE 0 500 #define mst_codec_drad_pm3 0 501 #endif 502 #ifndef MST_CODEC_DRAD_PM4_ADDR 503 #define MST_CODEC_DRAD_PM4_ADDR 0 504 #define MST_CODEC_DRAD_PM4_SIZE 0 505 #define mst_codec_drad_pm4 0 506 #endif 507 #ifndef MST_CODEC_FLAC_PM1_ADDR 508 #define MST_CODEC_FLAC_PM1_ADDR 0 509 #define MST_CODEC_FLAC_PM1_SIZE 0 510 #define mst_codec_flac_pm1 0 511 #endif 512 #ifndef MST_CODEC_FLAC_PM2_ADDR 513 #define MST_CODEC_FLAC_PM2_ADDR 0 514 #define MST_CODEC_FLAC_PM2_SIZE 0 515 #define mst_codec_flac_pm2 0 516 #endif 517 #ifndef MST_CODEC_FLAC_PM3_ADDR 518 #define MST_CODEC_FLAC_PM3_ADDR 0 519 #define MST_CODEC_FLAC_PM3_SIZE 0 520 #define mst_codec_flac_pm3 0 521 #endif 522 #ifndef MST_CODEC_FLAC_PM4_ADDR 523 #define MST_CODEC_FLAC_PM4_ADDR 0 524 #define MST_CODEC_FLAC_PM4_SIZE 0 525 #define mst_codec_flac_pm4 0 526 #endif 527 #ifndef MST_CODEC_PALSUM_PM1_ADDR 528 #define MST_CODEC_PALSUM_PM1_ADDR 0 529 #define MST_CODEC_PALSUM_PM1_SIZE 0 530 #define mst_codec_palsum_pm1 0 531 #endif 532 #ifndef MST_CODEC_PALSUM_PM2_ADDR 533 #define MST_CODEC_PALSUM_PM2_ADDR 0 534 #define MST_CODEC_PALSUM_PM2_SIZE 0 535 #define mst_codec_palsum_pm2 0 536 #endif 537 #ifndef MST_CODEC_PALSUM_PM3_ADDR 538 #define MST_CODEC_PALSUM_PM3_ADDR 0 539 #define MST_CODEC_PALSUM_PM3_SIZE 0 540 #define mst_codec_palsum_pm3 0 541 #endif 542 #ifndef MST_CODEC_PALSUM_PM4_ADDR 543 #define MST_CODEC_PALSUM_PM4_ADDR 0 544 #define MST_CODEC_PALSUM_PM4_SIZE 0 545 #define mst_codec_palsum_pm4 0 546 #endif 547 #ifndef MST_CODEC_BTSC_PM1_ADDR 548 #define MST_CODEC_BTSC_PM1_ADDR 0 549 #define MST_CODEC_BTSC_PM1_SIZE 0 550 #define mst_codec_btsc_pm1 0 551 #endif 552 #ifndef MST_CODEC_BTSC_PM2_ADDR 553 #define MST_CODEC_BTSC_PM2_ADDR 0 554 #define MST_CODEC_BTSC_PM2_SIZE 0 555 #define mst_codec_btsc_pm2 0 556 #endif 557 #ifndef MST_CODEC_BTSC_PM3_ADDR 558 #define MST_CODEC_BTSC_PM3_ADDR 0 559 #define MST_CODEC_BTSC_PM3_SIZE 0 560 #define mst_codec_btsc_pm3 0 561 #endif 562 #ifndef MST_CODEC_BTSC_PM4_ADDR 563 #define MST_CODEC_BTSC_PM4_ADDR 0 564 #define MST_CODEC_BTSC_PM4_SIZE 0 565 #define mst_codec_btsc_pm4 0 566 #endif 567 #ifndef MST_CODEC_TSHD_PM1_ADDR 568 #define MST_CODEC_TSHD_PM1_ADDR 0 569 #define MST_CODEC_TSHD_PM1_SIZE 0 570 #define mst_codec_tshd_pm1 0 571 #endif 572 #ifndef MST_CODEC_TSHD_PM2_ADDR 573 #define MST_CODEC_TSHD_PM2_ADDR 0 574 #define MST_CODEC_TSHD_PM2_SIZE 0 575 #define mst_codec_tshd_pm2 0 576 #endif 577 #ifndef MST_CODEC_TSHD_PM3_ADDR 578 #define MST_CODEC_TSHD_PM3_ADDR 0 579 #define MST_CODEC_TSHD_PM3_SIZE 0 580 #define mst_codec_tshd_pm3 0 581 #endif 582 #ifndef MST_CODEC_TSHD_PM4_ADDR 583 #define MST_CODEC_TSHD_PM4_ADDR 0 584 #define MST_CODEC_TSHD_PM4_SIZE 0 585 #define mst_codec_tshd_pm4 0 586 #endif 587 #ifndef MST_CODEC_TSXT_PM1_ADDR 588 #define MST_CODEC_TSXT_PM1_ADDR 0 589 #define MST_CODEC_TSXT_PM1_SIZE 0 590 #define mst_codec_tsxt_pm1 0 591 #endif 592 #ifndef MST_CODEC_TSXT_PM2_ADDR 593 #define MST_CODEC_TSXT_PM2_ADDR 0 594 #define MST_CODEC_TSXT_PM2_SIZE 0 595 #define mst_codec_tsxt_pm2 0 596 #endif 597 #ifndef MST_CODEC_TSXT_PM3_ADDR 598 #define MST_CODEC_TSXT_PM3_ADDR 0 599 #define MST_CODEC_TSXT_PM3_SIZE 0 600 #define mst_codec_tsxt_pm3 0 601 #endif 602 #ifndef MST_CODEC_TSXT_PM4_ADDR 603 #define MST_CODEC_TSXT_PM4_ADDR 0 604 #define MST_CODEC_TSXT_PM4_SIZE 0 605 #define mst_codec_tsxt_pm4 0 606 #endif 607 #ifndef MST_CODEC_PURESND_PM1_ADDR 608 #define MST_CODEC_PURESND_PM1_ADDR 0 609 #define MST_CODEC_PURESND_PM1_SIZE 0 610 #define mst_codec_puresnd_pm1 0 611 #endif 612 #ifndef MST_CODEC_PURESND_PM2_ADDR 613 #define MST_CODEC_PURESND_PM2_ADDR 0 614 #define MST_CODEC_PURESND_PM2_SIZE 0 615 #define mst_codec_puresnd_pm2 0 616 #endif 617 #ifndef MST_CODEC_PURESND_PM3_ADDR 618 #define MST_CODEC_PURESND_PM3_ADDR 0 619 #define MST_CODEC_PURESND_PM3_SIZE 0 620 #define mst_codec_puresnd_pm3 0 621 #endif 622 #ifndef MST_CODEC_PURESND_PM4_ADDR 623 #define MST_CODEC_PURESND_PM4_ADDR 0 624 #define MST_CODEC_PURESND_PM4_SIZE 0 625 #define mst_codec_puresnd_pm4 0 626 #endif 627 #ifndef MST_CODEC_DEC_PM1_ADDR 628 #define MST_CODEC_DEC_PM1_ADDR 0 629 #define MST_CODEC_DEC_PM1_SIZE 0 630 #define mst_codec_dec_pm1 0 631 #endif 632 #ifndef MST_CODEC_DEC_PM2_ADDR 633 #define MST_CODEC_DEC_PM2_ADDR 0 634 #define MST_CODEC_DEC_PM2_SIZE 0 635 #define mst_codec_dec_pm2 0 636 #endif 637 #ifndef MST_CODEC_DEC_PM3_ADDR 638 #define MST_CODEC_DEC_PM3_ADDR 0 639 #define MST_CODEC_DEC_PM3_SIZE 0 640 #define mst_codec_dec_pm3 0 641 #endif 642 #ifndef MST_CODEC_DEC_PM4_ADDR 643 #define MST_CODEC_DEC_PM4_ADDR 0 644 #define MST_CODEC_DEC_PM4_SIZE 0 645 #define mst_codec_dec_pm4 0 646 #endif 647 #ifndef MST_CODEC_DDE_PM1_ADDR 648 #define MST_CODEC_DDE_PM1_ADDR 0 649 #define MST_CODEC_DDE_PM1_SIZE 0 650 #define mst_codec_dde_pm1 0 651 #endif 652 #ifndef MST_CODEC_DDE_PM2_ADDR 653 #define MST_CODEC_DDE_PM2_ADDR 0 654 #define MST_CODEC_DDE_PM2_SIZE 0 655 #define mst_codec_dde_pm2 0 656 #endif 657 #ifndef MST_CODEC_DDE_PM3_ADDR 658 #define MST_CODEC_DDE_PM3_ADDR 0 659 #define MST_CODEC_DDE_PM3_SIZE 0 660 #define mst_codec_dde_pm3 0 661 #endif 662 #ifndef MST_CODEC_DDE_PM4_ADDR 663 #define MST_CODEC_DDE_PM4_ADDR 0 664 #define MST_CODEC_DDE_PM4_SIZE 0 665 #define mst_codec_dde_pm4 0 666 #endif 667 668 #ifndef MST_CODEC_DBX_PM1_ADDR 669 #define MST_CODEC_DBX_PM1_ADDR 0 670 #define MST_CODEC_DBX_PM1_SIZE 0 671 #define mst_codec_dbx_pm1 0 672 #endif 673 #ifndef MST_CODEC_DBX_PM2_ADDR 674 #define MST_CODEC_DBX_PM2_ADDR 0 675 #define MST_CODEC_DBX_PM2_SIZE 0 676 #define mst_codec_dbx_pm2 0 677 #endif 678 #ifndef MST_CODEC_DBX_PM3_ADDR 679 #define MST_CODEC_DBX_PM3_ADDR 0 680 #define MST_CODEC_DBX_PM3_SIZE 0 681 #define mst_codec_dbx_pm3 0 682 #endif 683 #ifndef MST_CODEC_DBX_PM4_ADDR 684 #define MST_CODEC_DBX_PM4_ADDR 0 685 #define MST_CODEC_DBX_PM4_SIZE 0 686 #define mst_codec_dbx_pm4 0 687 #endif 688 689 690 //=========================================================================== 691 // DSP Load code Table 692 //=========================================================================== 693 AUDIO_ALG_INFO SE_SYSTEM_LoadCodeTable[ ]= 694 { { 695 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1, 696 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2, 697 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3, 698 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4, 699 "SE_SYSTEM",}, 700 }; 701 702 //============================================== 703 //============================================== 704 AUDIO_ALG_INFO XPCM_LoadCodeTable[ ]= 705 { { 706 MST_CODEC_XPCM_PM1_ADDR, MST_CODEC_XPCM_PM1_SIZE, mst_codec_xpcm_pm1, 707 MST_CODEC_XPCM_PM2_ADDR, MST_CODEC_XPCM_PM2_SIZE, mst_codec_xpcm_pm2, 708 MST_CODEC_XPCM_PM3_ADDR, MST_CODEC_XPCM_PM3_SIZE, mst_codec_xpcm_pm3, 709 MST_CODEC_XPCM_PM4_ADDR, MST_CODEC_XPCM_PM4_SIZE, mst_codec_xpcm_pm4, 710 "XPCM",}, 711 }; 712 //============================================== 713 AUDIO_ALG_INFO MP3_LoadCodeTable[ ]= 714 { { 715 MST_CODEC_MP3_PM1_ADDR, MST_CODEC_MP3_PM1_SIZE, mst_codec_mp3_pm1, 716 MST_CODEC_MP3_PM2_ADDR, MST_CODEC_MP3_PM2_SIZE, mst_codec_mp3_pm2, 717 MST_CODEC_MP3_PM3_ADDR, MST_CODEC_MP3_PM3_SIZE, mst_codec_mp3_pm3, 718 MST_CODEC_MP3_PM4_ADDR, MST_CODEC_MP3_PM4_SIZE, mst_codec_mp3_pm4, 719 "MP3",}, 720 }; 721 //============================================== 722 AUDIO_ALG_INFO MPEG_LoadCodeTable[ ]= 723 { { 724 MST_CODEC_MPEG_PM1_ADDR, MST_CODEC_MPEG_PM1_SIZE, mst_codec_mpeg_pm1, 725 MST_CODEC_MPEG_PM2_ADDR, MST_CODEC_MPEG_PM2_SIZE, mst_codec_mpeg_pm2, 726 MST_CODEC_MPEG_PM3_ADDR, MST_CODEC_MPEG_PM3_SIZE, mst_codec_mpeg_pm3, 727 MST_CODEC_MPEG_PM4_ADDR, MST_CODEC_MPEG_PM4_SIZE, mst_codec_mpeg_pm4, 728 "MPEG",}, 729 }; 730 //============================================== 731 AUDIO_ALG_INFO AC3P_LoadCodeTable[ ]= 732 { { 733 MST_CODEC_AC3P_PM1_ADDR, MST_CODEC_AC3P_PM1_SIZE, mst_codec_ac3p_pm1, 734 MST_CODEC_AC3P_PM2_ADDR, MST_CODEC_AC3P_PM2_SIZE, mst_codec_ac3p_pm2, 735 MST_CODEC_AC3P_PM3_ADDR, MST_CODEC_AC3P_PM3_SIZE, mst_codec_ac3p_pm3, 736 MST_CODEC_AC3P_PM4_ADDR, MST_CODEC_AC3P_PM4_SIZE, mst_codec_ac3p_pm4, 737 "AC3P",}, 738 }; 739 //============================================== 740 AUDIO_ALG_INFO MS10_DDT_LoadCodeTable[ ]= 741 { { 742 MST_CODEC_MS10_DDT_PM1_ADDR, MST_CODEC_MS10_DDT_PM1_SIZE, mst_codec_ms10_ddt_pm1, 743 MST_CODEC_MS10_DDT_PM2_ADDR, MST_CODEC_MS10_DDT_PM2_SIZE, mst_codec_ms10_ddt_pm2, 744 MST_CODEC_MS10_DDT_PM3_ADDR, MST_CODEC_MS10_DDT_PM3_SIZE, mst_codec_ms10_ddt_pm3, 745 MST_CODEC_MS10_DDT_PM4_ADDR, MST_CODEC_MS10_DDT_PM4_SIZE, mst_codec_ms10_ddt_pm4, 746 "MS10_DDT",}, 747 }; 748 //============================================== 749 AUDIO_ALG_INFO GAAC_LoadCodeTable[ ]= 750 { { 751 MST_CODEC_GAAC_PM1_ADDR, MST_CODEC_GAAC_PM1_SIZE, mst_codec_gaac_pm1, 752 MST_CODEC_GAAC_PM2_ADDR, MST_CODEC_GAAC_PM2_SIZE, mst_codec_gaac_pm2, 753 MST_CODEC_GAAC_PM3_ADDR, MST_CODEC_GAAC_PM3_SIZE, mst_codec_gaac_pm3, 754 MST_CODEC_GAAC_PM4_ADDR, MST_CODEC_GAAC_PM4_SIZE, mst_codec_gaac_pm4, 755 "GAAC",}, 756 }; 757 //============================================== 758 AUDIO_ALG_INFO WMA_PRO_LoadCodeTable[ ]= 759 { { 760 MST_CODEC_WMA_PRO_PM1_ADDR, MST_CODEC_WMA_PRO_PM1_SIZE, mst_codec_wma_pro_pm1, 761 MST_CODEC_WMA_PRO_PM2_ADDR, MST_CODEC_WMA_PRO_PM2_SIZE, mst_codec_wma_pro_pm2, 762 MST_CODEC_WMA_PRO_PM3_ADDR, MST_CODEC_WMA_PRO_PM3_SIZE, mst_codec_wma_pro_pm3, 763 MST_CODEC_WMA_PRO_PM4_ADDR, MST_CODEC_WMA_PRO_PM4_SIZE, mst_codec_wma_pro_pm4, 764 "WMA_PRO",}, 765 }; 766 //============================================== 767 AUDIO_ALG_INFO DTS_DMP_LoadCodeTable[ ]= 768 { { 769 MST_CODEC_DTS_DMP_PM1_ADDR, MST_CODEC_DTS_DMP_PM1_SIZE, mst_codec_dts_dmp_pm1, 770 MST_CODEC_DTS_DMP_PM2_ADDR, MST_CODEC_DTS_DMP_PM2_SIZE, mst_codec_dts_dmp_pm2, 771 MST_CODEC_DTS_DMP_PM3_ADDR, MST_CODEC_DTS_DMP_PM3_SIZE, mst_codec_dts_dmp_pm3, 772 MST_CODEC_DTS_DMP_PM4_ADDR, MST_CODEC_DTS_DMP_PM4_SIZE, mst_codec_dts_dmp_pm4, 773 "DTS_DMP",}, 774 }; 775 //============================================== 776 AUDIO_ALG_INFO DTS_LBR_LoadCodeTable[ ]= 777 { { 778 MST_CODEC_DTS_LBR_PM1_ADDR, MST_CODEC_DTS_LBR_PM1_SIZE, mst_codec_dts_lbr_pm1, 779 MST_CODEC_DTS_LBR_PM2_ADDR, MST_CODEC_DTS_LBR_PM2_SIZE, mst_codec_dts_lbr_pm2, 780 MST_CODEC_DTS_LBR_PM3_ADDR, MST_CODEC_DTS_LBR_PM3_SIZE, mst_codec_dts_lbr_pm3, 781 MST_CODEC_DTS_LBR_PM4_ADDR, MST_CODEC_DTS_LBR_PM4_SIZE, mst_codec_dts_lbr_pm4, 782 "DTS_LBR",}, 783 }; 784 //============================================== 785 AUDIO_ALG_INFO RA8LBR_LoadCodeTable[ ]= 786 { { 787 MST_CODEC_RA8LBR_PM1_ADDR, MST_CODEC_RA8LBR_PM1_SIZE, mst_codec_ra8lbr_pm1, 788 MST_CODEC_RA8LBR_PM2_ADDR, MST_CODEC_RA8LBR_PM2_SIZE, mst_codec_ra8lbr_pm2, 789 MST_CODEC_RA8LBR_PM3_ADDR, MST_CODEC_RA8LBR_PM3_SIZE, mst_codec_ra8lbr_pm3, 790 MST_CODEC_RA8LBR_PM4_ADDR, MST_CODEC_RA8LBR_PM4_SIZE, mst_codec_ra8lbr_pm4, 791 "RA8LBR",}, 792 }; 793 //============================================== 794 AUDIO_ALG_INFO VORBIS_LoadCodeTable[ ]= 795 { { 796 MST_CODEC_VORBIS_PM1_ADDR, MST_CODEC_VORBIS_PM1_SIZE, mst_codec_vorbis_pm1, 797 MST_CODEC_VORBIS_PM2_ADDR, MST_CODEC_VORBIS_PM2_SIZE, mst_codec_vorbis_pm2, 798 MST_CODEC_VORBIS_PM3_ADDR, MST_CODEC_VORBIS_PM3_SIZE, mst_codec_vorbis_pm3, 799 MST_CODEC_VORBIS_PM4_ADDR, MST_CODEC_VORBIS_PM4_SIZE, mst_codec_vorbis_pm4, 800 "VORBIS",}, 801 }; 802 //============================================== 803 AUDIO_ALG_INFO AMR_NB_LoadCodeTable[ ]= 804 { { 805 MST_CODEC_AMR_NB_PM1_ADDR, MST_CODEC_AMR_NB_PM1_SIZE, mst_codec_amr_nb_pm1, 806 MST_CODEC_AMR_NB_PM2_ADDR, MST_CODEC_AMR_NB_PM2_SIZE, mst_codec_amr_nb_pm2, 807 MST_CODEC_AMR_NB_PM3_ADDR, MST_CODEC_AMR_NB_PM3_SIZE, mst_codec_amr_nb_pm3, 808 MST_CODEC_AMR_NB_PM4_ADDR, MST_CODEC_AMR_NB_PM4_SIZE, mst_codec_amr_nb_pm4, 809 "AMR_NB",}, 810 }; 811 //============================================== 812 AUDIO_ALG_INFO AMR_WB_LoadCodeTable[ ]= 813 { { 814 MST_CODEC_AMR_WB_PM1_ADDR, MST_CODEC_AMR_WB_PM1_SIZE, mst_codec_amr_wb_pm1, 815 MST_CODEC_AMR_WB_PM2_ADDR, MST_CODEC_AMR_WB_PM2_SIZE, mst_codec_amr_wb_pm2, 816 MST_CODEC_AMR_WB_PM3_ADDR, MST_CODEC_AMR_WB_PM3_SIZE, mst_codec_amr_wb_pm3, 817 MST_CODEC_AMR_WB_PM4_ADDR, MST_CODEC_AMR_WB_PM4_SIZE, mst_codec_amr_wb_pm4, 818 "AMR_WB",}, 819 }; 820 //============================================== 821 AUDIO_ALG_INFO DRAD_LoadCodeTable[ ]= 822 { { 823 MST_CODEC_DRAD_PM1_ADDR, MST_CODEC_DRAD_PM1_SIZE, mst_codec_drad_pm1, 824 MST_CODEC_DRAD_PM2_ADDR, MST_CODEC_DRAD_PM2_SIZE, mst_codec_drad_pm2, 825 MST_CODEC_DRAD_PM3_ADDR, MST_CODEC_DRAD_PM3_SIZE, mst_codec_drad_pm3, 826 MST_CODEC_DRAD_PM4_ADDR, MST_CODEC_DRAD_PM4_SIZE, mst_codec_drad_pm4, 827 "DRAD",}, 828 }; 829 //============================================== 830 AUDIO_ALG_INFO FLAC_LoadCodeTable[ ]= 831 { { 832 MST_CODEC_FLAC_PM1_ADDR, MST_CODEC_FLAC_PM1_SIZE, mst_codec_flac_pm1, 833 MST_CODEC_FLAC_PM2_ADDR, MST_CODEC_FLAC_PM2_SIZE, mst_codec_flac_pm2, 834 MST_CODEC_FLAC_PM3_ADDR, MST_CODEC_FLAC_PM3_SIZE, mst_codec_flac_pm3, 835 MST_CODEC_FLAC_PM4_ADDR, MST_CODEC_FLAC_PM4_SIZE, mst_codec_flac_pm4, 836 "FLAC",}, 837 }; 838 //============================================== 839 AUDIO_ALG_INFO PALSUM_LoadCodeTable[ ]= 840 { { 841 MST_CODEC_PALSUM_PM1_ADDR, MST_CODEC_PALSUM_PM1_SIZE, mst_codec_palsum_pm1, 842 MST_CODEC_PALSUM_PM2_ADDR, MST_CODEC_PALSUM_PM2_SIZE, mst_codec_palsum_pm2, 843 MST_CODEC_PALSUM_PM3_ADDR, MST_CODEC_PALSUM_PM3_SIZE, mst_codec_palsum_pm3, 844 MST_CODEC_PALSUM_PM4_ADDR, MST_CODEC_PALSUM_PM4_SIZE, mst_codec_palsum_pm4, 845 "PALSUM",}, 846 }; 847 //============================================== 848 AUDIO_ALG_INFO BTSC_LoadCodeTable[ ]= 849 { { 850 MST_CODEC_BTSC_PM1_ADDR, MST_CODEC_BTSC_PM1_SIZE, mst_codec_btsc_pm1, 851 MST_CODEC_BTSC_PM2_ADDR, MST_CODEC_BTSC_PM2_SIZE, mst_codec_btsc_pm2, 852 MST_CODEC_BTSC_PM3_ADDR, MST_CODEC_BTSC_PM3_SIZE, mst_codec_btsc_pm3, 853 MST_CODEC_BTSC_PM4_ADDR, MST_CODEC_BTSC_PM4_SIZE, mst_codec_btsc_pm4, 854 "BTSC",}, 855 }; 856 //============================================== 857 AUDIO_ALG_INFO TSHD_LoadCodeTable[ ]= 858 { { 859 MST_CODEC_TSHD_PM1_ADDR, MST_CODEC_TSHD_PM1_SIZE, mst_codec_tshd_pm1, 860 MST_CODEC_TSHD_PM2_ADDR, MST_CODEC_TSHD_PM2_SIZE, mst_codec_tshd_pm2, 861 MST_CODEC_TSHD_PM3_ADDR, MST_CODEC_TSHD_PM3_SIZE, mst_codec_tshd_pm3, 862 MST_CODEC_TSHD_PM4_ADDR, MST_CODEC_TSHD_PM4_SIZE, mst_codec_tshd_pm4, 863 "TSHD",}, 864 }; 865 //============================================== 866 AUDIO_ALG_INFO TSXT_LoadCodeTable[ ]= 867 { { 868 MST_CODEC_TSXT_PM1_ADDR, MST_CODEC_TSXT_PM1_SIZE, mst_codec_tsxt_pm1, 869 MST_CODEC_TSXT_PM2_ADDR, MST_CODEC_TSXT_PM2_SIZE, mst_codec_tsxt_pm2, 870 MST_CODEC_TSXT_PM3_ADDR, MST_CODEC_TSXT_PM3_SIZE, mst_codec_tsxt_pm3, 871 MST_CODEC_TSXT_PM4_ADDR, MST_CODEC_TSXT_PM4_SIZE, mst_codec_tsxt_pm4, 872 "TSXT",}, 873 }; 874 //============================================== 875 AUDIO_ALG_INFO PURESND_LoadCodeTable[ ]= 876 { { 877 MST_CODEC_PURESND_PM1_ADDR, MST_CODEC_PURESND_PM1_SIZE, mst_codec_puresnd_pm1, 878 MST_CODEC_PURESND_PM2_ADDR, MST_CODEC_PURESND_PM2_SIZE, mst_codec_puresnd_pm2, 879 MST_CODEC_PURESND_PM3_ADDR, MST_CODEC_PURESND_PM3_SIZE, mst_codec_puresnd_pm3, 880 MST_CODEC_PURESND_PM4_ADDR, MST_CODEC_PURESND_PM4_SIZE, mst_codec_puresnd_pm4, 881 "PURESND",}, 882 }; 883 //============================================== 884 AUDIO_ALG_INFO DEC_LoadCodeTable[ ]= 885 { { 886 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1, 887 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2, 888 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3, 889 MST_CODEC_DEC_PM4_ADDR, MST_CODEC_DEC_PM4_SIZE, mst_codec_dec_pm4, 890 "DEC",}, 891 }; 892 //============================================== 893 AUDIO_ALG_INFO DDE_LoadCodeTable[ ]= 894 { { 895 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1, 896 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2, 897 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3, 898 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4, 899 "DDE",}, 900 }; 901 //============================================== 902 AUDIO_ALG_INFO DBX_LoadCodeTable[ ]= 903 { { 904 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1, 905 MST_CODEC_DBX_PM2_ADDR, MST_CODEC_DBX_PM2_SIZE, mst_codec_dbx_pm2, 906 MST_CODEC_DBX_PM3_ADDR, MST_CODEC_DBX_PM3_SIZE, mst_codec_dbx_pm3, 907 MST_CODEC_DBX_PM4_ADDR, MST_CODEC_DBX_PM4_SIZE, mst_codec_dbx_pm4, 908 "DBX",}, 909 }; 910 911 912 /////////////////////////////////////////////////////////////////////////////////////// 913 #endif // _DECODER_INFO_H_ 914 915