1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define ENABLE_AUDIO_DEC_R2_BIN FALSE //�ѩ�Milan DDR�Ŷ��ܺ�Adefault �Hflash load code �Ӹ`��r2 code ��audio lib��DDR�Ŷ�
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include <string.h>
102
103 #include "MsCommon.h"
104 #include "MsIRQ.h"
105 #include "MsOS.h"
106 #include "MsTypes.h"
107
108 #include "drvBDMA.h"
109 #include "drvSERFLASH.h"
110
111 #include "regCHIP.h"
112
113 #include "halAUDSP.h"
114 #include "drvAUDIO.h"
115 #include "regAUDIO.h"
116 #include "halAUDIO.h"
117 #include "halMAD2.h"
118 #include "halSIF.h"
119 #include "halADVAUDIO.h"
120 #include "ddr_config.h"
121 #include "r2_shm_comm.h"
122 #include "decR2_shm.h"
123 #if ASND_R2_SUPPORT
124 #include "sndR2_shm.h"
125 #endif
126
127 #ifdef MBOOT//Mboot Mini system
128 #include "dspcode_s/aucode_s.c"
129 #include "dspcode_s/aucode_dec.c"
130 #include "dspcode_s/aucode_mboot_r2.c"
131 #include "dspcode_s/aucode_none.c"
132 #else
133 #include "dspcode_s/aucode_palsum.c"
134 #include "dspcode_s/aucode_btsc.c"
135 #include "dspcode_s/aucode_s.c"
136 #include "dspcode_s/aucode_dec.c"
137 #include "dspcode_s/aucode_adec_r2.c"
138 #if ASND_R2_SUPPORT
139 #include "dspcode_s/aucode_asnd_r2.c"
140 #endif
141 #include "dspcode_s/aucode_dde.c"
142 #include "dspcode_s/aucode_ms10_dde.c"
143 #include "dspcode_s/aucode_dts_t.c"
144 #include "dspcode_s/aucode_none.c"
145 #include "dspcode_adv/aucode_tshd.c"
146 #include "dspcode_adv/aucode_dps.c"
147 #include "dspcode_adv/aucode_dbx.c"
148 #endif
149
150
151 #if defined(MSOS_TYPE_NUTTX)
152 extern int lib_lowprintf(const char *format, ...);
153 #define DBG_PREFIX lib_lowprintf
154 #else
155 #define DBG_PREFIX printf
156 #endif
157
158 #if (defined ANDROID)
159 #include <sys/mman.h>
160 #include <cutils/ashmem.h>
161 #include <cutils/log.h>
162
163 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
164 #define LOGI ALOGI
165 #endif
166
167 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
168 #define LOGE ALOGE
169 #endif
170
171 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
172 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
173 #else
174 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
175 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
176 #endif
177
178 #define HALAUDSP_CHECK_SHM_INIT \
179 do { \
180 if (g_AudioVars2 == NULL) \
181 { \
182 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
183 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
184 if (HAL_AUDIO_InitialVars() == FALSE) \
185 { \
186 MS_ASSERT(0); \
187 } \
188 } \
189 } while(0)
190
191 //-------------------------------------------------------------------------------------------------
192 // Driver Compiler Options
193 //-------------------------------------------------------------------------------------------------
194
195 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
196 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
197 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
198
199 #ifdef MBOOT //mboot Speed up
200 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
201 // 1: verify dsp code (for debug)
202 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
203 // 1: check IDMA ready (for debug)
204 #else
205 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
206 // 1: verify dsp code (for debug)
207 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
208 // 1: check IDMA ready (for debug)
209 #endif
210
211 #define AU_NULL 0
212
213 #ifdef MBOOT
214 #define FLASH_COPY(x,y,z,i,j) TRUE
215 #define FLASH_CHKDONE() TRUE
216 #else
217 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
218 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
219 #endif
220
221 LOAD_CODE_INFO g_loadcodeinfo;
222 MS_BOOL g_bDSPLoadCode = FALSE;
223
224 #ifndef MBOOT
225 AUDIO_ALG_INFO audio_se_dec_info[]=
226 {
227 // ---------- Decoder2 DSP Code ----------
228 //AU_DVB_SYS_NONE[0]
229 {
230 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
231 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
232 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
233 MST_CODEC_DEC_PM4_ADDR, MST_CODEC_DEC_PM4_SIZE, mst_codec_dec_pm4 + 6,
234 "SE dec_none",
235 },
236
237 //MPEG_AD[1]
238 {
239 AU_NULL, AU_NULL, AU_NULL,
240 AU_NULL, AU_NULL, AU_NULL,
241 AU_NULL, AU_NULL, AU_NULL,
242 AU_NULL, AU_NULL, AU_NULL,
243 "mpeg_ad",
244 },
245
246 //AC3_AD[2]
247 {
248 AU_NULL, AU_NULL, AU_NULL,
249 AU_NULL, AU_NULL, AU_NULL,
250 AU_NULL, AU_NULL, AU_NULL,
251 AU_NULL, AU_NULL, AU_NULL,
252 "ac3_ad",
253 },
254
255 //AC3P_AD[3]
256 {
257 AU_NULL, AU_NULL, AU_NULL,
258 AU_NULL, AU_NULL, AU_NULL,
259 AU_NULL, AU_NULL, AU_NULL,
260 AU_NULL, AU_NULL, AU_NULL,
261 "ac3p_ad",
262 },
263
264 //AAC_AD[4]
265 {
266 AU_NULL, AU_NULL, AU_NULL,
267 AU_NULL, AU_NULL, AU_NULL,
268 AU_NULL, AU_NULL, AU_NULL,
269 AU_NULL, AU_NULL, AU_NULL,
270 "aac_ad",
271 },
272
273 //DDE[5]
274 {
275 AU_NULL, AU_NULL, AU_NULL,
276 AU_NULL, AU_NULL, AU_NULL,
277 AU_NULL, AU_NULL, AU_NULL,
278 AU_NULL, AU_NULL, AU_NULL,
279 "dde",
280 },
281
282 //GAAC_AD[6]
283 {
284 AU_NULL, AU_NULL, AU_NULL,
285 AU_NULL, AU_NULL, AU_NULL,
286 AU_NULL, AU_NULL, AU_NULL,
287 AU_NULL, AU_NULL, AU_NULL,
288 "gaac_ad"
289 },
290
291 //MP3[7]
292 {
293 AU_NULL, AU_NULL, AU_NULL,
294 AU_NULL, AU_NULL, AU_NULL,
295 AU_NULL, AU_NULL, AU_NULL,
296 AU_NULL, AU_NULL, AU_NULL,
297 "mp3",
298 },
299
300 //mpeg_en[8]
301 {
302 AU_NULL, AU_NULL, AU_NULL,
303 AU_NULL, AU_NULL, AU_NULL,
304 AU_NULL, AU_NULL, AU_NULL,
305 AU_NULL, AU_NULL, AU_NULL,
306 "mpeg_en",
307 },
308
309 //XPCM2[9]
310 {
311 AU_NULL, AU_NULL, AU_NULL,
312 AU_NULL, AU_NULL, AU_NULL,
313 AU_NULL, AU_NULL, AU_NULL,
314 AU_NULL, AU_NULL, AU_NULL,
315 "XPCM2",
316 },
317
318 //KTV[A]
319 {
320 AU_NULL, AU_NULL, AU_NULL,
321 AU_NULL, AU_NULL, AU_NULL,
322 AU_NULL, AU_NULL, AU_NULL,
323 AU_NULL, AU_NULL, AU_NULL,
324 "KTV",
325 },
326
327 //KTV2[B]
328 {
329 AU_NULL, AU_NULL, AU_NULL,
330 AU_NULL, AU_NULL, AU_NULL,
331 AU_NULL, AU_NULL, AU_NULL,
332 AU_NULL, AU_NULL, AU_NULL,
333 "KTV2",
334 },
335 };
336
337 AUDIO_ALG_INFO audio_se_enc_info[]=
338 {
339 // ---------- Decoder2 DSP Code ----------
340 //AU_DVB2_ENCODE_NONE[0]
341 {
342 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
343 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
344 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
345 MST_CODEC_DEC_PM4_ADDR, MST_CODEC_DEC_PM4_SIZE, mst_codec_dec_pm4 + 6,
346 "SE enc_none",
347 },
348
349 //AU_DVB2_ENCODE_DTSE[1]
350 {
351 MST_CODEC_DTS_T_PM1_ADDR, MST_CODEC_DTS_T_PM1_SIZE, mst_codec_dts_t_pm1 + 6,
352 MST_CODEC_DTS_T_PM2_ADDR, MST_CODEC_DTS_T_PM2_SIZE, mst_codec_dts_t_pm2 + 6,
353 MST_CODEC_DTS_T_PM3_ADDR, MST_CODEC_DTS_T_PM3_SIZE, mst_codec_dts_t_pm3 + 6,
354 AU_NULL, AU_NULL, AU_NULL,
355 "dts_e"
356 },
357
358 //AU_DVB2_ENCODE_MS10_DDE[2]
359 {
360 MST_CODEC_MS10_DDE_PM1_ADDR, MST_CODEC_MS10_DDE_PM1_SIZE, mst_codec_ms10_dde_pm1 + 6,
361 MST_CODEC_MS10_DDE_PM2_ADDR, MST_CODEC_MS10_DDE_PM2_SIZE, mst_codec_ms10_dde_pm2 + 6,
362 MST_CODEC_MS10_DDE_PM3_ADDR, MST_CODEC_MS10_DDE_PM3_SIZE, mst_codec_ms10_dde_pm3 + 6,
363 MST_CODEC_MS10_DDE_PM4_ADDR, MST_CODEC_MS10_DDE_PM4_SIZE, mst_codec_ms10_dde_pm4 + 6,
364 "ms10_dde",
365 },
366
367 //AU_DVB2_ENCODE_DDE[3]
368 {
369 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
370 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
371 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
372 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
373 "dde",
374 },
375
376 //AU_DVB2_ENCODE_MAX[4]
377 {
378 AU_NULL, AU_NULL, AU_NULL,
379 AU_NULL, AU_NULL, AU_NULL,
380 AU_NULL, AU_NULL, AU_NULL,
381 AU_NULL, AU_NULL, AU_NULL,
382 "enc_max",
383 },
384 };
385
386
387
388 AUDIO_ALG_INFO audio_snd_mm_dec_info[]=
389 {
390 //DEC_NONE[0]
391 {
392 AU_NULL, AU_NULL, AU_NULL,
393 AU_NULL, AU_NULL, AU_NULL,
394 AU_NULL, AU_NULL, AU_NULL,
395 AU_NULL, AU_NULL, AU_NULL,
396 "DEC none",
397 },
398
399 //DEC_DEC_NONE[1]
400 {
401 AU_NULL, AU_NULL, AU_NULL,
402 AU_NULL, AU_NULL, AU_NULL,
403 AU_NULL, AU_NULL, AU_NULL,
404 AU_NULL, AU_NULL, AU_NULL,
405 "DEC none",
406 },
407
408 //DEC_ENC_NONE[2]
409 {
410 AU_NULL, AU_NULL, AU_NULL,
411 AU_NULL, AU_NULL, AU_NULL,
412 AU_NULL, AU_NULL, AU_NULL,
413 AU_NULL, AU_NULL, AU_NULL,
414 "DEC none",
415 },
416
417 //MPEG[3]
418 {
419 AU_NULL, AU_NULL, AU_NULL,
420 AU_NULL, AU_NULL, AU_NULL,
421 AU_NULL, AU_NULL, AU_NULL,
422 AU_NULL, AU_NULL, AU_NULL,
423 "mpeg2",
424 },
425
426 //AC3[4]
427 {
428 AU_NULL, AU_NULL, AU_NULL,
429 AU_NULL, AU_NULL, AU_NULL,
430 AU_NULL, AU_NULL, AU_NULL,
431 AU_NULL, AU_NULL, AU_NULL,
432 "ac3p_2"
433 },
434
435 //AC3+[5]
436 {
437 AU_NULL, AU_NULL, AU_NULL,
438 AU_NULL, AU_NULL, AU_NULL,
439 AU_NULL, AU_NULL, AU_NULL,
440 AU_NULL, AU_NULL, AU_NULL,
441 "ac3p_2"
442 },
443
444 //AAC[6]
445 {
446 AU_NULL, AU_NULL, AU_NULL,
447 AU_NULL, AU_NULL, AU_NULL,
448 AU_NULL, AU_NULL, AU_NULL,
449 AU_NULL, AU_NULL, AU_NULL,
450 "aac2"
451 },
452
453 //MP3[7]
454 {
455 AU_NULL, AU_NULL, AU_NULL,
456 AU_NULL, AU_NULL, AU_NULL,
457 AU_NULL, AU_NULL, AU_NULL,
458 AU_NULL, AU_NULL, AU_NULL,
459 "mp3_2",
460 },
461
462 //WMA[8]
463 {
464 AU_NULL, AU_NULL, AU_NULL,
465 AU_NULL, AU_NULL, AU_NULL,
466 AU_NULL, AU_NULL, AU_NULL,
467 AU_NULL, AU_NULL, AU_NULL,
468 "wma2"
469 },
470
471 //Reserved3[9]
472 {
473 AU_NULL, AU_NULL, AU_NULL,
474 AU_NULL, AU_NULL, AU_NULL,
475 AU_NULL, AU_NULL, AU_NULL,
476 AU_NULL, AU_NULL, AU_NULL,
477 "Reserved3",
478 },
479
480 //RM[A]
481 {
482 AU_NULL, AU_NULL, AU_NULL,
483 AU_NULL, AU_NULL, AU_NULL,
484 AU_NULL, AU_NULL, AU_NULL,
485 AU_NULL, AU_NULL, AU_NULL,
486 "cook2",
487 },
488
489 //XPCM[B]
490 {
491 AU_NULL, AU_NULL, AU_NULL,
492 AU_NULL, AU_NULL, AU_NULL,
493 AU_NULL, AU_NULL, AU_NULL,
494 AU_NULL, AU_NULL, AU_NULL,
495 "xpcm2",
496 },
497
498 //TONE[C]
499 {
500 AU_NULL, AU_NULL, AU_NULL,
501 AU_NULL, AU_NULL, AU_NULL,
502 AU_NULL, AU_NULL, AU_NULL,
503 AU_NULL, AU_NULL, AU_NULL,
504 "tone",
505 },
506
507 //DTS[D]
508 {
509 AU_NULL, AU_NULL, AU_NULL,
510 AU_NULL, AU_NULL, AU_NULL,
511 AU_NULL, AU_NULL, AU_NULL,
512 AU_NULL, AU_NULL, AU_NULL,
513 "dts2",
514 },
515
516 //MS10_DDT[E]
517 {
518 AU_NULL, AU_NULL, AU_NULL,
519 AU_NULL, AU_NULL, AU_NULL,
520 AU_NULL, AU_NULL, AU_NULL,
521 AU_NULL, AU_NULL, AU_NULL,
522 "ms10_ddt2",
523 },
524
525 //MS10_DDC[F]
526 {
527 AU_NULL, AU_NULL, AU_NULL,
528 AU_NULL, AU_NULL, AU_NULL,
529 AU_NULL, AU_NULL, AU_NULL,
530 AU_NULL, AU_NULL, AU_NULL,
531 "null",
532 },
533
534 //WMA_PRO[10]
535 {
536 AU_NULL, AU_NULL, AU_NULL,
537 AU_NULL, AU_NULL, AU_NULL,
538 AU_NULL, AU_NULL, AU_NULL,
539 AU_NULL, AU_NULL, AU_NULL,
540 "wma_pro2"
541 },
542
543 //FLAC[11]
544 {
545 AU_NULL, AU_NULL, AU_NULL,
546 AU_NULL, AU_NULL, AU_NULL,
547 AU_NULL, AU_NULL, AU_NULL,
548 AU_NULL, AU_NULL, AU_NULL,
549 "flac",
550 },
551
552 //VORBIS[12]
553 {
554 AU_NULL, AU_NULL, AU_NULL,
555 AU_NULL, AU_NULL, AU_NULL,
556 AU_NULL, AU_NULL, AU_NULL,
557 AU_NULL, AU_NULL, AU_NULL,
558 "vorbis_2",
559 },
560
561 //DTSLBR[13]
562 {
563 AU_NULL, AU_NULL, AU_NULL,
564 AU_NULL, AU_NULL, AU_NULL,
565 AU_NULL, AU_NULL, AU_NULL,
566 AU_NULL, AU_NULL, AU_NULL,
567 "dtslbr",
568 },
569
570 //AMR_NB[14]
571 {
572 AU_NULL, AU_NULL, AU_NULL,
573 AU_NULL, AU_NULL, AU_NULL,
574 AU_NULL, AU_NULL, AU_NULL,
575 AU_NULL, AU_NULL, AU_NULL,
576 "amr_nb2",
577 },
578
579 //AMR_WB[15]
580 {
581 AU_NULL, AU_NULL, AU_NULL,
582 AU_NULL, AU_NULL, AU_NULL,
583 AU_NULL, AU_NULL, AU_NULL,
584 AU_NULL, AU_NULL, AU_NULL,
585 "amr_wb2",
586 },
587 };
588
589 AUDIO_ALG_INFO audio_adv_sndeff_info[] =
590 {
591 //PL2, 0
592 {
593 AU_NULL, AU_NULL, AU_NULL,
594 AU_NULL, AU_NULL, AU_NULL,
595 AU_NULL, AU_NULL, AU_NULL,
596 AU_NULL, AU_NULL, AU_NULL,
597 "null",
598 },
599
600 //BBE, 1
601 {
602 AU_NULL, AU_NULL, AU_NULL,
603 AU_NULL, AU_NULL, AU_NULL,
604 AU_NULL, AU_NULL, AU_NULL,
605 AU_NULL, AU_NULL, AU_NULL,
606 "null",
607 },
608
609 //SRS, 2
610 {
611 AU_NULL, AU_NULL, AU_NULL,
612 AU_NULL, AU_NULL, AU_NULL,
613 AU_NULL, AU_NULL, AU_NULL,
614 AU_NULL, AU_NULL, AU_NULL,
615 "null",
616 },
617
618 //VDS, 3
619 {
620 AU_NULL, AU_NULL, AU_NULL,
621 AU_NULL, AU_NULL, AU_NULL,
622 AU_NULL, AU_NULL, AU_NULL,
623 AU_NULL, AU_NULL, AU_NULL,
624 "null",
625 },
626
627 //VSPK, 4
628 {
629 AU_NULL, AU_NULL, AU_NULL,
630 AU_NULL, AU_NULL, AU_NULL,
631 AU_NULL, AU_NULL, AU_NULL,
632 AU_NULL, AU_NULL, AU_NULL,
633 "null",
634 },
635
636 //SUPV, 5
637 {
638 AU_NULL, AU_NULL, AU_NULL,
639 AU_NULL, AU_NULL, AU_NULL,
640 AU_NULL, AU_NULL, AU_NULL,
641 AU_NULL, AU_NULL, AU_NULL,
642 "null",
643 },
644
645 //TSHD, 6
646 {
647 MST_CODEC_TSHD_PM1_ADDR, MST_CODEC_TSHD_PM1_SIZE, mst_codec_tshd_pm1 + 6,
648 MST_CODEC_TSHD_PM2_ADDR, MST_CODEC_TSHD_PM2_SIZE, mst_codec_tshd_pm2 + 6,
649 MST_CODEC_TSHD_PM3_ADDR, MST_CODEC_TSHD_PM3_SIZE, mst_codec_tshd_pm3 + 6,
650 AU_NULL, AU_NULL, AU_NULL,
651 "tshd",
652 },
653
654 //XEN, 7
655 {
656 AU_NULL, AU_NULL, AU_NULL,
657 AU_NULL, AU_NULL, AU_NULL,
658 AU_NULL, AU_NULL, AU_NULL,
659 AU_NULL, AU_NULL, AU_NULL,
660 "null",
661 },
662
663 //TSHDVIQ, 8
664 {
665 AU_NULL, AU_NULL, AU_NULL,
666 AU_NULL, AU_NULL, AU_NULL,
667 AU_NULL, AU_NULL, AU_NULL,
668 AU_NULL, AU_NULL, AU_NULL,
669 "null",
670 },
671
672 //ADV, 9
673 {
674 AU_NULL, AU_NULL, AU_NULL,
675 AU_NULL, AU_NULL, AU_NULL,
676 AU_NULL, AU_NULL, AU_NULL,
677 AU_NULL, AU_NULL, AU_NULL,
678 "null",
679 },
680
681 //DBX, 10
682 {
683 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1 + 6,
684 MST_CODEC_DBX_PM2_ADDR, MST_CODEC_DBX_PM2_SIZE, mst_codec_dbx_pm2 + 6,
685 MST_CODEC_DBX_PM3_ADDR, MST_CODEC_DBX_PM3_SIZE, mst_codec_dbx_pm3 + 6,
686 AU_NULL, AU_NULL, AU_NULL,
687 "dbx",
688 },
689
690 //THEATERSOUND, 11
691 {
692 AU_NULL, AU_NULL, AU_NULL,
693 AU_NULL, AU_NULL, AU_NULL,
694 AU_NULL, AU_NULL, AU_NULL,
695 AU_NULL, AU_NULL, AU_NULL,
696 "theather sound",
697 },
698
699 //PURESND, 12
700 {
701 AU_NULL, AU_NULL, AU_NULL,
702 AU_NULL, AU_NULL, AU_NULL,
703 AU_NULL, AU_NULL, AU_NULL,
704 AU_NULL, AU_NULL, AU_NULL,
705 "puresnd",
706 },
707
708 //STUDIOSOUND_3D, 13
709 {
710 AU_NULL, AU_NULL, AU_NULL,
711 AU_NULL, AU_NULL, AU_NULL,
712 AU_NULL, AU_NULL, AU_NULL,
713 AU_NULL, AU_NULL, AU_NULL,
714 "null",
715 },
716
717 //DPS, 14
718 {
719 MST_CODEC_DPS_PM1_ADDR, MST_CODEC_DPS_PM1_SIZE, mst_codec_dps_pm1 + 6,
720 MST_CODEC_DPS_PM2_ADDR, MST_CODEC_DPS_PM2_SIZE, mst_codec_dps_pm2 + 6,
721 MST_CODEC_DPS_PM3_ADDR, MST_CODEC_DPS_PM3_SIZE, mst_codec_dps_pm3 + 6,
722 AU_NULL, AU_NULL, AU_NULL,
723 "BONGIOVI DPS",
724 },
725 };
726
727 AUDIO_ALG_INFO audio_soundeffect_info[]=
728 {
729 // SE System
730 {
731 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
732 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
733 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
734 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
735 "T12 SE system"
736 },
737 };
738
739 AUDIO_ALG_INFO audio_sndeff_info[]=
740 {
741 //none
742 {
743 MST_CODEC_NONE_PM1_ADDR, MST_CODEC_NONE_PM1_SIZE, mst_codec_none_pm1 + 6,
744 AU_NULL, AU_NULL, AU_NULL,
745 MST_CODEC_NONE_PM3_ADDR, MST_CODEC_NONE_PM3_SIZE, mst_codec_none_pm3 + 6,
746 AU_NULL, AU_NULL, AU_NULL,
747 "SE adv_none",
748 },
749 };
750
751 AUDIO_ALG_INFO audio_sif_dec_info[]=
752 {
753 //NONE
754 {
755 AU_NULL, AU_NULL, AU_NULL,
756 AU_NULL, AU_NULL, AU_NULL,
757 AU_NULL, AU_NULL, AU_NULL,
758 AU_NULL, AU_NULL, AU_NULL,
759 "NULL",
760 },
761
762 //BTSC[0]
763 {
764 MST_CODEC_SIF_BTSC_PM1_ADDR, MST_CODEC_SIF_BTSC_PM1_SIZE, mst_codec_sif_btsc_pm1 + 6,
765 MST_CODEC_SIF_BTSC_PM2_ADDR, MST_CODEC_SIF_BTSC_PM2_SIZE, mst_codec_sif_btsc_pm2 + 6,
766 MST_CODEC_SIF_BTSC_PM3_ADDR, MST_CODEC_SIF_BTSC_PM3_SIZE, mst_codec_sif_btsc_pm3 + 6,
767 AU_NULL, AU_NULL, AU_NULL,
768 "BTSC",
769 },
770
771 //EIAJ[1]
772 {
773 AU_NULL, AU_NULL, AU_NULL,
774 AU_NULL, AU_NULL, AU_NULL,
775 AU_NULL, AU_NULL, AU_NULL,
776 AU_NULL, AU_NULL, AU_NULL,
777 "EIAJ",
778 },
779
780 //palsum[2]
781 {
782 MST_CODEC_SIF_PALSUM_PM1_ADDR, MST_CODEC_SIF_PALSUM_PM1_SIZE, mst_codec_sif_palsum_pm1 + 6,
783 MST_CODEC_SIF_PALSUM_PM2_ADDR, MST_CODEC_SIF_PALSUM_PM2_SIZE, mst_codec_sif_palsum_pm2 + 6,
784 MST_CODEC_SIF_PALSUM_PM3_ADDR, MST_CODEC_SIF_PALSUM_PM3_SIZE, mst_codec_sif_palsum_pm3 + 6,
785 AU_NULL, AU_NULL, AU_NULL,
786 "PAL-SUM",
787 },
788
789 //palsum[3]
790 {
791 AU_NULL, AU_NULL, AU_NULL,
792 AU_NULL, AU_NULL, AU_NULL,
793 AU_NULL, AU_NULL, AU_NULL,
794 AU_NULL, AU_NULL, AU_NULL,
795 "PAL-SUM-VIF-42M",
796 },
797
798 //palsum[4]
799 {
800 AU_NULL, AU_NULL, AU_NULL,
801 AU_NULL, AU_NULL, AU_NULL,
802 AU_NULL, AU_NULL, AU_NULL,
803 AU_NULL, AU_NULL, AU_NULL,
804 "PAL-SUM-VIF-44M",
805 },
806
807 //FM_RADIO[5]
808 {
809 AU_NULL, AU_NULL, AU_NULL,
810 AU_NULL, AU_NULL, AU_NULL,
811 AU_NULL, AU_NULL, AU_NULL,
812 AU_NULL, AU_NULL, AU_NULL,
813 "FM-RADIO",
814 },
815 };
816
817 #else //=======================MBOOT=========================================//
818 AUDIO_ALG_INFO audio_se_dec_info[]=
819 {
820 // ---------- Decoder2 DSP Code ----------
821 //AU_DVB_SYS_NONE[0]
822 {
823 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
824 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
825 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
826 AU_NULL, AU_NULL, AU_NULL,
827 "SE dec_none",
828 },
829
830 //MPEG_AD[1]
831 {
832 AU_NULL, AU_NULL, AU_NULL,
833 AU_NULL, AU_NULL, AU_NULL,
834 AU_NULL, AU_NULL, AU_NULL,
835 AU_NULL, AU_NULL, AU_NULL,
836 AU_NULL,
837 },
838
839 //AC3_AD[2]
840 {
841 AU_NULL, AU_NULL, AU_NULL,
842 AU_NULL, AU_NULL, AU_NULL,
843 AU_NULL, AU_NULL, AU_NULL,
844 AU_NULL, AU_NULL, AU_NULL,
845 AU_NULL,
846 },
847
848 //AC3P_AD[3]
849 {
850 AU_NULL, AU_NULL, AU_NULL,
851 AU_NULL, AU_NULL, AU_NULL,
852 AU_NULL, AU_NULL, AU_NULL,
853 AU_NULL, AU_NULL, AU_NULL,
854 AU_NULL,
855 },
856
857 //AAC_AD[4]
858 {
859 AU_NULL, AU_NULL, AU_NULL,
860 AU_NULL, AU_NULL, AU_NULL,
861 AU_NULL, AU_NULL, AU_NULL,
862 AU_NULL, AU_NULL, AU_NULL,
863 AU_NULL,
864 },
865
866 //DDE[5]
867 {
868 AU_NULL, AU_NULL, AU_NULL,
869 AU_NULL, AU_NULL, AU_NULL,
870 AU_NULL, AU_NULL, AU_NULL,
871 AU_NULL, AU_NULL, AU_NULL,
872 AU_NULL,
873 },
874
875 //GAAC_AD[6]
876 {
877 AU_NULL, AU_NULL, AU_NULL,
878 AU_NULL, AU_NULL, AU_NULL,
879 AU_NULL, AU_NULL, AU_NULL,
880 AU_NULL, AU_NULL, AU_NULL,
881 AU_NULL,
882 },
883
884 //MP3[7]
885 {
886 AU_NULL, AU_NULL, AU_NULL,
887 AU_NULL, AU_NULL, AU_NULL,
888 AU_NULL, AU_NULL, AU_NULL,
889 AU_NULL, AU_NULL, AU_NULL,
890 AU_NULL,
891 },
892
893 //mpeg_en[8]
894 {
895 AU_NULL, AU_NULL, AU_NULL,
896 AU_NULL, AU_NULL, AU_NULL,
897 AU_NULL, AU_NULL, AU_NULL,
898 AU_NULL, AU_NULL, AU_NULL,
899 AU_NULL,
900 },
901
902 //XPCM2[9]
903 {
904 AU_NULL, AU_NULL, AU_NULL,
905 AU_NULL, AU_NULL, AU_NULL,
906 AU_NULL, AU_NULL, AU_NULL,
907 AU_NULL, AU_NULL, AU_NULL,
908 AU_NULL,
909 },
910
911 //KTV[A]
912 {
913 AU_NULL, AU_NULL, AU_NULL,
914 AU_NULL, AU_NULL, AU_NULL,
915 AU_NULL, AU_NULL, AU_NULL,
916 AU_NULL, AU_NULL, AU_NULL,
917 AU_NULL,
918 },
919
920 //KTV2[B]
921 {
922 AU_NULL, AU_NULL, AU_NULL,
923 AU_NULL, AU_NULL, AU_NULL,
924 AU_NULL, AU_NULL, AU_NULL,
925 AU_NULL, AU_NULL, AU_NULL,
926 AU_NULL,
927 },
928 };
929
930 AUDIO_ALG_INFO audio_se_enc_info[]=
931 {
932 // ---------- Decoder2 DSP Code ----------
933 //AU_DVB2_ENCODE_NONE[0]
934 {
935 AU_NULL, AU_NULL, AU_NULL,
936 AU_NULL, AU_NULL, AU_NULL,
937 AU_NULL, AU_NULL, AU_NULL,
938 AU_NULL, AU_NULL, AU_NULL,
939 AU_NULL,
940 },
941
942 //AU_DVB2_ENCODE_DTSE[1]
943 {
944 AU_NULL, AU_NULL, AU_NULL,
945 AU_NULL, AU_NULL, AU_NULL,
946 AU_NULL, AU_NULL, AU_NULL,
947 AU_NULL, AU_NULL, AU_NULL,
948 AU_NULL,
949 },
950
951 //AU_DVB2_ENCODE_MS10_DDE[2]
952 {
953 AU_NULL, AU_NULL, AU_NULL,
954 AU_NULL, AU_NULL, AU_NULL,
955 AU_NULL, AU_NULL, AU_NULL,
956 AU_NULL, AU_NULL, AU_NULL,
957 AU_NULL,
958 },
959
960 //AU_DVB2_ENCODE_DDE[3]
961 {
962 AU_NULL, AU_NULL, AU_NULL,
963 AU_NULL, AU_NULL, AU_NULL,
964 AU_NULL, AU_NULL, AU_NULL,
965 AU_NULL, AU_NULL, AU_NULL,
966 AU_NULL,
967 },
968
969 //AU_DVB2_ENCODE_MAX[4]
970 {
971 AU_NULL, AU_NULL, AU_NULL,
972 AU_NULL, AU_NULL, AU_NULL,
973 AU_NULL, AU_NULL, AU_NULL,
974 AU_NULL, AU_NULL, AU_NULL,
975 AU_NULL,
976 },
977 };
978
979 AUDIO_ALG_INFO audio_snd_mm_dec_info[]=
980 {
981 //DEC_NONE[0]
982 {
983 AU_NULL, AU_NULL, AU_NULL,
984 AU_NULL, AU_NULL, AU_NULL,
985 AU_NULL, AU_NULL, AU_NULL,
986 AU_NULL, AU_NULL, AU_NULL,
987 "DEC none",
988 },
989 };
990
991 AUDIO_ALG_INFO audio_soundeffect_info[]=
992 {
993 // SE System
994 {
995 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
996 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
997 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
998 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
999 "T12 SE system"
1000 },
1001 };
1002
1003 AUDIO_ALG_INFO audio_sndeff_info[]=
1004 {
1005 //none
1006 {
1007 MST_CODEC_NONE_PM1_ADDR, MST_CODEC_NONE_PM1_SIZE, mst_codec_none_pm1 + 6,
1008 AU_NULL, AU_NULL, AU_NULL,
1009 MST_CODEC_NONE_PM3_ADDR, MST_CODEC_NONE_PM3_SIZE, mst_codec_none_pm3 + 6,
1010 AU_NULL, AU_NULL, AU_NULL,
1011 "SE adv_none",
1012 },
1013 };
1014
1015 AUDIO_ALG_INFO audio_sif_dec_info[]=
1016 {
1017 //NONE
1018 {
1019 AU_NULL, AU_NULL, AU_NULL,
1020 AU_NULL, AU_NULL, AU_NULL,
1021 AU_NULL, AU_NULL, AU_NULL,
1022 AU_NULL, AU_NULL, AU_NULL,
1023 "NULL",
1024 },
1025
1026 //BTSC[0]
1027 {
1028 AU_NULL, AU_NULL, AU_NULL,
1029 AU_NULL, AU_NULL, AU_NULL,
1030 AU_NULL, AU_NULL, AU_NULL,
1031 AU_NULL, AU_NULL, AU_NULL,
1032 AU_NULL,
1033 },
1034 //EIAJ[1]
1035 {
1036 AU_NULL, AU_NULL, AU_NULL,
1037 AU_NULL, AU_NULL, AU_NULL,
1038 AU_NULL, AU_NULL, AU_NULL,
1039 AU_NULL, AU_NULL, AU_NULL,
1040 AU_NULL,
1041 },
1042 //palsum[2]
1043 {
1044 AU_NULL, AU_NULL, AU_NULL,
1045 AU_NULL, AU_NULL, AU_NULL,
1046 AU_NULL, AU_NULL, AU_NULL,
1047 AU_NULL, AU_NULL, AU_NULL,
1048 AU_NULL,
1049 },
1050 //palsum[3]
1051 {
1052 AU_NULL, AU_NULL, AU_NULL,
1053 AU_NULL, AU_NULL, AU_NULL,
1054 AU_NULL, AU_NULL, AU_NULL,
1055 AU_NULL, AU_NULL, AU_NULL,
1056 AU_NULL,
1057 },
1058 //palsum[4]
1059 {
1060 AU_NULL, AU_NULL, AU_NULL,
1061 AU_NULL, AU_NULL, AU_NULL,
1062 AU_NULL, AU_NULL, AU_NULL,
1063 AU_NULL, AU_NULL, AU_NULL,
1064 AU_NULL,
1065 },
1066 //FM_RADIO[5]
1067 {
1068 AU_NULL, AU_NULL, AU_NULL,
1069 AU_NULL, AU_NULL, AU_NULL,
1070 AU_NULL, AU_NULL, AU_NULL,
1071 AU_NULL, AU_NULL, AU_NULL,
1072 AU_NULL,
1073 },
1074
1075 };
1076
1077 AUDIO_ALG_INFO audio_adv_sndeff_info[] =
1078 {
1079
1080 //PL2, 0
1081 {
1082 AU_NULL, AU_NULL, AU_NULL,
1083 AU_NULL, AU_NULL, AU_NULL,
1084 AU_NULL, AU_NULL, AU_NULL,
1085 AU_NULL, AU_NULL, AU_NULL,
1086 "pl2",
1087 },
1088 //BBE, 1
1089 {
1090 AU_NULL, AU_NULL, AU_NULL,
1091 AU_NULL, AU_NULL, AU_NULL,
1092 AU_NULL, AU_NULL, AU_NULL,
1093 AU_NULL, AU_NULL, AU_NULL,
1094 "null",
1095 },
1096 //SRS, 2
1097 {
1098 AU_NULL, AU_NULL, AU_NULL,
1099 AU_NULL, AU_NULL, AU_NULL,
1100 AU_NULL, AU_NULL, AU_NULL,
1101 AU_NULL, AU_NULL, AU_NULL,
1102 "null",
1103 },
1104 //VDS, 3
1105 {
1106 AU_NULL, AU_NULL, AU_NULL,
1107 AU_NULL, AU_NULL, AU_NULL,
1108 AU_NULL, AU_NULL, AU_NULL,
1109 AU_NULL, AU_NULL, AU_NULL,
1110 "null",
1111 },
1112 //VSPK, 4
1113 {
1114 AU_NULL, AU_NULL, AU_NULL,
1115 AU_NULL, AU_NULL, AU_NULL,
1116 AU_NULL, AU_NULL, AU_NULL,
1117 AU_NULL, AU_NULL, AU_NULL,
1118 "null",
1119 },
1120 //SUPV, 5
1121 {
1122 AU_NULL, AU_NULL, AU_NULL,
1123 AU_NULL, AU_NULL, AU_NULL,
1124 AU_NULL, AU_NULL, AU_NULL,
1125 AU_NULL, AU_NULL, AU_NULL,
1126 "null",
1127 },
1128 //TSHD, 6
1129 {
1130 AU_NULL, AU_NULL, AU_NULL,
1131 AU_NULL, AU_NULL, AU_NULL,
1132 AU_NULL, AU_NULL, AU_NULL,
1133 AU_NULL, AU_NULL, AU_NULL,
1134 "null",
1135 },
1136 //XEN, 7
1137 {
1138 AU_NULL, AU_NULL, AU_NULL,
1139 AU_NULL, AU_NULL, AU_NULL,
1140 AU_NULL, AU_NULL, AU_NULL,
1141 AU_NULL, AU_NULL, AU_NULL,
1142 "null",
1143 },
1144 //TSHDVIQ, #8
1145 {
1146 AU_NULL, AU_NULL, AU_NULL,
1147 AU_NULL, AU_NULL, AU_NULL,
1148 AU_NULL, AU_NULL, AU_NULL,
1149 AU_NULL, AU_NULL, AU_NULL,
1150 "null",
1151 },
1152 //ADV, 9
1153 {
1154 AU_NULL, AU_NULL, AU_NULL,
1155 AU_NULL, AU_NULL, AU_NULL,
1156 AU_NULL, AU_NULL, AU_NULL,
1157 AU_NULL, AU_NULL, AU_NULL,
1158 "null",
1159 },
1160 };
1161 #endif
1162
1163
1164 #ifndef MSOS_TYPE_NOS
1165 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
1166 #endif
1167 //-------------------------------------------------------------------------------------------------
1168 // Local Defines
1169 //-------------------------------------------------------------------------------------------------
1170 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
1171 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
1172 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
1173
1174 //-------------------------------------------------------------------------------------------------
1175 // Local Structures
1176 //-------------------------------------------------------------------------------------------------
1177
1178
1179 //-------------------------------------------------------------------------------------------------
1180 // Global Variables
1181 //-------------------------------------------------------------------------------------------------
1182 extern MS_BOOL g_bAudio_loadcode_from_dram;
1183 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
1184
1185 extern MS_S32 _s32AUDIOMutexIDMA;
1186
1187 #ifndef MSOS_TYPE_NUTTX
1188 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
1189 #endif
1190
1191
1192 //-------------------------------------------------------------------------------------------------
1193 // Local Variables
1194 //-------------------------------------------------------------------------------------------------
1195 static MS_U8 g_u8DspCodeTypeLoaded = 0;
1196
1197
1198 //-------------------------------------------------------------------------------------------------
1199 // Debug Functions
1200 //-------------------------------------------------------------------------------------------------
1201
1202
1203 //-------------------------------------------------------------------------------------------------
1204 // Local Functions
1205 //-------------------------------------------------------------------------------------------------
1206
1207
1208 //-------------------------------------------------------------------------------------------------
1209 // Global Functions
1210 //-------------------------------------------------------------------------------------------------
1211 ////////////////////////////////////////////////////////////////////////////////
1212 /// @brief \b Function \b Name: MDrv_AUDIO_DspLoadCodeKernel()
1213 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
1214 /// @param <IN> \b \b u8Type : -- DSP load code type
1215 /// DSP_segment -- select DSP load code seg
1216 /// DSP_select -- select DSP1 or DSP2
1217 /// @param <OUT> \b NONE :
1218 /// @param <RET> \b NONE :
1219 /// @param <GLOBAL> \b NONE :
1220 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(MS_U8 u8Type)1221 MS_BOOL HAL_AUDSP_DspLoadCode(MS_U8 u8Type)
1222 {
1223 #ifndef MSOS_TYPE_NUTTX
1224 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
1225 #endif
1226 MS_U32 MIU_addr;
1227 AUDIO_ALG_INFO *pau_info=NULL;
1228 MS_U8 DSP_select=0;
1229
1230 HALAUDSP_CHECK_SHM_INIT;
1231
1232 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",u8Type);
1233
1234 switch(u8Type & 0xF0)
1235 {
1236 case 0x00:
1237 case 0x10:
1238 return TRUE; // Decoder in DEC-R2
1239
1240 break;
1241
1242 case 0x30://AU_DVB2_STANDARD_MAD_TYPE
1243 if(u8Type >= AU_DVB2_STANDARD_MAX )
1244 {
1245 printf(" [audio_se_dec_info]:decoder type out of range.\r\n");
1246 return FALSE;
1247 }
1248 pau_info = &audio_se_dec_info[u8Type&0xF];
1249 DSP_select = DSP_SE;
1250
1251 break;
1252 case 0x40://AU_DVB2_ADVSND_TYPE
1253 case 0x50:
1254 if(u8Type >= AU_DVB2_ADVSND_MAX )
1255 {
1256 printf(" [audio_adv_sndeff_info]:decoder type out of range.\r\n");
1257 return FALSE;
1258 }
1259 pau_info = &audio_adv_sndeff_info[u8Type&0xF];
1260 DSP_select= DSP_SE;
1261 break;
1262
1263 case 0x60://AU_SE_SYSTEM
1264 pau_info = &audio_soundeffect_info[0];
1265 DSP_select = DSP_SE;
1266 break;
1267
1268 case 0xa0://AU_SND_EFFECT
1269 pau_info = &audio_sndeff_info[0];
1270 DSP_select = DSP_SE;
1271 break;
1272
1273 case 0xb0://AU_DVB_STANDARD_SIF_TYPE
1274 if ( (u8Type & (~0x08)) > AU_SIF_FM_RADIO )
1275 {
1276 printf(" [audio_sif_info]:decoder type out of range.\r\n");
1277 return FALSE;
1278 }
1279 pau_info = &audio_sif_dec_info[u8Type&0x07];
1280 DSP_select = DSP_SE;
1281 break;
1282
1283 case 0xd0://AU_DVB2_ENCODE_TYPE
1284 if(u8Type >= AU_DVB2_ENCODE_MAX )
1285 {
1286 printf(" [audio_se_encode_info]:encoder type out of range.\r\n");
1287 return FALSE;
1288 }
1289 pau_info = &audio_se_enc_info[u8Type&0xF];
1290 DSP_select = DSP_SE;
1291
1292 break;
1293
1294 case 0xe0://AU_DEC_SYSTEM
1295 return TRUE; // Decoder in DEC-R2
1296
1297 break;
1298
1299 default:
1300 DBG_AUDSP_ERROR(" [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
1301 return FALSE;
1302 }
1303
1304 #ifndef MSOS_TYPE_NUTTX
1305 AUDIO_TEE_INFO_SHM_CHECK_NULL;
1306 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (MS_U8)u8Type);
1307 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(1);
1308 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
1309 if (DSP_select == DSP_DEC)
1310 {
1311 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_DEC;
1312 }
1313 else if (DSP_select == DSP_SE)
1314 {
1315 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
1316 }
1317
1318 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
1319 {
1320 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
1321 return FALSE;
1322 HAL_AUDSP_SetDspCodeTypeLoaded(u8Type);
1323 return TRUE;
1324 }
1325 #endif
1326
1327 if(pau_info->cm_len == 0)
1328 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1329 HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
1330
1331 if(DSP_select == DSP_DEC)
1332 {
1333 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1334 }
1335 else
1336 {
1337 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1338 }
1339
1340 if ( u8Type == 0x60 )
1341 {
1342 pau_info->cm_addr = 0x0008;
1343 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
1344 pau_info->cm_buf = (mst_codec_pm1+ 30);
1345 }
1346
1347 // Download PM of Algorithm
1348 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n",pau_info->pm_addr);
1349 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n",(MS_U32)pau_info->pm_buf);
1350 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n",pau_info->pm_len);
1351
1352 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
1353 return FALSE;
1354 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
1355 return FALSE;
1356
1357 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n",pau_info->cm_addr);
1358 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n",(MS_U32)pau_info->cm_buf);
1359 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n",pau_info->cm_len);
1360
1361 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
1362 return FALSE;
1363 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
1364 return FALSE;
1365
1366 // Download PM of PreFetch
1367 if(pau_info->prefetch_len != 0)
1368 {
1369 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
1370 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
1371 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
1372
1373 MIU_addr = (MS_U32)pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1374 DBG_AUDSP_LOAD(" MIU of PreFetch: 0x%lX\r\n", MIU_addr);
1375
1376 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(pau_info->prefetch_buf)), pau_info->prefetch_len);
1377 }
1378
1379 // Download PM of Cache
1380 if(pau_info->cache_len != 0)
1381 {
1382 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
1383 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
1384 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
1385
1386 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1387 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
1388 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(pau_info->cache_buf)), pau_info->cache_len);
1389 }
1390
1391 // Load SE-DSP system code
1392 if(u8Type == 0x60)
1393 {
1394 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP SND-R2
1395 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); // clear DEC-R2 start cmd register
1396 #if ASND_R2_SUPPORT
1397 HAL_AUR2_WriteByte(REG_SNDR2_RESET_CTRL, 0x00); // STOP SND-R2
1398 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
1399 #endif
1400 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
1401 AUDIO_DELAY1MS(1);
1402
1403 #ifdef MBOOT
1404 //============ Load R2 code ===============
1405 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1406 //====================================
1407
1408 // Load DEC-R2
1409 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1410
1411 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1412 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1413 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1414 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1415 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1416 HAL_DEC_R2_init_SHM_param();
1417 AUDIO_DELAY1MS(1);
1418 MsOS_FlushMemory();
1419
1420 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1421 #else
1422 //============ Load R2 code ===============
1423 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1424 //====================================
1425
1426 // Load DEC-R2
1427 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1428
1429 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1430 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1431 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1432 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1433 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1434 HAL_DEC_R2_init_SHM_param();
1435 AUDIO_DELAY1MS(1);
1436 MsOS_FlushMemory();
1437 #if ASND_R2_SUPPORT
1438 // Load SND-R2
1439 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV)+ADEC__R2_DDR_SIZE;
1440 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_snd_r2)), SND_R2_SHM_DDR_OFFSET);
1441 memset((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE), 0, ASND__R2_DDR_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
1442 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
1443 (void*)(mst_snd_r2+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
1444 MST_SND_R2_AUDIO_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
1445 AUDIO_DELAY1MS(1);
1446 MsOS_FlushMemory();
1447
1448 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
1449 #endif
1450 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1451 #endif
1452
1453 if(!HAL_AUDSP_DspLoadCodeSegment(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
1454 if(!HAL_AUDSP_DspVerifySegmentCode(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
1455 if(!HAL_AUDSP_DspLoadCodeSegment(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
1456 if(!HAL_AUDSP_DspVerifySegmentCode(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
1457 }
1458
1459 MsOS_FlushMemory();
1460
1461 HAL_AUDSP_SetDspCodeTypeLoaded(u8Type);
1462 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=%s(0x%x))\r\n", pau_info->AlgName, u8Type);
1463
1464 return TRUE;
1465 }
1466
HAL_AUDSP_Get_Alg_Info(MS_U8 Id,MS_U8 u8Type)1467 void * HAL_AUDSP_Get_Alg_Info(MS_U8 Id, MS_U8 u8Type)
1468 {
1469 void * pAudio_Info;
1470 AUDIO_DSP_ID DSP_Id;
1471
1472 DSP_Id = (AUDIO_DSP_ID) Id;
1473 switch ( DSP_Id )
1474 {
1475 case AUDIO_DSP_ID_DEC:
1476 //Cathy Temp
1477 case AUDIO_DSP_ID_SND:
1478 pAudio_Info = (void *) &audio_snd_mm_dec_info[u8Type];
1479 break;
1480
1481 default:
1482 HALAUDSP_ERROR ("Un-Support DSP ID (%d)\r\n", DSP_Id);
1483 pAudio_Info = NULL;
1484 return pAudio_Info;
1485 }
1486
1487 HALAUDSP_ERROR ("DSP %s Got the Alg Info (0x%X)\r\n", DSP_Id == AUDIO_DSP_ID_DEC ? "DEC" : "SND", u8Type);
1488
1489 return pAudio_Info;
1490 }
1491
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)1492 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
1493 {
1494 MS_U32 MIU_addr;
1495 AUDIO_ALG_INFO * pau_info = (AUDIO_ALG_INFO *) info;
1496
1497 if ( pau_info->cm_len == 0 )
1498 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1499
1500 // HALAUDSP_ERROR ("@@@@@@@@@@ ====== %s: %s start ======\r\n", __FUNCTION__, pau_info->AlgName);
1501
1502 //HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
1503
1504 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, ((DSP_select == DSP_DEC) ? 0x00 : 0x01));
1505
1506 /* Download PM of Algorithm */
1507 DBG_AUDSP_LOAD(" PM addr: 0x%lx\r\n", pau_info->pm_addr);
1508 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_U32) pau_info->pm_buf);
1509 DBG_AUDSP_LOAD(" PM size: 0x%lx\r\n", pau_info->pm_len);
1510
1511 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
1512 {
1513 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Fail !!\r\n");
1514 return FALSE;
1515 }
1516
1517 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
1518 {
1519 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Verify Fail !!\r\n");
1520 return FALSE;
1521 }
1522
1523 DBG_AUDSP_LOAD(" CM addr: 0x%lx\r\n", pau_info->cm_addr);
1524 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_U32) pau_info->cm_buf);
1525 DBG_AUDSP_LOAD(" CM size: 0x%lx\r\n", pau_info->cm_len);
1526
1527 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
1528 {
1529 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Fail !!\r\n");
1530 return FALSE;
1531 }
1532
1533 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
1534 {
1535 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Verify Fail !!\r\n");
1536 return FALSE;
1537 }
1538
1539 /* Download PM of PreFetch */
1540 if ( pau_info->prefetch_len != 0 )
1541 {
1542 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%lx\r\n", pau_info->prefetch_addr);
1543 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->prefetch_buf);
1544 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%lx\r\n", pau_info->prefetch_len);
1545
1546 MIU_addr = (MS_U32) pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1547 HALAUDSP_ERROR (" MIU of PreFetch: 0x%lX\r\n", MIU_addr);
1548
1549 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((MS_U32)(pau_info->prefetch_buf)), pau_info->prefetch_len);
1550 }
1551
1552 /* Download PM of Cache */
1553 if ( pau_info->cache_len != 0 )
1554 {
1555 DBG_AUDSP_LOAD(" Cache PM addr: 0x%lx\r\n", (MS_U32)pau_info->cache_addr);
1556 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_U32)pau_info->cache_buf);
1557 DBG_AUDSP_LOAD(" Cache PM size: 0x%lx\r\n", pau_info->cache_len);
1558
1559 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
1560 DBG_AUDSP_LOAD(" MIU of Cache: 0x%lX\r\n", MIU_addr);
1561
1562 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((MS_U32)(pau_info->cache_buf)), pau_info->cache_len);
1563 }
1564
1565 MsOS_FlushMemory();
1566
1567 DBG_AUDSP_LOAD("DSP %s finished (type=%s)\r\n", ((DSP_select == DSP_DEC) ? "DEC" : "SND"), pau_info->AlgName);
1568
1569 return TRUE;
1570 }
1571
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)1572 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
1573 {
1574 MS_U8 * dsp_bootcode;
1575 #ifndef MBOOT
1576 MS_U32 MIU_addr;
1577 #endif
1578
1579 if ( pau_info->cm_len == 0 )
1580 {
1581 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
1582 }
1583
1584 dsp_bootcode = pau_info->cm_buf;
1585
1586 pau_info->cm_addr = 0x0008;
1587 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
1588 pau_info->cm_buf = (mst_codec_pm1 + 30);
1589
1590 if ( !HAL_AUDSP_DspLoadCode2(DSP_select, pau_info) )
1591 {
1592 return FALSE;
1593 }
1594
1595 if ( DSP_select == DSP_SE )
1596 {
1597 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000);
1598 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x00); //Stop R2
1599 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
1600 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
1601 AUDIO_DELAY1MS(1);
1602 #ifndef MBOOT
1603 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(2);
1604 memcpy((void *) (MS_PA2KSEG1 (MIU_addr)), (void *) ((MS_U32) (mst_codec_r2)), MST_CODEC_R2_AUDIO_SIZE);
1605 #endif
1606 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x27); //Eanble R2
1607 }
1608
1609
1610 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0001, dsp_bootcode + 3, 21, DSP_select) )
1611 {
1612 return FALSE;
1613 }
1614
1615 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0001, dsp_bootcode + 3, 21, DSP_select) )
1616 {
1617 return FALSE;
1618 }
1619
1620 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0000, dsp_bootcode, 3, DSP_select) )
1621 {
1622 return FALSE;
1623 }
1624
1625 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0000, dsp_bootcode, 3, DSP_select) )
1626 {
1627 return FALSE;
1628 }
1629
1630
1631 MsOS_FlushMemory();
1632
1633 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
1634 printf("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
1635
1636 return TRUE;
1637 }
1638
1639 ////////////////////////////////////////////////////////////////////////////////
1640 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
1641 /// @brief \b Function \b Description: This routine is used to load DSP code
1642 /// @param <IN> \b dsp_addr :
1643 /// @param <IN> \b dspCode_buf :
1644 /// @param <IN> \b dspCode_buflen :
1645 /// @param <OUT> \b NONE :
1646 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
1647 /// FALSE--DSP Load code fail
1648 /// @param <GLOBAL> \b NONE :
1649 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)1650 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
1651 {
1652 MS_U32 i,j;
1653 MS_U32 idma_wrbase_addr_l, dsp_brg_data_l, dsp_brg_data_h, bdma_mode_addr;
1654
1655 HALAUDSP_CHECK_SHM_INIT;
1656
1657 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
1658
1659 g_bDSPLoadCode = TRUE;
1660
1661 if(DSP_select == DSP_DEC)
1662 {
1663 idma_wrbase_addr_l = REG_DEC_IDMA_WRBASE_ADDR_L;
1664 dsp_brg_data_l = REG_DEC_DSP_BRG_DATA_L;
1665 dsp_brg_data_h = REG_DEC_DSP_BRG_DATA_H;
1666 bdma_mode_addr = REG_DEC_BDMA_CFG;
1667 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1668 }
1669 else
1670 {
1671 idma_wrbase_addr_l = REG_SE_IDMA_WRBASE_ADDR_L;
1672 dsp_brg_data_l = REG_SE_DSP_BRG_DATA_L;
1673 dsp_brg_data_h = REG_SE_DSP_BRG_DATA_H;
1674 bdma_mode_addr = REG_SE_BDMA_CFG;
1675 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1676 }
1677
1678 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma
1679
1680 if(dspCode_buflen>0)
1681 {
1682 /* set iDMA addr */
1683
1684 HAL_AUDIO_WriteReg(idma_wrbase_addr_l, dsp_addr);
1685
1686 AUDIO_DELAY1MS(1);
1687
1688 for( i=0; i<dspCode_buflen; i+=3)
1689 {
1690 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i+1));
1691 HAL_AUDIO_WriteByte(dsp_brg_data_h,*(dspCode_buf+i+2));
1692
1693 for(j=0;j<2;j++);//for delay only
1694
1695 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i));
1696 HAL_AUDIO_WriteByte(dsp_brg_data_h,0x00);
1697
1698 if(DSP_select == DSP_DEC)
1699 {
1700 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
1701 {
1702 g_bDSPLoadCode = FALSE;
1703
1704 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1705
1706 return FALSE;
1707 }
1708 }
1709 else
1710 {
1711 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
1712 {
1713 g_bDSPLoadCode = FALSE;
1714
1715 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1716
1717 return FALSE;
1718 }
1719 }
1720 }
1721 }
1722
1723 g_bDSPLoadCode = FALSE;
1724
1725 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1726
1727 return TRUE;
1728 }
1729
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)1730 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
1731 {
1732 MS_U32 i;
1733 MS_U8 dat[3];
1734 MS_U32 idma_rdbase_addr_l, idma_ctrl0, idma_rddata_h_0, idma_rddata_h_1, idma_rddata_l, bdma_mode_addr;
1735
1736 #if (DSP_VERIFY_DSP_CODE==0)
1737 return TRUE; //don't verify just return;
1738 #endif
1739
1740 HALAUDSP_CHECK_SHM_INIT;
1741
1742 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
1743
1744 g_bDSPLoadCode = TRUE;
1745
1746 if ( DSP_select == DSP_DEC )
1747 {
1748 idma_rdbase_addr_l = REG_DEC_IDMA_RDBASE_ADDR_L;
1749 idma_ctrl0 = REG_DEC_IDMA_CTRL0;
1750 idma_rddata_h_0 = REG_DEC_IDMA_RDDATA_H_0;
1751 idma_rddata_h_1 = REG_DEC_IDMA_RDDATA_H_1;
1752 idma_rddata_l = REG_DEC_IDMA_RDDATA_L;
1753 bdma_mode_addr = REG_DEC_BDMA_CFG;
1754 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
1755 }
1756 else
1757 {
1758 idma_rdbase_addr_l = REG_SE_IDMA_RDBASE_ADDR_L;
1759 idma_ctrl0 = REG_SE_IDMA_CTRL0;
1760 idma_rddata_h_0 = REG_SE_IDMA_RDDATA_H_0;
1761 idma_rddata_h_1 = REG_SE_IDMA_RDDATA_H_1;
1762 idma_rddata_l = REG_SE_IDMA_RDDATA_L;
1763 bdma_mode_addr = REG_SE_BDMA_CFG;
1764 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
1765 }
1766
1767 //HAL_AUDIO_WriteMaskByte(0x3CEC, 0x40, 0x00);
1768 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma (enable idma)
1769 HAL_AUDIO_WriteReg(idma_rdbase_addr_l, dsp_addr);
1770 AUDIO_DELAY1MS(1);
1771
1772 for (i=0; i<dspCode_buflen; i+=3)
1773 {
1774 HAL_AUDIO_WriteMaskByte(idma_ctrl0, 0x08, 0x08 );
1775 #if (DSP_IDMA_CHK_READY == 1)
1776 if(DSP_select == DSP_DEC)
1777 {
1778 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
1779 {
1780 g_bDSPLoadCode = FALSE;
1781
1782 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1783
1784 return FALSE;
1785 }
1786 }
1787 else
1788 {
1789 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
1790 {
1791 g_bDSPLoadCode = FALSE;
1792
1793 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1794
1795 return FALSE;
1796 }
1797 }
1798 #endif
1799 dat[1] = HAL_AUDIO_ReadByte(idma_rddata_h_0);
1800 dat[2] = HAL_AUDIO_ReadByte(idma_rddata_h_1);
1801 dat[0] = HAL_AUDIO_ReadByte(idma_rddata_l);
1802
1803 //printf("@@%x\n", (dat[2] << 16) | (dat[1] << 8) | (dat[0]));
1804
1805 if ( (dat[0]!=dspCode_buf[i]) || (dat[1]!=dspCode_buf[i+1]) ||
1806 (dat[2]!=dspCode_buf[i+2]))
1807 {
1808 printf("check data %lx\n", i);
1809 printf("dat0 %X <===> ",dspCode_buf[i]);
1810 printf("%x \n", dat[0]);
1811 printf("dat1 %X <===> ",dspCode_buf[i+1]);
1812 printf("%x \n", dat[1]);
1813 printf("dat2 %x <===> ",dspCode_buf[i+2]);
1814 printf("%X \n", dat[2]);
1815 printf(" Dsp code verify error!!\r\n");
1816
1817 g_bDSPLoadCode = FALSE;
1818
1819 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1820
1821 return FALSE;
1822 }
1823 }
1824
1825 DBG_AUDSP(" Dsp code verify ok!!\n\r");
1826
1827 g_bDSPLoadCode = FALSE;
1828
1829 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
1830
1831 return TRUE;
1832 }
1833
1834 ////////////////////////////////////////////////////////////////////////////////
1835 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
1836 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
1837 /// @param <IN> \b IdmaChk_type :
1838 /// 0x10 : check write ready
1839 /// 0x80 : check read ready
1840 /// @param <OUT> \b NONE :
1841 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1842 /// FALSE--IDMA not ready
1843 /// @param <GLOBAL> \b NONE :
1844 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)1845 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
1846 {
1847 MS_U8 j = 0;
1848
1849 while(j<200)
1850 {
1851 j++;
1852 if( (HAL_AUDIO_ReadByte(REG_DEC_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1853 return TRUE;
1854 }
1855
1856 DBG_AUDSP_ERROR("DSP DEC Idma check ready fail!(%d)\r\n",j);
1857 return FALSE;
1858 }
1859
1860 ////////////////////////////////////////////////////////////////////////////////
1861 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
1862 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
1863 /// @param <IN> \b IdmaChk_type :
1864 /// 0x10 : check write ready
1865 /// 0x80 : check read ready
1866 /// @param <OUT> \b NONE :
1867 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1868 /// FALSE--IDMA not ready
1869 /// @param <GLOBAL> \b NONE :
1870 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)1871 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
1872 {
1873 MS_U8 j = 0;
1874
1875 while(j<200)
1876 {
1877 j++;
1878 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1879 return TRUE;
1880 }
1881
1882 DBG_AUDSP_ERROR("DSP SE Idma check ready fail!(%d)\r\n",j);
1883 return FALSE;
1884 }
1885
1886 ////////////////////////////////////////////////////////////////////////////////
1887 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
1888 /// @brief \b Function \b Description: This function is used to set the DSP code type.
1889 /// @param <IN> \b NONE :
1890 /// @param <OUT> \b NONE :
1891 /// @param <RET> \b MS_U8: DSP code type.
1892 /// @param <GLOBAL> \b NONE :
1893 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)1894 void HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)
1895 {
1896 g_u8DspCodeTypeLoaded=u8Type;
1897 }
1898
1899 ////////////////////////////////////////////////////////////////////////////////
1900 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1901 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1902 /// @param <IN> \b NONE :
1903 /// @param <OUT> \b NONE :
1904 /// @param <RET> \b MS_U8: DSP code type.
1905 /// @param <GLOBAL> \b NONE :
1906 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)1907 MS_U8 HAL_AUDSP_GetDspCodeTypeLoaded(void)
1908 {
1909 return g_u8DspCodeTypeLoaded;
1910 }
1911
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)1912 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
1913 {
1914 g_loadcodeinfo.pau_info = pau_info;
1915 g_loadcodeinfo.DSP_select= DSP_select;
1916 }
1917
1918 ////////////////////////////////////////////////////////////////////////////////
1919 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1920 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1921 /// @param <IN> \b NONE :
1922 /// @param <OUT> \b NONE :
1923 /// @param <RET> \b MS_U8: DSP code type.
1924 /// @param <GLOBAL> \b NONE :
1925 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)1926 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
1927 {
1928 return &g_loadcodeinfo;
1929 }
1930
1931 ////////////////////////////////////////////////////////////////////////////////
1932 /// @brief \b Function \b Name: HAL_AUDSP_DECR2LoadCode()
1933 /// @brief \b Function \b Description: Load DEC-R2 code to DDR
1934 /// @param <IN> \b NONE :
1935 /// @param <OUT> \b NONE :
1936 /// @param <RET> \b NONE :
1937 /// @param <GLOBAL> \b NONE :
1938 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DECR2LoadCode(void)1939 void HAL_AUDSP_DECR2LoadCode(void)
1940 {
1941 MS_U32 MIU_addr;
1942
1943 printf("======audio: start DEC-R2 load code======\n");
1944
1945 HAL_AUR2_WriteByte(REG_DECR2_RESET_CTRL, 0x00); // STOP DEC-R2
1946 HAL_AUR2_WriteMaskReg(REG_DECR2_SYSTEM_START, 0xFFFF, 0x0000); //clear DEC-R2 start cmd register
1947 AUDIO_DELAY1MS(1);
1948
1949 //============ Load R2 code ===============
1950 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
1951 //====================================
1952
1953 // Load DEC-R2
1954 #if (ENABLE_AUDIO_DEC_R2_BIN == FALSE)
1955 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1956
1957 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((MS_U32)(mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
1958 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1959 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1960 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
1961 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
1962 #else
1963 {
1964 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
1965
1966 if (pf_loadR2CodeFromBin)
1967 {
1968 MsOS_Dcache_Flush(0, 64 * 1024 * 1024);
1969 MsOS_FlushMemory();
1970 pf_loadR2CodeFromBin(0, MIU_addr, ADEC__R2_DDR_SIZE);
1971 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET), 0, DEC_R2_SHM_DDR_SIZE);
1972 }
1973 else
1974 {
1975 printf("[%s] error !! call pf_loadR2CodeFromBin is NULL\n", __FUNCTION__);
1976 }
1977 }
1978 #endif
1979
1980 HAL_DEC_R2_init_SHM_param();
1981 AUDIO_DELAY1MS(1);
1982 MsOS_FlushMemory();
1983
1984 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
1985 HAL_MAD2_SetMcuCmd(0xF3);
1986
1987 printf("======audio: end DEC-R2 load code======\n");
1988 }
1989
1990