1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
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20 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
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91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 //-------------------------------------------------------------------------------------------------
96 // Include Files
97 //-------------------------------------------------------------------------------------------------
98 // Common Definition
99 #include <string.h>
100
101 #include "MsCommon.h"
102 #include "MsIRQ.h"
103 #include "MsOS.h"
104 #include "MsTypes.h"
105
106 #include "drvBDMA.h"
107 #include "drvSERFLASH.h"
108
109 #include "regCHIP.h"
110
111 #include "halAUDSP.h"
112 #include "drvAUDIO.h"
113 #include "../audio/regAUDIO.h"
114 #include "../audio/halAUDIO.h"
115 #include "../audio/halSIF.h"
116 #include "../audio/halADVAUDIO.h"
117 #include "../audio/ddr_config.h"
118 #include "../audio/r2_shm_comm.h"
119 #include "../audio/decR2_shm.h"
120 #if ASND_R2_SUPPORT
121 #include "../audio/sndR2_shm.h"
122 #endif
123
124 #ifdef CONFIG_MBOOT//Mboot Mini system
125 #include "dspcode_s/aucode_s.c"
126 #include "dspcode_s/aucode_dec.c"
127 #include "dspcode_s/aucode_mboot_r2.c"
128 #else
129 #include "dspcode_s/aucode_palsum.c"
130 #include "dspcode_s/aucode_btsc.c"
131 #include "dspcode_s/aucode_s.c"
132 #include "dspcode_s/aucode_dec.c"
133 #include "dspcode_s/aucode_adec_r2.c"
134 #if ASND_R2_SUPPORT
135 #include "dspcode_s/aucode_asnd_r2.c"
136 #endif
137 #include "dspcode_s/aucode_dde.c"
138 #include "dspcode_s/aucode_ms10_dde.c"
139
140 #include "dspcode_adv/aucode_puresnd.c"
141 #include "dspcode_adv/aucode_dps.c"
142 #include "dspcode_adv/aucode_dbx.c"
143 #endif
144
145
146
147 #if defined(MSOS_TYPE_NUTTX)
148 extern int lib_lowprintf(const char *format, ...);
149 #define DBG_PREFIX lib_lowprintf
150 #else
151 #define DBG_PREFIX printf
152 #endif
153
154 #if (defined ANDROID)
155 #include <sys/mman.h>
156 #include <cutils/ashmem.h>
157 #include <cutils/log.h>
158
159 #ifndef LOGI // android 4.1 rename LOGx to ALOGx
160 #define LOGI ALOGI
161 #endif
162
163 #ifndef LOGE // android 4.1 rename LOGx to ALOGx
164 #define LOGE ALOGE
165 #endif
166
167 #define HALAUDSP_PRINT(fmt, args...) LOGI("<<android>> " fmt, ## args)
168 #define HALAUDSP_ERROR(fmt, args...) LOGE("<<android>> " fmt, ## args)
169 #else
170 #define HALAUDSP_PRINT(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
171 #define HALAUDSP_ERROR(fmt, args...) DBG_PREFIX("[[utopia]] " fmt, ## args)
172 #endif
173
174 #define HALAUDSP_CHECK_SHM_INIT \
175 do { \
176 if (g_AudioVars2 == NULL) \
177 { \
178 HALAUDSP_ERROR("%s() : Warning! g_AudioVars2 should not be NULL !!!\n", __FUNCTION__); \
179 HALAUDSP_ERROR("%s() : Perform SHM Init here !!!\n", __FUNCTION__); \
180 if (HAL_AUDIO_InitialVars() == FALSE) \
181 { \
182 MS_ASSERT(0); \
183 } \
184 } \
185 } while(0)
186
187 //-------------------------------------------------------------------------------------------------
188 // Driver Compiler Options
189 //-------------------------------------------------------------------------------------------------
190
191 #define DBG_AUDSP_LOAD(args...) //DBG_PREFIX(args)
192 #define DBG_AUDSP(args...) //DBG_PREFIX(args)
193 #define DBG_AUDSP_ERROR(args...) //DBG_PREFIX(args);
194
195 #ifdef CONFIG_MBOOT //mboot Speed up
196 #define DSP_VERIFY_DSP_CODE 0 // 0: don't verify dsp code (for speed)
197 // 1: verify dsp code (for debug)
198 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
199 // 1: check IDMA ready (for debug)
200 #else
201 #define DSP_VERIFY_DSP_CODE 1 // 0: don't verify dsp code (for speed)
202 // 1: verify dsp code (for debug)
203 #define DSP_IDMA_CHK_READY 1 // 0: don't check IDMA ready (for speed)
204 // 1: check IDMA ready (for debug)
205 #endif
206
207 #define AU_NULL 0
208
209 #ifdef CONFIG_MBOOT
210 #define FLASH_COPY(x,y,z,i,j) TRUE
211 #define FLASH_CHKDONE() TRUE
212 #else
213 #define FLASH_COPY(x,y,z,i,j) MDrv_SERFLASH_CopyHnd(x,y,z,i,j)
214 #define FLASH_CHKDONE() MDrv_FLASH_CheckWriteDone()
215 #endif
216
217 LOAD_CODE_INFO g_loadcodeinfo;
218 MS_BOOL g_bDSPLoadCode = FALSE;
219
220 #ifndef CONFIG_MBOOT
221 AUDIO_ALG_INFO dsp_info[]=
222 {
223 // ---------- Decoder2 DSP Code ----------
224 //AU_DVB_SYS_NONE[0]
225 {
226 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
227 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
228 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
229 AU_NULL, AU_NULL, AU_NULL,
230 "DVB2_NONE",
231 AU_DVB2_NONE,
232 },
233 // SE System
234 {
235 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
236 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
237 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
238 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
239 "SE SYSTEM",
240 AU_SE_SYSTEM,
241 },
242 //DDE
243 {
244 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
245 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
246 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
247 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
248 "dde",
249 AU_DVB2_STANDARD_DDE,
250 },
251 //BTSC
252 {
253 MST_CODEC_SIF_BTSC_PM1_ADDR, MST_CODEC_SIF_BTSC_PM1_SIZE, mst_codec_sif_btsc_pm1 + 6,
254 MST_CODEC_SIF_BTSC_PM2_ADDR, MST_CODEC_SIF_BTSC_PM2_SIZE, mst_codec_sif_btsc_pm2 + 6,
255 MST_CODEC_SIF_BTSC_PM3_ADDR, MST_CODEC_SIF_BTSC_PM3_SIZE, mst_codec_sif_btsc_pm3 + 6,
256 AU_NULL, AU_NULL, AU_NULL,
257 "SIF BTSC",
258 AU_SIF_BTSC,
259 },
260 // PALSUM
261 {
262 MST_CODEC_SIF_PALSUM_PM1_ADDR, MST_CODEC_SIF_PALSUM_PM1_SIZE, mst_codec_sif_palsum_pm1 + 6,
263 MST_CODEC_SIF_PALSUM_PM2_ADDR, MST_CODEC_SIF_PALSUM_PM2_SIZE, mst_codec_sif_palsum_pm2 + 6,
264 MST_CODEC_SIF_PALSUM_PM3_ADDR, MST_CODEC_SIF_PALSUM_PM3_SIZE, mst_codec_sif_palsum_pm3 + 6,
265 AU_NULL, AU_NULL, AU_NULL,
266 "SIF PALSUM",
267 AU_SIF_PALSUM,
268 },
269 // audio_adv_sndeff_info
270 //DBX
271 {
272 MST_CODEC_DBX_PM1_ADDR, MST_CODEC_DBX_PM1_SIZE, mst_codec_dbx_pm1 + 6,
273 AU_NULL, AU_NULL, AU_NULL,
274 AU_NULL, AU_NULL, AU_NULL,
275 AU_NULL, AU_NULL, AU_NULL,
276 "ADVSND DBX",
277 AU_DVB2_ADVSND_DBX,
278 },
279 //PURESND
280 {
281 MST_CODEC_PURESND_PM1_ADDR, MST_CODEC_PURESND_PM1_SIZE, mst_codec_puresnd_pm1 + 6,
282 AU_NULL, AU_NULL, AU_NULL,
283 MST_CODEC_PURESND_PM3_ADDR, MST_CODEC_PURESND_PM3_SIZE, mst_codec_puresnd_pm3 + 6,
284 MST_CODEC_PURESND_PM4_ADDR, MST_CODEC_PURESND_PM4_SIZE, mst_codec_puresnd_pm4 + 6,
285 "ADVSND PURESND",
286 AU_DVB2_ADVSND_PURESND,
287 },
288 //DPS
289 {
290 MST_CODEC_DPS_PM1_ADDR, MST_CODEC_DPS_PM1_SIZE, mst_codec_dps_pm1 + 6,
291 AU_NULL, AU_NULL, AU_NULL,
292 MST_CODEC_DPS_PM3_ADDR, MST_CODEC_DPS_PM3_SIZE, mst_codec_dps_pm3 + 6,
293 AU_NULL, AU_NULL, AU_NULL,
294 "ADVSND BONGIOVI_DPS",
295 AU_DVB2_ADVSND_BONGIOVI_DPS,
296 },
297 //DTSE
298 {
299 AU_NULL, AU_NULL, AU_NULL,
300 AU_NULL, AU_NULL, AU_NULL,
301 AU_NULL, AU_NULL, AU_NULL,
302 AU_NULL, AU_NULL, AU_NULL,
303 "DTSE",
304 AU_DVB2_ENCODE_DTSE,
305 },
306 //DDE
307 {
308 MST_CODEC_DDE_PM1_ADDR, MST_CODEC_DDE_PM1_SIZE, mst_codec_dde_pm1 + 6,
309 MST_CODEC_DDE_PM2_ADDR, MST_CODEC_DDE_PM2_SIZE, mst_codec_dde_pm2 + 6,
310 MST_CODEC_DDE_PM3_ADDR, MST_CODEC_DDE_PM3_SIZE, mst_codec_dde_pm3 + 6,
311 MST_CODEC_DDE_PM4_ADDR, MST_CODEC_DDE_PM4_SIZE, mst_codec_dde_pm4 + 6,
312 "DDE",
313 AU_DVB2_ENCODE_DDE,
314 },
315 //MS10-DDE
316 {
317 MST_CODEC_MS10_DDE_PM1_ADDR, MST_CODEC_MS10_DDE_PM1_SIZE, mst_codec_ms10_dde_pm1 + 6,
318 MST_CODEC_MS10_DDE_PM2_ADDR, MST_CODEC_MS10_DDE_PM2_SIZE, mst_codec_ms10_dde_pm2 + 6,
319 MST_CODEC_MS10_DDE_PM3_ADDR, MST_CODEC_MS10_DDE_PM3_SIZE, mst_codec_ms10_dde_pm3 + 6,
320 MST_CODEC_MS10_DDE_PM4_ADDR, MST_CODEC_MS10_DDE_PM4_SIZE, mst_codec_ms10_dde_pm4 + 6,
321 "MS10-DDE",
322 AU_DVB2_ENCODE_MS10_DDE,
323 },
324
325 };
326 #else //=======================CONFIG_MBOOT=========================================//
327 AUDIO_ALG_INFO dsp_info[]=
328 {
329 // ---------- Decoder2 DSP Code ----------
330 //AU_DVB_SYS_NONE[0]
331 {
332 MST_CODEC_DEC_PM1_ADDR, MST_CODEC_DEC_PM1_SIZE, mst_codec_dec_pm1 + 6,
333 MST_CODEC_DEC_PM2_ADDR, MST_CODEC_DEC_PM2_SIZE, mst_codec_dec_pm2 + 6,
334 MST_CODEC_DEC_PM3_ADDR, MST_CODEC_DEC_PM3_SIZE, mst_codec_dec_pm3 + 6,
335 AU_NULL, AU_NULL, AU_NULL,
336 "DVB2_NONE",
337 AU_DVB2_NONE,
338 },
339 // SE System
340 {
341 MST_CODEC_PM1_ADDR, MST_CODEC_PM1_SIZE, mst_codec_pm1 + 6,
342 MST_CODEC_PM2_ADDR, MST_CODEC_PM2_SIZE, mst_codec_pm2 + 6,
343 MST_CODEC_PM3_ADDR, MST_CODEC_PM3_SIZE, mst_codec_pm3 + 6,
344 MST_CODEC_PM4_ADDR, MST_CODEC_PM4_SIZE, mst_codec_pm4 + 6,
345 "SE SYSTEM",
346 AU_SE_SYSTEM,
347 },
348 };
349 #endif
350
351
352 #ifndef MSOS_TYPE_NOS
353 void* MDrv_MPool_PA2KSEG1(void* pAddrPhys);
354 #endif
355 //-------------------------------------------------------------------------------------------------
356 // Local Defines
357 //-------------------------------------------------------------------------------------------------
358 #define AUDIO_HAL_ERR(x, args...) //{printf(x, ##args);}
359 #define LOU8(MS_U16Val) ( (MS_U8)(MS_U16Val) )
360 #define HIU8(MS_U16Val) ( (MS_U8)((MS_U16Val) >> 8) )
361
362 //-------------------------------------------------------------------------------------------------
363 // Local Structures
364 //-------------------------------------------------------------------------------------------------
365
366
367 //-------------------------------------------------------------------------------------------------
368 // Global Variables
369 //-------------------------------------------------------------------------------------------------
370 extern MS_BOOL g_bAudio_loadcode_from_dram;
371 extern AUDIO_SHARED_VARS2 * g_AudioVars2;
372
373 extern MS_S32 _s32AUDIOMutexIDMA;
374
375 #ifndef MSOS_TYPE_NUTTX
376 extern AUDIO_TEE_INFO_SHARE_MEM *pAudioTeeInfoShm;
377 #endif
378
379
380 //-------------------------------------------------------------------------------------------------
381 // Local Variables
382 //-------------------------------------------------------------------------------------------------
383 static MS_U8 g_u8DspCodeTypeLoaded = 0;
384
385
386 //-------------------------------------------------------------------------------------------------
387 // Debug Functions
388 //-------------------------------------------------------------------------------------------------
389
390
391 //-------------------------------------------------------------------------------------------------
392 // Local Functions
393 //-------------------------------------------------------------------------------------------------
394
395
396 //-------------------------------------------------------------------------------------------------
397 // Global Functions
398 //-------------------------------------------------------------------------------------------------
399 ////////////////////////////////////////////////////////////////////////////////
400 /// @brief \b Function \b Name: MDrv_AUDIO_DspLoadCodeKernel()
401 /// @brief \b Function \b Description: load CM/PM/cache/prefetch DSP code
402 /// @param <IN> \b \b u8Type : -- DSP load code type
403 /// DSP_segment -- select DSP load code seg
404 /// DSP_select -- select DSP1 or DSP2
405 /// @param <OUT> \b NONE :
406 /// @param <RET> \b NONE :
407 /// @param <GLOBAL> \b NONE :
408 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)409 MS_BOOL HAL_AUDSP_DspLoadCode(AUDIO_DSP_CODE_TYPE dspCodeType)
410 {
411 #ifndef MSOS_TYPE_NUTTX
412 REE_TO_TEE_MBX_MSG_TYPE msg_type = REE_TO_TEE_MBX_MSG_NULL;
413 #endif
414 MS_PHY MIU_addr;
415 AUDIO_ALG_INFO *pau_info=NULL;
416 MS_U8 DSP_select=0;
417 int ii;
418
419 HALAUDSP_CHECK_SHM_INIT;
420
421 DBG_AUDSP_LOAD("@@@@@@@@@@ ====== HAL_AUDSP_DspLoadCode: 0x%x ======\r\n",dspCodeType);
422
423 if (IS_AUDIO_DSP_CODE_TYPE_DEC1_SYSTEM(dspCodeType))
424 {
425 return TRUE; // Decoder in DEC-R2
426 }
427 else if (IS_AUDIO_DSP_CODE_TYPE_DEC_SYSTEM(dspCodeType)) //AU_DEC_SYSTEM
428 {
429 return TRUE; // Decoder in DEC-R2
430 }
431 else if ((IS_AUDIO_DSP_CODE_TYPE_DEC2_SYSTEM(dspCodeType)) ||
432 (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType)) ||
433 (IS_AUDIO_DSP_CODE_TYPE_SIF(dspCodeType)) ||
434 (IS_AUDIO_DSP_CODE_TYPE_ADVSND(dspCodeType)) ||
435 (IS_AUDIO_DSP_CODE_TYPE_SE_ENC(dspCodeType)))
436 {
437 for (ii=0; ii< sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO);ii++)
438 {
439 if (dspCodeType == dsp_info[ii].dspCodeType)
440 break;
441 }
442 if (ii < (sizeof(dsp_info)/sizeof(AUDIO_ALG_INFO)))
443 {
444 pau_info = &dsp_info[ii];
445 DSP_select = DSP_SE;
446 }
447 else
448 {
449 DBG_AUDSP_LOAD(" [dsp_info]:decoder type not found.\r\n");
450 return FALSE;
451 }
452 }
453 else
454 {
455 DBG_AUDSP_LOAD(" [HAL_AUDSP_DspLoadCode]:====== Loading the wrong DSP code type!======\r\n");
456 return FALSE;
457 }
458
459 #ifndef MSOS_TYPE_NUTTX
460 AUDIO_TEE_INFO_SHM_CHECK_NULL;
461 REE_TO_TEE_MBX_MSG_SET_PARAM(0, (dspCodeType&0xFF));
462 REE_TO_TEE_MBX_MSG_SET_PARAM(1, ((dspCodeType&0xFF00)>>8));
463 REE_TO_TEE_MBX_MSG_SET_PARAM_COUNT(2);
464 msg_type = REE_TO_TEE_MBX_MSG_HAL_AUDSP_DspLoadCode;
465 if (DSP_select == DSP_DEC)
466 {
467 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_DEC;
468 }
469 else if (DSP_select == DSP_SE)
470 {
471 msg_type = msg_type | REE_TO_TEE_MBX_MSG_TYPE_SE;
472 }
473
474 if ( TEE_TO_REE_MBX_ACK_MSG_NO_TEE != (mbx_msg_ack_status = HAL_AUDIO_SendMBXMsg(msg_type)))
475 {
476 if (mbx_msg_ack_status != TEE_TO_REE_MBX_ACK_MSG_ACTION_SUCCESS)
477 return FALSE;
478 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
479 return TRUE;
480 }
481 #endif
482
483 if(pau_info->cm_len == 0)
484 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
485 HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
486
487 if(DSP_select == DSP_DEC) // IDMA switch
488 {
489 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
490 }
491 else
492 {
493 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
494 }
495
496 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
497 {
498 pau_info->cm_addr = 0x0008;
499 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
500 pau_info->cm_buf = (mst_codec_pm1+ 30);
501 }
502
503 // Download PM of Algorithm
504 DBG_AUDSP_LOAD(" PM addr: 0x%x\r\n", pau_info->pm_addr);
505 #if defined (__aarch64__)
506 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->pm_buf);
507 #else
508 DBG_AUDSP_LOAD(" PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->pm_buf);
509 #endif
510 DBG_AUDSP_LOAD(" PM size: 0x%x\r\n",pau_info->pm_len);
511
512 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
513 return FALSE;
514 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select))
515 return FALSE;
516
517 DBG_AUDSP_LOAD(" CM addr: 0x%x\r\n", pau_info->cm_addr);
518 #if defined (__aarch64__)
519 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cm_buf);
520 #else
521 DBG_AUDSP_LOAD(" CM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cm_buf);
522 #endif
523 DBG_AUDSP_LOAD(" CM size: 0x%x\r\n", pau_info->cm_len);
524
525 if(!HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
526 return FALSE;
527 if(!HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select))
528 return FALSE;
529
530 // Download PM of PreFetch
531 if(pau_info->prefetch_len != 0)
532 {
533 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%x\r\n", pau_info->prefetch_addr);
534 #if defined (__aarch64__)
535 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->prefetch_buf);
536 #else
537 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->prefetch_buf);
538 #endif
539 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%x\r\n", pau_info->prefetch_len);
540
541 MIU_addr = pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
542 DBG_AUDSP_LOAD(" MIU of PreFetch: 0x%08X\r\n", MIU_addr);
543 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->prefetch_buf)), pau_info->prefetch_len);
544 }
545
546 // Download PM of Cache
547 if(pau_info->cache_len != 0)
548 {
549 DBG_AUDSP_LOAD(" Cache PM addr: 0x%x\r\n", pau_info->cache_addr);
550 #if defined (__aarch64__)
551 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cache_buf);
552 #else
553 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cache_buf);
554 #endif
555 DBG_AUDSP_LOAD(" Cache PM size: 0x%x\r\n", pau_info->cache_len);
556
557 MIU_addr = pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
558 DBG_AUDSP_LOAD(" MIU of Cache: 0x%08X\r\n", MIU_addr);
559 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((pau_info->cache_buf)), pau_info->cache_len);
560 }
561
562 // Load SE-DSP system code
563 if (IS_AUDIO_DSP_CODE_TYPE_SE_SYSTEM(dspCodeType))
564 {
565 #if ASND_R2_SUPPORT
566 HAL_AUR2_WriteByte(REG_SNDR2_RESET_CTRL, 0x00); // STOP SND-R2
567 HAL_AUR2_WriteMaskReg(REG_SNDR2_SYSTEM_START, 0xFFFF, 0x0000); //clear SND-R2 start cmd register
568 #endif
569 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear SE-DSP start cmd register
570 AUDIO_DELAY1MS(1);
571
572 #ifdef CONFIG_MBOOT
573 //============ Load R2 code ===============
574 // Memory sequence : Mboot-R2(DEC-R2)
575 //====================================
576
577 // Load DEC-R2
578 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
579
580 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
581 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
582 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
583 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
584 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
585 HAL_DEC_R2_init_SHM_param();
586 AUDIO_DELAY1MS(1);
587 MsOS_FlushMemory();
588
589 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
590 #else
591 //============ Load R2 code ===============
592 // Memory sequence : DEC-R2 ==> SND-R2 ==> SE-DSP
593 //====================================
594
595 // Load DEC-R2
596 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV);
597
598 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_codec_r2)), DEC_R2_SHM_DDR_OFFSET);
599 memset((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE), 0, ADEC__R2_DDR_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
600 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
601 (void*)(mst_codec_r2+DEC_R2_SHM_DDR_OFFSET+DEC_R2_SHM_DDR_SIZE),
602 MST_CODEC_R2_AUDIO_SIZE - DEC_R2_SHM_DDR_OFFSET - DEC_R2_SHM_DDR_SIZE);
603 HAL_DEC_R2_init_SHM_param();
604 AUDIO_DELAY1MS(1);
605 MsOS_FlushMemory();
606 #if ASND_R2_SUPPORT
607 // Load SND-R2
608 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(DSP_ADV)+ADEC__R2_DDR_SIZE;
609 memcpy((void*)(MS_PA2KSEG1(MIU_addr)), (void*)((mst_snd_r2)), SND_R2_SHM_DDR_OFFSET);
610 memset((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE), 0, ASND__R2_DDR_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
611 memcpy((void*)(MS_PA2KSEG1(MIU_addr)+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
612 (void*)(mst_snd_r2+SND_R2_SHM_DDR_OFFSET+SND_R2_SHM_DDR_SIZE),
613 MST_SND_R2_AUDIO_SIZE - SND_R2_SHM_DDR_OFFSET - SND_R2_SHM_DDR_SIZE);
614 AUDIO_DELAY1MS(1);
615 MsOS_FlushMemory();
616
617 HAL_SND_R2_EnableR2(TRUE); // Enable SND-R2 after load R2 code
618 #endif
619 HAL_DEC_R2_EnableR2(TRUE); // Enable DEC-R2 after load R2 code
620 #endif
621
622 if(!HAL_AUDSP_DspLoadCodeSegment(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
623 if(!HAL_AUDSP_DspVerifySegmentCode(0x0001, mst_codec_pm1+6+3, 21, DSP_select)) return FALSE;
624 if(!HAL_AUDSP_DspLoadCodeSegment(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
625 if(!HAL_AUDSP_DspVerifySegmentCode(0x0000, mst_codec_pm1+6, 3, DSP_select)) return FALSE;
626 }
627
628 MsOS_FlushMemory();
629
630 HAL_AUDSP_SetDspCodeTypeLoaded(dspCodeType);
631 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadCode finished(type=%s(0x%x))\r\n", pau_info->AlgName, dspCodeType);
632
633 return TRUE;
634 }
635
HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select,void * info)636 MS_BOOL HAL_AUDSP_DspLoadCode2(MS_U8 DSP_select, void * info)
637 {
638 MS_PHY MIU_addr;
639 AUDIO_ALG_INFO * pau_info = (AUDIO_ALG_INFO *) info;
640
641 if ( pau_info->cm_len == 0 )
642 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
643
644 // HALAUDSP_ERROR ("@@@@@@@@@@ ====== %s: %s start ======\r\n", __FUNCTION__, pau_info->AlgName);
645
646 //HAL_AUDSP_SetDspLoadCodeInfo(pau_info, DSP_select);
647
648 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, ((DSP_select == DSP_DEC) ? 0x00 : 0x01));
649
650 /* Download PM of Algorithm */
651 DBG_AUDSP_LOAD(" PM addr: 0x%x\r\n", pau_info->pm_addr);
652 #if defined (__aarch64__)
653 DBG_AUDSP_LOAD(" PM buf addr: 0x%lx\r\n", (MS_VIRT) pau_info->pm_buf);
654 #else
655 DBG_AUDSP_LOAD(" PM buf addr: 0x%x\r\n", (MS_VIRT) pau_info->pm_buf);
656 #endif
657 DBG_AUDSP_LOAD(" PM size: 0x%x\r\n", pau_info->pm_len);
658
659 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
660 {
661 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Fail !!\r\n");
662 return FALSE;
663 }
664
665 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->pm_addr, pau_info->pm_buf, pau_info->pm_len, DSP_select) )
666 {
667 HALAUDSP_ERROR ("Dsp ReLoad Code PM Segment Verify Fail !!\r\n");
668 return FALSE;
669 }
670
671 DBG_AUDSP_LOAD(" CM addr: 0x%x\r\n", pau_info->cm_addr);
672 #if defined (__aarch64__)
673 DBG_AUDSP_LOAD(" CM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cm_buf);
674 #else
675 DBG_AUDSP_LOAD(" CM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cm_buf);
676 #endif
677 DBG_AUDSP_LOAD(" CM size: 0x%x\r\n", pau_info->cm_len);
678
679 if ( !HAL_AUDSP_DspLoadCodeSegment(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
680 {
681 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Fail !!\r\n");
682 return FALSE;
683 }
684
685 if ( !HAL_AUDSP_DspVerifySegmentCode(pau_info->cm_addr, pau_info->cm_buf, pau_info->cm_len, DSP_select) )
686 {
687 HALAUDSP_ERROR ("Dsp ReLoad Code CM Segment Verify Fail !!\r\n");
688 return FALSE;
689 }
690
691 /* Download PM of PreFetch */
692 if ( pau_info->prefetch_len != 0 )
693 {
694 DBG_AUDSP_LOAD(" PreFetch PM addr: 0x%x\r\n", pau_info->prefetch_addr);
695 #if defined (__aarch64__)
696 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->prefetch_buf);
697 #else
698 DBG_AUDSP_LOAD(" PreFetch PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->prefetch_buf);
699 #endif
700 DBG_AUDSP_LOAD(" PreFetch PM size: 0x%x\r\n", pau_info->prefetch_len);
701
702 MIU_addr = (MS_PHY) pau_info->prefetch_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
703 HALAUDSP_ERROR (" MIU of PreFetch: 0x%X\r\n", (unsigned int) MIU_addr);
704
705 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->prefetch_buf)), pau_info->prefetch_len);
706 }
707
708 /* Download PM of Cache */
709 if ( pau_info->cache_len != 0 )
710 {
711 DBG_AUDSP_LOAD(" Cache PM addr: 0x%x\r\n", pau_info->cache_addr);
712 #if defined (__aarch64__)
713 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%lx\r\n", (MS_VIRT)pau_info->cache_buf);
714 #else
715 DBG_AUDSP_LOAD(" Cache PM buf addr: 0x%x\r\n", (MS_VIRT)pau_info->cache_buf);
716 #endif
717 DBG_AUDSP_LOAD(" Cache PM size: 0x%x\r\n", pau_info->cache_len);
718
719 MIU_addr = (MS_U32)pau_info->cache_addr * 3 + HAL_AUDIO_GetDspMadBaseAddr(DSP_select);
720 DBG_AUDSP_LOAD(" MIU of Cache: 0x%X\r\n", MIU_addr);
721
722 memcpy((void *)(MS_PA2KSEG1(MIU_addr)), (void *)((pau_info->cache_buf)), pau_info->cache_len);
723 }
724
725 MsOS_FlushMemory();
726
727 DBG_AUDSP_LOAD("DSP %s finished (type=%s)\r\n", ((DSP_select == DSP_DEC) ? "DEC" : "SND"), pau_info->AlgName);
728
729 return TRUE;
730 }
731
HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select,AUDIO_ALG_INFO * pau_info)732 MS_BOOL HAL_AUDSP_DspLoadSystemCode2(MS_U8 DSP_select, AUDIO_ALG_INFO * pau_info)
733 {
734 MS_U8 * dsp_bootcode;
735 #ifndef CONFIG_MBOOT
736 MS_PHY MIU_addr;
737 #endif
738
739 if ( pau_info->cm_len == 0 )
740 {
741 return TRUE; // Return if CM length = 0 (BDMA can't support 0 length)
742 }
743
744 dsp_bootcode = pau_info->cm_buf;
745
746 pau_info->cm_addr = 0x0008;
747 pau_info->cm_len = (MST_CODEC_PM1_SIZE - 24);
748 pau_info->cm_buf = (mst_codec_pm1 + 30);
749
750 if ( !HAL_AUDSP_DspLoadCode2(DSP_select, pau_info) )
751 {
752 return FALSE;
753 }
754
755 if ( DSP_select == DSP_SE )
756 {
757 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000);
758 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x00); //Stop R2
759 HAL_AUDIO_WriteMaskReg(0x2E9E, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
760 HAL_AUDIO_WriteMaskReg(0x2DDC, 0xFFFF, 0x0000); //clear R2 & SE-DSP start cmd register
761 AUDIO_DELAY1MS(1);
762 #ifndef CONFIG_MBOOT
763 MIU_addr = HAL_AUDIO_GetDspMadBaseAddr(2);
764 memcpy((void *) (MS_PA2KSEG1 (MIU_addr)), (void *) ((mst_codec_r2)), MST_CODEC_R2_AUDIO_SIZE);
765 #endif
766 HAL_AUDIO_WriteMaskByte(REG_DECR2_RESET_CTRL, 0xFF, 0x27); //Eanble R2
767 }
768
769
770 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0001, dsp_bootcode + 3, 21, DSP_select) )
771 {
772 return FALSE;
773 }
774
775 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0001, dsp_bootcode + 3, 21, DSP_select) )
776 {
777 return FALSE;
778 }
779
780 if ( !HAL_AUDSP_DspLoadCodeSegment(0x0000, dsp_bootcode, 3, DSP_select) )
781 {
782 return FALSE;
783 }
784
785 if ( !HAL_AUDSP_DspVerifySegmentCode(0x0000, dsp_bootcode, 3, DSP_select) )
786 {
787 return FALSE;
788 }
789
790
791 MsOS_FlushMemory();
792
793 DBG_AUDSP_LOAD("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
794 printf("HAL_AUDSP_DspLoadSystemCode2 finished(type=%s)\r\n", pau_info->AlgName);
795
796 return TRUE;
797 }
798
799 ////////////////////////////////////////////////////////////////////////////////
800 /// @brief \b Function \b Name: HAL_AUDIO_DspLoadCodeSegment()
801 /// @brief \b Function \b Description: This routine is used to load DSP code
802 /// @param <IN> \b dsp_addr :
803 /// @param <IN> \b dspCode_buf :
804 /// @param <IN> \b dspCode_buflen :
805 /// @param <OUT> \b NONE :
806 /// @param <RET> \b BOOL : TRUE --DSP Load code okay
807 /// FALSE--DSP Load code fail
808 /// @param <GLOBAL> \b NONE :
809 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)810 MS_BOOL HAL_AUDSP_DspLoadCodeSegment(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
811 {
812 MS_U32 i,j;
813 MS_U32 idma_wrbase_addr_l, dsp_brg_data_l, dsp_brg_data_h, bdma_mode_addr;
814
815 HALAUDSP_CHECK_SHM_INIT;
816
817 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
818
819 g_bDSPLoadCode = TRUE;
820
821 if(DSP_select == DSP_DEC)
822 {
823 idma_wrbase_addr_l = REG_DEC_IDMA_WRBASE_ADDR_L;
824 dsp_brg_data_l = REG_DEC_DSP_BRG_DATA_L;
825 dsp_brg_data_h = REG_DEC_DSP_BRG_DATA_H;
826 bdma_mode_addr = REG_DEC_BDMA_CFG;
827 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
828 }
829 else
830 {
831 idma_wrbase_addr_l = REG_SE_IDMA_WRBASE_ADDR_L;
832 dsp_brg_data_l = REG_SE_DSP_BRG_DATA_L;
833 dsp_brg_data_h = REG_SE_DSP_BRG_DATA_H;
834 bdma_mode_addr = REG_SE_BDMA_CFG;
835 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
836 }
837
838 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma
839
840 if(dspCode_buflen>0)
841 {
842 /* set iDMA addr */
843
844 HAL_AUDIO_WriteReg(idma_wrbase_addr_l, dsp_addr);
845
846 AUDIO_DELAY1MS(1);
847
848 for( i=0; i<dspCode_buflen; i+=3)
849 {
850 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i+1));
851 HAL_AUDIO_WriteByte(dsp_brg_data_h,*(dspCode_buf+i+2));
852
853 for(j=0;j<2;j++);//for delay only
854
855 HAL_AUDIO_WriteByte(dsp_brg_data_l,*(dspCode_buf+i));
856 HAL_AUDIO_WriteByte(dsp_brg_data_h,0x00);
857
858 if(DSP_select == DSP_DEC)
859 {
860 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
861 {
862 g_bDSPLoadCode = FALSE;
863
864 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
865
866 return FALSE;
867 }
868 }
869 else
870 {
871 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_WRITE_RDY)==FALSE)
872 {
873 g_bDSPLoadCode = FALSE;
874
875 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
876
877 return FALSE;
878 }
879 }
880 }
881 }
882
883 g_bDSPLoadCode = FALSE;
884
885 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
886
887 return TRUE;
888 }
889
HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr,MS_U8 * dspCode_buf,MS_U32 dspCode_buflen,MS_U8 DSP_select)890 MS_BOOL HAL_AUDSP_DspVerifySegmentCode(MS_U32 dsp_addr, MS_U8 *dspCode_buf, MS_U32 dspCode_buflen, MS_U8 DSP_select)
891 {
892 MS_U32 i;
893 MS_U8 dat[3];
894 MS_U32 idma_rdbase_addr_l, idma_ctrl0, idma_rddata_h_0, idma_rddata_h_1, idma_rddata_l, bdma_mode_addr;
895
896 #if (DSP_VERIFY_DSP_CODE==0)
897 return TRUE; //don't verify just return;
898 #endif
899
900 HALAUDSP_CHECK_SHM_INIT;
901
902 OS_OBTAIN_MUTEX(_s32AUDIOMutexIDMA, MSOS_WAIT_FOREVER);
903
904 g_bDSPLoadCode = TRUE;
905
906 if ( DSP_select == DSP_DEC )
907 {
908 idma_rdbase_addr_l = REG_DEC_IDMA_RDBASE_ADDR_L;
909 idma_ctrl0 = REG_DEC_IDMA_CTRL0;
910 idma_rddata_h_0 = REG_DEC_IDMA_RDDATA_H_0;
911 idma_rddata_h_1 = REG_DEC_IDMA_RDDATA_H_1;
912 idma_rddata_l = REG_DEC_IDMA_RDDATA_L;
913 bdma_mode_addr = REG_DEC_BDMA_CFG;
914 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x00);
915 }
916 else
917 {
918 idma_rdbase_addr_l = REG_SE_IDMA_RDBASE_ADDR_L;
919 idma_ctrl0 = REG_SE_IDMA_CTRL0;
920 idma_rddata_h_0 = REG_SE_IDMA_RDDATA_H_0;
921 idma_rddata_h_1 = REG_SE_IDMA_RDDATA_H_1;
922 idma_rddata_l = REG_SE_IDMA_RDDATA_L;
923 bdma_mode_addr = REG_SE_BDMA_CFG;
924 HAL_AUDIO_WriteMaskByte(REG_FD230_SELECT, 0x01, 0x01);
925 }
926
927 //HAL_AUDIO_WriteMaskByte(0x3CEC, 0x40, 0x00);
928 HAL_AUDIO_WriteMaskReg(bdma_mode_addr, 0x8080, 0x0000); // disable bdma (enable idma)
929 HAL_AUDIO_WriteReg(idma_rdbase_addr_l, dsp_addr);
930 AUDIO_DELAY1MS(1);
931
932 for (i=0; i<dspCode_buflen; i+=3)
933 {
934 HAL_AUDIO_WriteMaskByte(idma_ctrl0, 0x08, 0x08 );
935 #if (DSP_IDMA_CHK_READY == 1)
936 if(DSP_select == DSP_DEC)
937 {
938 if (HAL_AUDSP_CheckDecIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
939 {
940 g_bDSPLoadCode = FALSE;
941
942 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
943
944 return FALSE;
945 }
946 }
947 else
948 {
949 if (HAL_AUDSP_CheckSeIdmaReady(AUD_CHK_DSP_READ_RDY)==FALSE)
950 {
951 g_bDSPLoadCode = FALSE;
952
953 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
954
955 return FALSE;
956 }
957 }
958 #endif
959 dat[1] = HAL_AUDIO_ReadByte(idma_rddata_h_0);
960 dat[2] = HAL_AUDIO_ReadByte(idma_rddata_h_1);
961 dat[0] = HAL_AUDIO_ReadByte(idma_rddata_l);
962
963 //printf("@@%x\n", (dat[2] << 16) | (dat[1] << 8) | (dat[0]));
964
965 if ( (dat[0]!=dspCode_buf[i]) || (dat[1]!=dspCode_buf[i+1]) ||
966 (dat[2]!=dspCode_buf[i+2]))
967 {
968 printf("check data %x\n", (unsigned int)i);
969 printf("dat0 %X <===> ",dspCode_buf[i]);
970 printf("%x \n", dat[0]);
971 printf("dat1 %X <===> ",dspCode_buf[i+1]);
972 printf("%x \n", dat[1]);
973 printf("dat2 %x <===> ",dspCode_buf[i+2]);
974 printf("%X \n", dat[2]);
975 printf(" Dsp code verify error!!\r\n");
976
977 g_bDSPLoadCode = FALSE;
978
979 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
980
981 return FALSE;
982 }
983 }
984
985 DBG_AUDSP(" Dsp code verify ok!!\n\r");
986
987 g_bDSPLoadCode = FALSE;
988
989 OS_RELEASE_MUTEX(_s32AUDIOMutexIDMA);
990
991 return TRUE;
992 }
993
994 ////////////////////////////////////////////////////////////////////////////////
995 /// @brief \b Function \b Name: HAL_AUDSP_CheckDecIdmaReady()
996 /// @brief \b Function \b Description: This routine is used to check if the Dec-DSP IDMA is ready or not.
997 /// @param <IN> \b IdmaChk_type :
998 /// 0x10 : check write ready
999 /// 0x80 : check read ready
1000 /// @param <OUT> \b NONE :
1001 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1002 /// FALSE--IDMA not ready
1003 /// @param <GLOBAL> \b NONE :
1004 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type)1005 MS_BOOL HAL_AUDSP_CheckDecIdmaReady(MS_U8 u8IdmaChk_type )
1006 {
1007 MS_U8 j = 0;
1008
1009 while(j<200)
1010 {
1011 j++;
1012 if( (HAL_AUDIO_ReadByte(REG_DEC_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1013 return TRUE;
1014 }
1015
1016 DBG_AUDSP_ERROR("DSP DEC Idma check ready fail!(%d)\r\n",j);
1017 return FALSE;
1018 }
1019
1020 ////////////////////////////////////////////////////////////////////////////////
1021 /// @brief \b Function \b Name: HAL_AUDIO_CheckSeIdmaReady()
1022 /// @brief \b Function \b Description: This routine is used to check if the Se-DSP IDMA is ready or not.
1023 /// @param <IN> \b IdmaChk_type :
1024 /// 0x10 : check write ready
1025 /// 0x80 : check read ready
1026 /// @param <OUT> \b NONE :
1027 /// @param <RET> \b MS_BOOL : TRUE--IDMA is ready
1028 /// FALSE--IDMA not ready
1029 /// @param <GLOBAL> \b NONE :
1030 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)1031 MS_BOOL HAL_AUDSP_CheckSeIdmaReady(MS_U8 u8IdmaChk_type)
1032 {
1033 MS_U8 j = 0;
1034
1035 while(j<200)
1036 {
1037 j++;
1038 if( (HAL_AUDIO_ReadByte(REG_SE_IDMA_CTRL0)& u8IdmaChk_type) == 0 )
1039 return TRUE;
1040 }
1041
1042 DBG_AUDSP_ERROR("DSP SE Idma check ready fail!(%d)\r\n",j);
1043 return FALSE;
1044 }
1045
1046 ////////////////////////////////////////////////////////////////////////////////
1047 /// @brief \b Function \b Name: HAL_AUDSP_SetDspCodeTypeLoaded()
1048 /// @brief \b Function \b Description: This function is used to set the DSP code type.
1049 /// @param <IN> \b NONE :
1050 /// @param <OUT> \b NONE :
1051 /// @param <RET> \b MS_U8: DSP code type.
1052 /// @param <GLOBAL> \b NONE :
1053 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)1054 void HAL_AUDSP_SetDspCodeTypeLoaded(MS_U8 u8Type)
1055 {
1056 g_u8DspCodeTypeLoaded=u8Type;
1057 }
1058
1059 ////////////////////////////////////////////////////////////////////////////////
1060 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1061 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1062 /// @param <IN> \b NONE :
1063 /// @param <OUT> \b NONE :
1064 /// @param <RET> \b MS_U8: DSP code type.
1065 /// @param <GLOBAL> \b NONE :
1066 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspCodeTypeLoaded(void)1067 MS_U8 HAL_AUDSP_GetDspCodeTypeLoaded(void)
1068 {
1069 return g_u8DspCodeTypeLoaded;
1070 }
1071
HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO * pau_info,MS_U8 DSP_select)1072 void HAL_AUDSP_SetDspLoadCodeInfo(AUDIO_ALG_INFO *pau_info, MS_U8 DSP_select)
1073 {
1074 g_loadcodeinfo.pau_info = pau_info;
1075 g_loadcodeinfo.DSP_select= DSP_select;
1076 }
1077
1078 ////////////////////////////////////////////////////////////////////////////////
1079 /// @brief \b Function \b Name: HAL_AUDSP_GetDspCodeTypeLoaded()
1080 /// @brief \b Function \b Description: This function is used to get the MAD base address.
1081 /// @param <IN> \b NONE :
1082 /// @param <OUT> \b NONE :
1083 /// @param <RET> \b MS_U8: DSP code type.
1084 /// @param <GLOBAL> \b NONE :
1085 ////////////////////////////////////////////////////////////////////////////////
HAL_AUDSP_GetDspLoadCodeInfo(void)1086 LOAD_CODE_INFO* HAL_AUDSP_GetDspLoadCodeInfo(void)
1087 {
1088 return &g_loadcodeinfo;
1089 }
1090