1*437bfbebSnyanmisaka /* SPDX-License-Identifier: Apache-2.0 */ 2*437bfbebSnyanmisaka /* 3*437bfbebSnyanmisaka * Copyright (c) 2025 Rockchip Electronics Co., Ltd. 4*437bfbebSnyanmisaka */ 5*437bfbebSnyanmisaka 6*437bfbebSnyanmisaka #ifndef __OSD3_TEST_H__ 7*437bfbebSnyanmisaka #define __OSD3_TEST_H__ 8*437bfbebSnyanmisaka 9*437bfbebSnyanmisaka #include "rk_venc_cmd.h" 10*437bfbebSnyanmisaka 11*437bfbebSnyanmisaka #define SMPTE_BAR_CNT (8) 12*437bfbebSnyanmisaka #define OSD_PATTERN_WIDTH (128) 13*437bfbebSnyanmisaka #define OSD_PATTERN_HEIGHT (128) 14*437bfbebSnyanmisaka 15*437bfbebSnyanmisaka typedef enum RangeTransMode_e { 16*437bfbebSnyanmisaka FULL_TO_LIMIT = 0, 17*437bfbebSnyanmisaka LIMIT_TO_FULL = 1, 18*437bfbebSnyanmisaka } RangeTransMode; 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka typedef enum OsdQPAdjustMode_e { 21*437bfbebSnyanmisaka QP_RELATIVE = 0, 22*437bfbebSnyanmisaka QP_ABSOLUTE, 23*437bfbebSnyanmisaka } OsdQPAdjustMode; 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka typedef enum OsdAlphaSource_e { 26*437bfbebSnyanmisaka FROM_DDR = 0, 27*437bfbebSnyanmisaka FROM_LUT, 28*437bfbebSnyanmisaka FROM_REG 29*437bfbebSnyanmisaka } OsdAlphaSource; 30*437bfbebSnyanmisaka 31*437bfbebSnyanmisaka /** 32*437bfbebSnyanmisaka * @brief Format translation mode select 33*437bfbebSnyanmisaka * 0 -- average a 2x2 block 34*437bfbebSnyanmisaka * 1 -- drop, 35*437bfbebSnyanmisaka */ 36*437bfbebSnyanmisaka typedef enum DownscaleMode_t { 37*437bfbebSnyanmisaka AVERAGE, 38*437bfbebSnyanmisaka DROP 39*437bfbebSnyanmisaka } DownsampleMode; 40*437bfbebSnyanmisaka typedef enum OsdTestCase_e { 41*437bfbebSnyanmisaka OSD_CASE_FMT_ARGB8888 = 0, 42*437bfbebSnyanmisaka OSD_CASE_FMT_RGBA8888, 43*437bfbebSnyanmisaka OSD_CASE_FMT_BGRA8888, 44*437bfbebSnyanmisaka OSD_CASE_FMT_ABGR8888, 45*437bfbebSnyanmisaka OSD_CASE_FMT_ARGB1555, 46*437bfbebSnyanmisaka OSD_CASE_FMT_ABGR1555, 47*437bfbebSnyanmisaka OSD_CASE_FMT_RGBA5551, 48*437bfbebSnyanmisaka OSD_CASE_FMT_BGRA5551, 49*437bfbebSnyanmisaka OSD_CASE_FMT_ARGB4444, 50*437bfbebSnyanmisaka OSD_CASE_FMT_ABGR4444, 51*437bfbebSnyanmisaka OSD_CASE_FMT_RGBA4444, 52*437bfbebSnyanmisaka OSD_CASE_FMT_BGRA4444, 53*437bfbebSnyanmisaka OSD_CASE_FMT_AYUV2BPP, 54*437bfbebSnyanmisaka OSD_CASE_FMT_AYUV1BPP, 55*437bfbebSnyanmisaka OSD_CASE_FG_ALPAH_SEL, 56*437bfbebSnyanmisaka OSD_CASE_CH_DS_MODE, 57*437bfbebSnyanmisaka OSD_CASE_RANGE_TRNS_SEL, 58*437bfbebSnyanmisaka OSD_CASE_MAX_REGINON_NUM, 59*437bfbebSnyanmisaka OSD_CASE_BUTT, 60*437bfbebSnyanmisaka } OsdTestCase; 61*437bfbebSnyanmisaka 62*437bfbebSnyanmisaka typedef enum OsdFmt_e { 63*437bfbebSnyanmisaka OSD_FMT_ARGB8888 = 0, 64*437bfbebSnyanmisaka OSD_FMT_RGBA8888, 65*437bfbebSnyanmisaka OSD_FMT_BGRA8888, 66*437bfbebSnyanmisaka OSD_FMT_ABGR8888, 67*437bfbebSnyanmisaka OSD_FMT_ARGB1555, 68*437bfbebSnyanmisaka OSD_FMT_ABGR1555, 69*437bfbebSnyanmisaka OSD_FMT_RGBA5551, 70*437bfbebSnyanmisaka OSD_FMT_BGRA5551, 71*437bfbebSnyanmisaka OSD_FMT_ARGB4444, 72*437bfbebSnyanmisaka OSD_FMT_ABGR4444, 73*437bfbebSnyanmisaka OSD_FMT_RGBA4444, 74*437bfbebSnyanmisaka OSD_FMT_BGRA4444, 75*437bfbebSnyanmisaka OSD_FMT_AYUV2BPP, 76*437bfbebSnyanmisaka OSD_FMT_AYUV1BPP, 77*437bfbebSnyanmisaka OSD_FMT_BUTT, 78*437bfbebSnyanmisaka } OsdFmt; 79*437bfbebSnyanmisaka 80*437bfbebSnyanmisaka typedef struct OsdCaseCfg_t { 81*437bfbebSnyanmisaka OsdTestCase type; 82*437bfbebSnyanmisaka OsdFmt fmt; 83*437bfbebSnyanmisaka char name[100]; 84*437bfbebSnyanmisaka MPP_RET (*func)(MppEncOSDData3 *osd_data); 85*437bfbebSnyanmisaka } OsdCaseCfg; 86*437bfbebSnyanmisaka 87*437bfbebSnyanmisaka MPP_RET osd3_gen_smpte_bar_argb(RK_U8 **dst); 88*437bfbebSnyanmisaka MPP_RET osd3_get_test_case(MppEncOSDData3 *osd_data, RK_U8 *base_pattern, 89*437bfbebSnyanmisaka RK_U32 case_idx, KmppBuffer *osd_buffer); 90*437bfbebSnyanmisaka #endif /* __OSD3_TEST_H__ */ 91