1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __MPP_RGA_H__ 18*437bfbebSnyanmisaka #define __MPP_RGA_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka /* NOTE: RGA support sync mode and async mode. We use sync mode only. */ 21*437bfbebSnyanmisaka #define RGA_BLIT_SYNC 0x5017 22*437bfbebSnyanmisaka #define RGA_BLIT_ASYNC 0x5018 23*437bfbebSnyanmisaka #define RGA_FLUSH 0x5019 24*437bfbebSnyanmisaka #define RGA_GET_RESULT 0x501a 25*437bfbebSnyanmisaka 26*437bfbebSnyanmisaka typedef enum RgaFormat_e { 27*437bfbebSnyanmisaka RGA_FMT_RGBA_8888 = 0x0, 28*437bfbebSnyanmisaka RGA_FMT_RGBX_8888 = 0x1, 29*437bfbebSnyanmisaka RGA_FMT_RGB_888 = 0x2, 30*437bfbebSnyanmisaka RGA_FMT_BGRA_8888 = 0x3, 31*437bfbebSnyanmisaka RGA_FMT_RGB_565 = 0x4, 32*437bfbebSnyanmisaka RGA_FMT_RGBA_5551 = 0x5, 33*437bfbebSnyanmisaka RGA_FMT_RGBA_4444 = 0x6, 34*437bfbebSnyanmisaka RGA_FMT_BGR_888 = 0x7, 35*437bfbebSnyanmisaka 36*437bfbebSnyanmisaka RGA_FMT_YCbCr_422_SP = 0x8, 37*437bfbebSnyanmisaka RGA_FMT_YCbCr_422_P = 0x9, 38*437bfbebSnyanmisaka RGA_FMT_YCbCr_420_SP = 0xa, 39*437bfbebSnyanmisaka RGA_FMT_YCbCr_420_P = 0xb, 40*437bfbebSnyanmisaka 41*437bfbebSnyanmisaka RGA_FMT_YCrCb_422_SP = 0xc, 42*437bfbebSnyanmisaka RGA_FMT_YCrCb_422_P = 0xd, 43*437bfbebSnyanmisaka RGA_FMT_YCrCb_420_SP = 0xe, 44*437bfbebSnyanmisaka RGA_FMT_YCrCb_420_P = 0xf, 45*437bfbebSnyanmisaka 46*437bfbebSnyanmisaka RGA_FMT_BPP1 = 0x10, 47*437bfbebSnyanmisaka RGA_FMT_BPP2 = 0x11, 48*437bfbebSnyanmisaka RGA_FMT_BPP4 = 0x12, 49*437bfbebSnyanmisaka RGA_FMT_BPP8 = 0x13, 50*437bfbebSnyanmisaka RGA_FMT_BUTT, 51*437bfbebSnyanmisaka } RgaFormat; 52*437bfbebSnyanmisaka 53*437bfbebSnyanmisaka typedef struct RgaImg_t { 54*437bfbebSnyanmisaka RK_ULONG yrgb_addr; /* yrgb addr */ 55*437bfbebSnyanmisaka RK_ULONG uv_addr; /* cb/cr addr */ 56*437bfbebSnyanmisaka RK_ULONG v_addr; /* cr addr */ 57*437bfbebSnyanmisaka RK_U32 format; // definition by RgaFormat 58*437bfbebSnyanmisaka 59*437bfbebSnyanmisaka RK_U16 act_w; // width 60*437bfbebSnyanmisaka RK_U16 act_h; // height 61*437bfbebSnyanmisaka RK_U16 x_offset; // offset from left 62*437bfbebSnyanmisaka RK_U16 y_offset; // offset from top 63*437bfbebSnyanmisaka 64*437bfbebSnyanmisaka RK_U16 vir_w; // horizontal stride 65*437bfbebSnyanmisaka RK_U16 vir_h; // vertical stride 66*437bfbebSnyanmisaka 67*437bfbebSnyanmisaka RK_U16 endian_mode; // for BPP 68*437bfbebSnyanmisaka RK_U16 alpha_swap; 69*437bfbebSnyanmisaka } RgaImg; 70*437bfbebSnyanmisaka 71*437bfbebSnyanmisaka typedef struct RgaRect_t { 72*437bfbebSnyanmisaka RK_U16 xmin; 73*437bfbebSnyanmisaka RK_U16 xmax; 74*437bfbebSnyanmisaka RK_U16 ymin; 75*437bfbebSnyanmisaka RK_U16 ymax; 76*437bfbebSnyanmisaka } RgaRect; 77*437bfbebSnyanmisaka 78*437bfbebSnyanmisaka typedef struct RgaPoint_t { 79*437bfbebSnyanmisaka RK_U16 x; 80*437bfbebSnyanmisaka RK_U16 y; 81*437bfbebSnyanmisaka } RgaPoint; 82*437bfbebSnyanmisaka 83*437bfbebSnyanmisaka typedef struct RgaColorFill_t { 84*437bfbebSnyanmisaka RK_S16 gr_x_a; 85*437bfbebSnyanmisaka RK_S16 gr_y_a; 86*437bfbebSnyanmisaka RK_S16 gr_x_b; 87*437bfbebSnyanmisaka RK_S16 gr_y_b; 88*437bfbebSnyanmisaka RK_S16 gr_x_g; 89*437bfbebSnyanmisaka RK_S16 gr_y_g; 90*437bfbebSnyanmisaka RK_S16 gr_x_r; 91*437bfbebSnyanmisaka RK_S16 gr_y_r; 92*437bfbebSnyanmisaka } RgaColorFill; 93*437bfbebSnyanmisaka 94*437bfbebSnyanmisaka typedef struct RgaLineDraw_t { 95*437bfbebSnyanmisaka RgaPoint start_point; 96*437bfbebSnyanmisaka RgaPoint end_point; 97*437bfbebSnyanmisaka RK_U32 color; 98*437bfbebSnyanmisaka RK_U32 flag; 99*437bfbebSnyanmisaka RK_U32 line_width; 100*437bfbebSnyanmisaka } RgaLineDraw; 101*437bfbebSnyanmisaka 102*437bfbebSnyanmisaka typedef struct RgaFading_t { 103*437bfbebSnyanmisaka RK_U8 b; 104*437bfbebSnyanmisaka RK_U8 g; 105*437bfbebSnyanmisaka RK_U8 r; 106*437bfbebSnyanmisaka RK_U8 res; 107*437bfbebSnyanmisaka } RgaFading; 108*437bfbebSnyanmisaka 109*437bfbebSnyanmisaka typedef struct RgaMmu_t { 110*437bfbebSnyanmisaka RK_U8 mmu_en; 111*437bfbebSnyanmisaka RK_ULONG base_addr; 112*437bfbebSnyanmisaka RK_U32 mmu_flag; 113*437bfbebSnyanmisaka } RgaMmu; 114*437bfbebSnyanmisaka 115*437bfbebSnyanmisaka // structure for userspace / kernel communication 116*437bfbebSnyanmisaka typedef struct RgaRequest_t { 117*437bfbebSnyanmisaka RK_U8 render_mode; 118*437bfbebSnyanmisaka 119*437bfbebSnyanmisaka RgaImg src; 120*437bfbebSnyanmisaka RgaImg dst; 121*437bfbebSnyanmisaka RgaImg pat; 122*437bfbebSnyanmisaka 123*437bfbebSnyanmisaka RK_ULONG rop_mask_addr; /* rop4 mask addr */ 124*437bfbebSnyanmisaka RK_ULONG LUT_addr; /* LUT addr */ 125*437bfbebSnyanmisaka 126*437bfbebSnyanmisaka RgaRect clip; /* dst clip window default value is dst_vir */ 127*437bfbebSnyanmisaka /* value from [0, w-1] / [0, h-1]*/ 128*437bfbebSnyanmisaka 129*437bfbebSnyanmisaka RK_S32 sina; /* dst angle default value 0 16.16 scan from table */ 130*437bfbebSnyanmisaka RK_S32 cosa; /* dst angle default value 0 16.16 scan from table */ 131*437bfbebSnyanmisaka 132*437bfbebSnyanmisaka /* alpha rop process flag */ 133*437bfbebSnyanmisaka /* ([0] = 1 alpha_rop_enable) */ 134*437bfbebSnyanmisaka /* ([1] = 1 rop enable) */ 135*437bfbebSnyanmisaka /* ([2] = 1 fading_enable) */ 136*437bfbebSnyanmisaka /* ([3] = 1 PD_enable) */ 137*437bfbebSnyanmisaka /* ([4] = 1 alpha cal_mode_sel) */ 138*437bfbebSnyanmisaka /* ([5] = 1 dither_enable) */ 139*437bfbebSnyanmisaka /* ([6] = 1 gradient fill mode sel) */ 140*437bfbebSnyanmisaka /* ([7] = 1 AA_enable) */ 141*437bfbebSnyanmisaka RK_U16 alpha_rop_flag; 142*437bfbebSnyanmisaka RK_U8 scale_mode; /* 0 nearst / 1 bilnear / 2 bicubic */ 143*437bfbebSnyanmisaka 144*437bfbebSnyanmisaka RK_U32 color_key_max; /* color key max */ 145*437bfbebSnyanmisaka RK_U32 color_key_min; /* color key min */ 146*437bfbebSnyanmisaka 147*437bfbebSnyanmisaka RK_U32 fg_color; /* foreground color */ 148*437bfbebSnyanmisaka RK_U32 bg_color; /* background color */ 149*437bfbebSnyanmisaka 150*437bfbebSnyanmisaka RgaColorFill gr_color; /* color fill use gradient */ 151*437bfbebSnyanmisaka 152*437bfbebSnyanmisaka RgaLineDraw line_draw_info; 153*437bfbebSnyanmisaka 154*437bfbebSnyanmisaka RgaFading fading; 155*437bfbebSnyanmisaka 156*437bfbebSnyanmisaka RK_U8 PD_mode; /* porter duff alpha mode sel */ 157*437bfbebSnyanmisaka RK_U8 alpha_global_value; /* global alpha value */ 158*437bfbebSnyanmisaka RK_U16 rop_code; /* rop2/3/4 code scan from rop code table*/ 159*437bfbebSnyanmisaka RK_U8 bsfilter_flag; /* [2] 0 blur 1 sharp / [1:0] filter_type*/ 160*437bfbebSnyanmisaka RK_U8 palette_mode; /* (enum) color palatte 0/1bpp, 1/2bpp 2/4bpp 3/8bpp */ 161*437bfbebSnyanmisaka RK_U8 yuv2rgb_mode; /* (enum) BT.601 MPEG / BT.601 JPEG / BT.709 */ 162*437bfbebSnyanmisaka RK_U8 endian_mode; 163*437bfbebSnyanmisaka 164*437bfbebSnyanmisaka /* (enum) rotate mode */ 165*437bfbebSnyanmisaka /* 0x0, no rotate */ 166*437bfbebSnyanmisaka /* 0x1, rotate */ 167*437bfbebSnyanmisaka /* 0x2, x_mirror */ 168*437bfbebSnyanmisaka /* 0x3, y_mirror */ 169*437bfbebSnyanmisaka RK_U8 rotate_mode; 170*437bfbebSnyanmisaka 171*437bfbebSnyanmisaka RK_U8 color_fill_mode; /* 0 solid color / 1 patten color */ 172*437bfbebSnyanmisaka 173*437bfbebSnyanmisaka RgaMmu mmu_info; /* mmu information */ 174*437bfbebSnyanmisaka 175*437bfbebSnyanmisaka /* ([0~1] alpha mode) */ 176*437bfbebSnyanmisaka /* ([2~3] rop mode) */ 177*437bfbebSnyanmisaka /* ([4] zero mode en) */ 178*437bfbebSnyanmisaka /* ([5] dst alpha mode) */ 179*437bfbebSnyanmisaka RK_U8 alpha_rop_mode; 180*437bfbebSnyanmisaka RK_U8 src_trans_mode; 181*437bfbebSnyanmisaka RK_U8 CMD_fin_int_enable; 182*437bfbebSnyanmisaka 183*437bfbebSnyanmisaka /* completion is reported through a callback */ 184*437bfbebSnyanmisaka void (*complete)(int retval); 185*437bfbebSnyanmisaka } RgaReq; 186*437bfbebSnyanmisaka 187*437bfbebSnyanmisaka #endif // __MPP_RGA_H__ 188