xref: /rockchip-linux_mpp/mpp/legacy/vpu_api_mlvec.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka  * Copyright 2020 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka  *
4*437bfbebSnyanmisaka  * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka  * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka  * You may obtain a copy of the License at
7*437bfbebSnyanmisaka  *
8*437bfbebSnyanmisaka  *      http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka  *
10*437bfbebSnyanmisaka  * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka  * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka  * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka  * limitations under the License.
15*437bfbebSnyanmisaka  */
16*437bfbebSnyanmisaka 
17*437bfbebSnyanmisaka #ifndef __VPU_API_MLVEC_H__
18*437bfbebSnyanmisaka #define __VPU_API_MLVEC_H__
19*437bfbebSnyanmisaka 
20*437bfbebSnyanmisaka #include "rk_mpi.h"
21*437bfbebSnyanmisaka 
22*437bfbebSnyanmisaka #define MLVEC_MAGIC                     'M'
23*437bfbebSnyanmisaka #define MLVEC_VERSION                   '0'
24*437bfbebSnyanmisaka 
25*437bfbebSnyanmisaka #define VPU_API_ENC_MAX_TID_UPDATED     (0x00000001)
26*437bfbebSnyanmisaka #define VPU_API_ENC_MARK_LTR_UPDATED    (0x00000002)
27*437bfbebSnyanmisaka #define VPU_API_ENC_USE_LTR_UPDATED     (0x00000004)
28*437bfbebSnyanmisaka #define VPU_API_ENC_FRAME_QP_UPDATED    (0x00000008)
29*437bfbebSnyanmisaka #define VPU_API_ENC_BASE_PID_UPDATED    (0x00000010)
30*437bfbebSnyanmisaka 
31*437bfbebSnyanmisaka typedef struct VpuApiMlvecStaticCfg_t {
32*437bfbebSnyanmisaka     RK_S16 width;
33*437bfbebSnyanmisaka     RK_S16 sar_width;
34*437bfbebSnyanmisaka     RK_S16 height;
35*437bfbebSnyanmisaka     RK_S16 sar_height;
36*437bfbebSnyanmisaka     RK_S32 rc_mode;                 /* 0 - CQP mode; 1 - CBR mode; */
37*437bfbebSnyanmisaka     RK_S32 bitRate;                 /* target bitrate */
38*437bfbebSnyanmisaka     RK_S32 framerate;
39*437bfbebSnyanmisaka     RK_S32 qp;
40*437bfbebSnyanmisaka     RK_S32 enableCabac;
41*437bfbebSnyanmisaka     RK_S32 cabacInitIdc;
42*437bfbebSnyanmisaka     RK_S32 format;
43*437bfbebSnyanmisaka     RK_S32 intraPicRate;
44*437bfbebSnyanmisaka     RK_S32 framerateout;
45*437bfbebSnyanmisaka     RK_S32 profileIdc;
46*437bfbebSnyanmisaka     RK_S32 levelIdc;
47*437bfbebSnyanmisaka 
48*437bfbebSnyanmisaka     RK_S32 magic;                   /* MLVEC magic word */
49*437bfbebSnyanmisaka     /* static configure */
50*437bfbebSnyanmisaka     RK_S32 max_tid      : 8;        /* max temporal layer id */
51*437bfbebSnyanmisaka     RK_S32 ltr_frames   : 8;        /* max long-term reference frame count */
52*437bfbebSnyanmisaka     RK_S32 hdr_on_idr   : 8;        /* sps/pps header with IDR frame */
53*437bfbebSnyanmisaka     RK_S32 add_prefix   : 8;        /* add prefix before each frame */
54*437bfbebSnyanmisaka     RK_S32 slice_mbs    : 16;       /* macroblock row count for each slice */
55*437bfbebSnyanmisaka     RK_S32 reserved     : 16;
56*437bfbebSnyanmisaka } VpuApiMlvecStaticCfg;
57*437bfbebSnyanmisaka 
58*437bfbebSnyanmisaka typedef struct VpuApiMlvecDynamicCfg_t {
59*437bfbebSnyanmisaka     /* dynamic configure */
60*437bfbebSnyanmisaka     RK_U32 updated;
61*437bfbebSnyanmisaka     RK_S32 max_tid;
62*437bfbebSnyanmisaka     RK_S32 mark_ltr;
63*437bfbebSnyanmisaka     RK_S32 use_ltr;
64*437bfbebSnyanmisaka     RK_S32 frame_qp;
65*437bfbebSnyanmisaka     RK_S32 base_layer_pid;
66*437bfbebSnyanmisaka } VpuApiMlvecDynamicCfg;
67*437bfbebSnyanmisaka 
68*437bfbebSnyanmisaka typedef void* VpuApiMlvec;
69*437bfbebSnyanmisaka 
70*437bfbebSnyanmisaka #ifdef __cplusplus
71*437bfbebSnyanmisaka extern "C" {
72*437bfbebSnyanmisaka #endif
73*437bfbebSnyanmisaka 
74*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_init(VpuApiMlvec *ctx);
75*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_deinit(VpuApiMlvec ctx);
76*437bfbebSnyanmisaka 
77*437bfbebSnyanmisaka /* setup basic mpp info in vpu_api */
78*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_setup(VpuApiMlvec ctx, MppCtx mpp, MppApi *mpi, MppEncCfg enc_cfg);
79*437bfbebSnyanmisaka /* check the input encoder parameter is mlvec configure or not */
80*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_check_cfg(void *p);
81*437bfbebSnyanmisaka 
82*437bfbebSnyanmisaka /* setup mlvec static configure */
83*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_set_st_cfg(VpuApiMlvec ctx, VpuApiMlvecStaticCfg *cfg);
84*437bfbebSnyanmisaka /* setup mlvec dynamic configure and setup MppMeta in MppFrame */
85*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_set_dy_cfg(VpuApiMlvec ctx, VpuApiMlvecDynamicCfg *cfg, MppMeta meta);
86*437bfbebSnyanmisaka /* setup mlvec max temporal layer count dynamic configure */
87*437bfbebSnyanmisaka MPP_RET vpu_api_mlvec_set_dy_max_tid(VpuApiMlvec ctx, RK_S32 max_tid);
88*437bfbebSnyanmisaka 
89*437bfbebSnyanmisaka #ifdef __cplusplus
90*437bfbebSnyanmisaka }
91*437bfbebSnyanmisaka #endif
92*437bfbebSnyanmisaka 
93*437bfbebSnyanmisaka #endif /* __VPU_API_MLVEC_H__ */
94