1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef _PPOP_H_ 18*437bfbebSnyanmisaka #define _PPOP_H_ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include <sys/types.h> 21*437bfbebSnyanmisaka 22*437bfbebSnyanmisaka typedef RK_S32 status_t; 23*437bfbebSnyanmisaka 24*437bfbebSnyanmisaka namespace android 25*437bfbebSnyanmisaka { 26*437bfbebSnyanmisaka 27*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV422INTERLAVE 0 28*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV420SEMI 1 29*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV420PLANAR 2 30*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV400 3 31*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV422SEMI 4 32*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV420SEMITIELED 5 33*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV440SEMI 6 34*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV444_SEMI 7 35*437bfbebSnyanmisaka #define PP_IN_FORMAT_YUV411_SEMI 8 36*437bfbebSnyanmisaka 37*437bfbebSnyanmisaka #define PP_OUT_FORMAT_RGB565 0 38*437bfbebSnyanmisaka #define PP_OUT_FORMAT_ARGB 1 39*437bfbebSnyanmisaka #define PP_OUT_FORMAT_ABGR 2 40*437bfbebSnyanmisaka #define PP_OUT_FORMAT_YUV422INTERLAVE 3 41*437bfbebSnyanmisaka #define PP_OUT_FORMAT_YUV420INTERLAVE 5 42*437bfbebSnyanmisaka 43*437bfbebSnyanmisaka #define PP_ROTATION_NONE 0U 44*437bfbebSnyanmisaka #define PP_ROTATION_RIGHT_90 1U 45*437bfbebSnyanmisaka #define PP_ROTATION_LEFT_90 2U 46*437bfbebSnyanmisaka #define PP_ROTATION_HOR_FLIP 3U 47*437bfbebSnyanmisaka #define PP_ROTATION_VER_FLIP 4U 48*437bfbebSnyanmisaka #define PP_ROTATION_180 5U 49*437bfbebSnyanmisaka 50*437bfbebSnyanmisaka typedef struct { 51*437bfbebSnyanmisaka RK_U32 srcAddr; // 16 align 52*437bfbebSnyanmisaka RK_U32 srcFormat; 53*437bfbebSnyanmisaka RK_U32 srcWidth; // 16 align max 2048 54*437bfbebSnyanmisaka RK_U32 srcHeight; // 16 align max 2048 55*437bfbebSnyanmisaka RK_U32 srcHStride; // 16 align max 2048 56*437bfbebSnyanmisaka RK_U32 srcVStride; // 16 align max 2048 57*437bfbebSnyanmisaka RK_U32 srcCrop8R; // crop rigth 58*437bfbebSnyanmisaka RK_U32 srcCrop8D; // crop down 59*437bfbebSnyanmisaka RK_U32 srcX; // src x 60*437bfbebSnyanmisaka RK_U32 srcY; // src y 61*437bfbebSnyanmisaka RK_U32 srcReserv[2]; 62*437bfbebSnyanmisaka 63*437bfbebSnyanmisaka RK_U32 dstAddr; // 16 align 64*437bfbebSnyanmisaka RK_U32 dstFormat; 65*437bfbebSnyanmisaka RK_U32 dstWidth; // 16 align max 2048 66*437bfbebSnyanmisaka RK_U32 dstHeight; // 16 align max 2048 67*437bfbebSnyanmisaka RK_U32 dstHStride; // 16 align max 2048 68*437bfbebSnyanmisaka RK_U32 dstVStride; // 16 align max 2048 69*437bfbebSnyanmisaka RK_U32 dstReserv[2]; 70*437bfbebSnyanmisaka RK_U32 dstX; // dst x 71*437bfbebSnyanmisaka RK_U32 dstY; // dst y 72*437bfbebSnyanmisaka 73*437bfbebSnyanmisaka RK_U32 vpuFd; // VPUClient handle 74*437bfbebSnyanmisaka RK_U32 rotation; // rotation angel 75*437bfbebSnyanmisaka RK_U32 yuvFullRange; // yuv is full range or not, set yuv trans table 76*437bfbebSnyanmisaka RK_U32 deinterlace; // do deinterlace or not 77*437bfbebSnyanmisaka RK_U32 optReserv[13]; 78*437bfbebSnyanmisaka } PP_OPERATION; 79*437bfbebSnyanmisaka 80*437bfbebSnyanmisaka 81*437bfbebSnyanmisaka typedef enum { 82*437bfbebSnyanmisaka PP_SET_SRC_ADDR = 0, 83*437bfbebSnyanmisaka PP_SET_SRC_FORMAT, 84*437bfbebSnyanmisaka PP_SET_SRC_WIDTH, 85*437bfbebSnyanmisaka PP_SET_SRC_HEIGHT, 86*437bfbebSnyanmisaka PP_SET_SRC_HSTRIDE, 87*437bfbebSnyanmisaka PP_SET_SRC_VSTRIDE, 88*437bfbebSnyanmisaka 89*437bfbebSnyanmisaka PP_SET_DST_ADDR = 8, 90*437bfbebSnyanmisaka PP_SET_DST_FORMAT, 91*437bfbebSnyanmisaka PP_SET_DST_WIDTH, 92*437bfbebSnyanmisaka PP_SET_DST_HEIGHT, 93*437bfbebSnyanmisaka PP_SET_DST_HSTRIDE, 94*437bfbebSnyanmisaka PP_SET_DST_VSTRIDE, 95*437bfbebSnyanmisaka 96*437bfbebSnyanmisaka PP_SET_VPU_FD = 16, // important must be set or use ppOpSet to set this fd 97*437bfbebSnyanmisaka PP_SET_ROTATION, 98*437bfbebSnyanmisaka PP_SET_YUV_RANGE, 99*437bfbebSnyanmisaka PP_SET_DEINTERLACE, 100*437bfbebSnyanmisaka 101*437bfbebSnyanmisaka PP_SET_BUTT = 32, 102*437bfbebSnyanmisaka } PP_SET_OPT; 103*437bfbebSnyanmisaka 104*437bfbebSnyanmisaka typedef void* PP_OP_HANDLE; 105*437bfbebSnyanmisaka 106*437bfbebSnyanmisaka status_t ppOpInit(PP_OP_HANDLE *hnd, PP_OPERATION *init); 107*437bfbebSnyanmisaka status_t ppOpSet(PP_OP_HANDLE hnd, PP_SET_OPT opt, RK_U32 val); 108*437bfbebSnyanmisaka status_t ppOpPerform(PP_OP_HANDLE hnd); 109*437bfbebSnyanmisaka status_t ppOpSync(PP_OP_HANDLE hnd); 110*437bfbebSnyanmisaka status_t ppOpRelease(PP_OP_HANDLE hnd); 111*437bfbebSnyanmisaka 112*437bfbebSnyanmisaka } 113*437bfbebSnyanmisaka 114*437bfbebSnyanmisaka #endif // _PPOP_H_ 115*437bfbebSnyanmisaka 116