1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2017 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __HAL_M4VD_COM_H__ 18*437bfbebSnyanmisaka #define __HAL_M4VD_COM_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include "mpp_hal.h" 21*437bfbebSnyanmisaka #include "mpp_device.h" 22*437bfbebSnyanmisaka 23*437bfbebSnyanmisaka #include "mpg4d_syntax.h" 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka #define MPG4D_HAL_DBG_REG_PUT (0x00000001) 26*437bfbebSnyanmisaka #define MPG4D_HAL_DBG_REG_GET (0x00000002) 27*437bfbebSnyanmisaka 28*437bfbebSnyanmisaka extern RK_U32 hal_mpg4d_debug; 29*437bfbebSnyanmisaka 30*437bfbebSnyanmisaka #define MPEG4_MAX_MV_BUF_SIZE ((1920/16)*(1088/16)*4*sizeof(RK_U32)) 31*437bfbebSnyanmisaka 32*437bfbebSnyanmisaka typedef struct mpeg4d_reg_context { 33*437bfbebSnyanmisaka MppBufSlots frm_slots; 34*437bfbebSnyanmisaka MppBufSlots pkt_slots; 35*437bfbebSnyanmisaka MppBufferGroup group; 36*437bfbebSnyanmisaka MppCbCtx *dec_cb; 37*437bfbebSnyanmisaka MppDev dev; 38*437bfbebSnyanmisaka // save fd for curr/ref0/ref1 for reg_gen 39*437bfbebSnyanmisaka RK_S32 fd_curr; 40*437bfbebSnyanmisaka RK_S32 fd_ref0; 41*437bfbebSnyanmisaka RK_S32 fd_ref1; 42*437bfbebSnyanmisaka RK_U32 bitstrm_len; 43*437bfbebSnyanmisaka // mv info buffer 44*437bfbebSnyanmisaka // NOTE: mv buffer fix to 1080p size for convenience 45*437bfbebSnyanmisaka MppBuffer mv_buf; 46*437bfbebSnyanmisaka MppBuffer qp_table; 47*437bfbebSnyanmisaka 48*437bfbebSnyanmisaka void* regs; 49*437bfbebSnyanmisaka MppHalApi hal_api; 50*437bfbebSnyanmisaka } hal_mpg4_ctx; 51*437bfbebSnyanmisaka 52*437bfbebSnyanmisaka extern RK_U8 default_inter_matrix[64]; 53*437bfbebSnyanmisaka extern RK_U8 default_intra_matrix[64]; 54*437bfbebSnyanmisaka 55*437bfbebSnyanmisaka extern void vpu_mpg4d_get_buffer_by_index(hal_mpg4_ctx *ctx, RK_S32 index, MppBuffer *buffer); 56*437bfbebSnyanmisaka 57*437bfbebSnyanmisaka #endif /*__HAL_M4VD_COM_H__*/ 58