xref: /rockchip-linux_mpp/mpp/hal/vpu/m2vd/hal_m2vd_base.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka  * Copyright 2015 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka  *
4*437bfbebSnyanmisaka  * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka  * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka  * You may obtain a copy of the License at
7*437bfbebSnyanmisaka  *
8*437bfbebSnyanmisaka  *      http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka  *
10*437bfbebSnyanmisaka  * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka  * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka  * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka  * limitations under the License.
15*437bfbebSnyanmisaka  */
16*437bfbebSnyanmisaka 
17*437bfbebSnyanmisaka #ifndef __HAL_M2VD_BASE_H__
18*437bfbebSnyanmisaka #define __HAL_M2VD_BASE_H__
19*437bfbebSnyanmisaka 
20*437bfbebSnyanmisaka #include <stdio.h>
21*437bfbebSnyanmisaka 
22*437bfbebSnyanmisaka #include "mpp_debug.h"
23*437bfbebSnyanmisaka 
24*437bfbebSnyanmisaka #include "mpp_hal.h"
25*437bfbebSnyanmisaka #include "mpp_buf_slot.h"
26*437bfbebSnyanmisaka #include "mpp_device.h"
27*437bfbebSnyanmisaka 
28*437bfbebSnyanmisaka #include "m2vd_syntax.h"
29*437bfbebSnyanmisaka 
30*437bfbebSnyanmisaka #define M2VD_BUF_SIZE_QPTAB            (256)
31*437bfbebSnyanmisaka #define DEC_LITTLE_ENDIAN                     1
32*437bfbebSnyanmisaka #define DEC_BIG_ENDIAN                        0
33*437bfbebSnyanmisaka #define DEC_BUS_BURST_LENGTH_UNDEFINED        0
34*437bfbebSnyanmisaka #define DEC_BUS_BURST_LENGTH_4                5
35*437bfbebSnyanmisaka #define DEC_BUS_BURST_LENGTH_8                8
36*437bfbebSnyanmisaka #define DEC_BUS_BURST_LENGTH_16               16
37*437bfbebSnyanmisaka 
38*437bfbebSnyanmisaka #define M2VH_DBG_FUNCTION          (0x00000001)
39*437bfbebSnyanmisaka #define M2VH_DBG_REG               (0x00000002)
40*437bfbebSnyanmisaka #define M2VH_DBG_DUMP_REG          (0x00000004)
41*437bfbebSnyanmisaka #define M2VH_DBG_IRQ               (0x00000008)
42*437bfbebSnyanmisaka 
43*437bfbebSnyanmisaka extern RK_U32 m2vh_debug;
44*437bfbebSnyanmisaka 
45*437bfbebSnyanmisaka #define m2vh_dbg_func(tag) \
46*437bfbebSnyanmisaka     do {\
47*437bfbebSnyanmisaka         if (M2VH_DBG_FUNCTION & m2vh_debug)\
48*437bfbebSnyanmisaka             { mpp_log("%s: line(%d), func(%s)", tag, __LINE__, __FUNCTION__); }\
49*437bfbebSnyanmisaka     } while (0)
50*437bfbebSnyanmisaka 
51*437bfbebSnyanmisaka typedef enum M2VDPicCodingType_e {
52*437bfbebSnyanmisaka     M2VD_CODING_TYPE_I = 1,
53*437bfbebSnyanmisaka     M2VD_CODING_TYPE_P = 2,
54*437bfbebSnyanmisaka     M2VD_CODING_TYPE_B = 3,
55*437bfbebSnyanmisaka     M2VD_CODING_TYPE_D = 4
56*437bfbebSnyanmisaka } M2VDPicCodingType;
57*437bfbebSnyanmisaka 
58*437bfbebSnyanmisaka typedef enum M2VDPicStruct_e {
59*437bfbebSnyanmisaka     M2VD_PIC_STRUCT_TOP_FIELD    = 1,
60*437bfbebSnyanmisaka     M2VD_PIC_STRUCT_BOTTOM_FIELD = 2,
61*437bfbebSnyanmisaka     M2VD_PIC_STRUCT_FRAME        = 3
62*437bfbebSnyanmisaka } M2VDPicStruct;
63*437bfbebSnyanmisaka 
64*437bfbebSnyanmisaka typedef struct M2vdHalCtx_t {
65*437bfbebSnyanmisaka     MppHalApi       hal_api;
66*437bfbebSnyanmisaka     MppBufSlots     packet_slots;
67*437bfbebSnyanmisaka     MppBufSlots     frame_slots;
68*437bfbebSnyanmisaka     void            *regs;
69*437bfbebSnyanmisaka     MppBufferGroup  group;
70*437bfbebSnyanmisaka     MppBuffer       qp_table;
71*437bfbebSnyanmisaka     RK_U32          dec_frame_cnt;
72*437bfbebSnyanmisaka     MppCbCtx        *dec_cb;
73*437bfbebSnyanmisaka     MppDev          dev;
74*437bfbebSnyanmisaka     FILE            *fp_reg_in;
75*437bfbebSnyanmisaka     FILE            *fp_reg_out;
76*437bfbebSnyanmisaka     RK_U32          reg_len;
77*437bfbebSnyanmisaka } M2vdHalCtx;
78*437bfbebSnyanmisaka 
79*437bfbebSnyanmisaka #endif // __HAL_M2VD_BASE_H__
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