1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka *
4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka * You may obtain a copy of the License at
7*437bfbebSnyanmisaka *
8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka *
10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka * limitations under the License.
15*437bfbebSnyanmisaka */
16*437bfbebSnyanmisaka
17*437bfbebSnyanmisaka #define MODULE_TAG "hal_m2vd_api"
18*437bfbebSnyanmisaka
19*437bfbebSnyanmisaka #include <string.h>
20*437bfbebSnyanmisaka
21*437bfbebSnyanmisaka #include "mpp_env.h"
22*437bfbebSnyanmisaka
23*437bfbebSnyanmisaka #include "mpp_platform.h"
24*437bfbebSnyanmisaka #include "hal_m2vd_base.h"
25*437bfbebSnyanmisaka #include "hal_m2vd_vpu1.h"
26*437bfbebSnyanmisaka #include "hal_m2vd_vpu2.h"
27*437bfbebSnyanmisaka
28*437bfbebSnyanmisaka RK_U32 m2vh_debug = 0;
29*437bfbebSnyanmisaka
hal_m2vd_gen_regs(void * hal,HalTaskInfo * task)30*437bfbebSnyanmisaka static MPP_RET hal_m2vd_gen_regs(void *hal, HalTaskInfo *task)
31*437bfbebSnyanmisaka {
32*437bfbebSnyanmisaka M2vdHalCtx *self = (M2vdHalCtx *)hal;
33*437bfbebSnyanmisaka return self->hal_api.reg_gen (hal, task);
34*437bfbebSnyanmisaka }
35*437bfbebSnyanmisaka
hal_m2vd_start(void * hal,HalTaskInfo * task)36*437bfbebSnyanmisaka static MPP_RET hal_m2vd_start(void *hal, HalTaskInfo *task)
37*437bfbebSnyanmisaka {
38*437bfbebSnyanmisaka M2vdHalCtx *self = (M2vdHalCtx *)hal;
39*437bfbebSnyanmisaka return self->hal_api.start(hal, task);
40*437bfbebSnyanmisaka }
41*437bfbebSnyanmisaka
hal_m2vd_wait(void * hal,HalTaskInfo * task)42*437bfbebSnyanmisaka static MPP_RET hal_m2vd_wait(void *hal, HalTaskInfo *task)
43*437bfbebSnyanmisaka {
44*437bfbebSnyanmisaka M2vdHalCtx *self = (M2vdHalCtx *)hal;
45*437bfbebSnyanmisaka return self->hal_api.wait(hal, task);
46*437bfbebSnyanmisaka }
47*437bfbebSnyanmisaka
hal_m2vd_deinit(void * hal)48*437bfbebSnyanmisaka static MPP_RET hal_m2vd_deinit(void *hal)
49*437bfbebSnyanmisaka {
50*437bfbebSnyanmisaka M2vdHalCtx *self = (M2vdHalCtx *)hal;
51*437bfbebSnyanmisaka return self->hal_api.deinit(hal);
52*437bfbebSnyanmisaka }
53*437bfbebSnyanmisaka
hal_m2vd_init(void * hal,MppHalCfg * cfg)54*437bfbebSnyanmisaka static MPP_RET hal_m2vd_init (void *hal, MppHalCfg *cfg)
55*437bfbebSnyanmisaka {
56*437bfbebSnyanmisaka M2vdHalCtx *self = (M2vdHalCtx *)hal;
57*437bfbebSnyanmisaka MppHalApi *p_api = NULL;
58*437bfbebSnyanmisaka VpuHwMode hw_mode = MODE_NULL;
59*437bfbebSnyanmisaka RK_U32 hw_flag = 0;
60*437bfbebSnyanmisaka
61*437bfbebSnyanmisaka if (self == NULL)
62*437bfbebSnyanmisaka return MPP_ERR_VALUE;
63*437bfbebSnyanmisaka memset(self, 0, sizeof(M2vdHalCtx));
64*437bfbebSnyanmisaka
65*437bfbebSnyanmisaka p_api = &self->hal_api;
66*437bfbebSnyanmisaka
67*437bfbebSnyanmisaka mpp_env_get_u32("m2vh_debug", &m2vh_debug, 0);
68*437bfbebSnyanmisaka
69*437bfbebSnyanmisaka hw_flag = mpp_get_vcodec_type();
70*437bfbebSnyanmisaka if (hw_flag & HAVE_VDPU1)
71*437bfbebSnyanmisaka hw_mode = VDPU1_MODE;
72*437bfbebSnyanmisaka if (hw_flag & HAVE_VDPU2)
73*437bfbebSnyanmisaka hw_mode = VDPU2_MODE;
74*437bfbebSnyanmisaka
75*437bfbebSnyanmisaka switch (hw_mode) {
76*437bfbebSnyanmisaka case VDPU2_MODE:
77*437bfbebSnyanmisaka p_api->init = hal_m2vd_vdpu2_init;
78*437bfbebSnyanmisaka p_api->deinit = hal_m2vd_vdpu2_deinit;
79*437bfbebSnyanmisaka p_api->reg_gen = hal_m2vd_vdpu2_gen_regs;
80*437bfbebSnyanmisaka p_api->start = hal_m2vd_vdpu2_start;
81*437bfbebSnyanmisaka p_api->wait = hal_m2vd_vdpu2_wait;
82*437bfbebSnyanmisaka p_api->reset = NULL;
83*437bfbebSnyanmisaka p_api->flush = NULL;
84*437bfbebSnyanmisaka p_api->control = NULL;
85*437bfbebSnyanmisaka break;
86*437bfbebSnyanmisaka case VDPU1_MODE:
87*437bfbebSnyanmisaka p_api->init = hal_m2vd_vdpu1_init;
88*437bfbebSnyanmisaka p_api->deinit = hal_m2vd_vdpu1_deinit;
89*437bfbebSnyanmisaka p_api->reg_gen = hal_m2vd_vdpu1_gen_regs;
90*437bfbebSnyanmisaka p_api->start = hal_m2vd_vdpu1_start;
91*437bfbebSnyanmisaka p_api->wait = hal_m2vd_vdpu1_wait;
92*437bfbebSnyanmisaka p_api->reset = NULL;
93*437bfbebSnyanmisaka p_api->flush = NULL;
94*437bfbebSnyanmisaka p_api->control = NULL;
95*437bfbebSnyanmisaka break;
96*437bfbebSnyanmisaka default:
97*437bfbebSnyanmisaka mpp_err("unknow vpu mode %d.", hw_mode);
98*437bfbebSnyanmisaka return MPP_ERR_INIT;
99*437bfbebSnyanmisaka }
100*437bfbebSnyanmisaka
101*437bfbebSnyanmisaka return p_api->init(hal, cfg);;
102*437bfbebSnyanmisaka }
103*437bfbebSnyanmisaka
104*437bfbebSnyanmisaka const MppHalApi hal_api_m2vd = {
105*437bfbebSnyanmisaka .name = "m2vd_vdpu",
106*437bfbebSnyanmisaka .type = MPP_CTX_DEC,
107*437bfbebSnyanmisaka .coding = MPP_VIDEO_CodingMPEG2,
108*437bfbebSnyanmisaka .ctx_size = sizeof(M2vdHalCtx),
109*437bfbebSnyanmisaka .flag = 0,
110*437bfbebSnyanmisaka .init = hal_m2vd_init,
111*437bfbebSnyanmisaka .deinit = hal_m2vd_deinit,
112*437bfbebSnyanmisaka .reg_gen = hal_m2vd_gen_regs,
113*437bfbebSnyanmisaka .start = hal_m2vd_start,
114*437bfbebSnyanmisaka .wait = hal_m2vd_wait,
115*437bfbebSnyanmisaka .reset = NULL,
116*437bfbebSnyanmisaka .flush = NULL,
117*437bfbebSnyanmisaka .control = NULL,
118*437bfbebSnyanmisaka };
119