1 /*
2 * Copyright 2015 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "hal_jpege_vepu1"
18
19 #include <string.h>
20
21 #include "mpp_env.h"
22 #include "mpp_common.h"
23 #include "mpp_mem.h"
24 #include "mpp_platform.h"
25
26 #include "mpp_enc_hal.h"
27 #include "vcodec_service.h"
28
29 #include "hal_jpege_debug.h"
30 #include "hal_jpege_api_v2.h"
31 #include "hal_jpege_base.h"
32
33 #define VEPU_JPEGE_VEPU1_NUM_REGS 164
34
35 typedef struct jpege_vepu1_reg_set_t {
36 RK_U32 val[VEPU_JPEGE_VEPU1_NUM_REGS];
37 } jpege_vepu1_reg_set;
38
hal_jpege_vepu1_init(void * hal,MppEncHalCfg * cfg)39 static MPP_RET hal_jpege_vepu1_init(void *hal, MppEncHalCfg *cfg)
40 {
41 MPP_RET ret = MPP_OK;
42 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
43
44 mpp_env_get_u32("hal_jpege_debug", &hal_jpege_debug, 0);
45 hal_jpege_dbg_func("enter hal %p cfg %p\n", hal, cfg);
46
47 /* update output to MppEnc */
48 cfg->type = VPU_CLIENT_VEPU1;
49 ret = mpp_dev_init(&cfg->dev, cfg->type);
50 if (ret) {
51 mpp_err_f("mpp_dev_init failed. ret: %d\n", ret);
52 return ret;
53 }
54 ctx->dev = cfg->dev;
55
56 jpege_bits_init(&ctx->bits);
57 mpp_assert(ctx->bits);
58
59 ctx->cfg = cfg->cfg;
60 ctx->reg_size = sizeof(RK_U32) * VEPU_JPEGE_VEPU1_NUM_REGS;
61 ctx->regs = mpp_calloc_size(void, ctx->reg_size + EXTRA_INFO_SIZE);
62 if (NULL == ctx->regs) {
63 mpp_err_f("failed to malloc vepu1 regs\n");
64 return MPP_NOK;
65 }
66
67 ctx->regs_out = mpp_calloc_size(void, ctx->reg_size + EXTRA_INFO_SIZE);
68 if (NULL == ctx->regs_out) {
69 mpp_err_f("failed to malloc vepu2 regs\n");
70 return MPP_NOK;
71 }
72
73 hal_jpege_rc_init(&ctx->hal_rc);
74 hal_jpege_dbg_func("leave hal %p\n", hal);
75 return MPP_OK;
76 }
77
hal_jpege_vepu1_deinit(void * hal)78 static MPP_RET hal_jpege_vepu1_deinit(void *hal)
79 {
80 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
81
82 hal_jpege_dbg_func("enter hal %p\n", hal);
83
84 if (ctx->bits) {
85 jpege_bits_deinit(ctx->bits);
86 ctx->bits = NULL;
87 }
88
89 if (ctx->dev) {
90 mpp_dev_deinit(ctx->dev);
91 ctx->dev = NULL;
92 }
93
94 MPP_FREE(ctx->regs);
95 MPP_FREE(ctx->regs_out);
96 hal_jpege_dbg_func("leave hal %p\n", hal);
97 return MPP_OK;
98 }
99
hal_jpege_vepu1_get_task(void * hal,HalEncTask * task)100 static MPP_RET hal_jpege_vepu1_get_task(void *hal, HalEncTask *task)
101 {
102 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
103 JpegeSyntax *syntax = (JpegeSyntax *)task->syntax.data;
104 hal_jpege_dbg_func("enter hal %p\n", hal);
105
106 memcpy(&ctx->syntax, syntax, sizeof(ctx->syntax));
107
108 ctx->hal_start_pos = mpp_packet_get_length(task->packet);
109
110 /* prepare for part encoding */
111 ctx->mcu_y = 0;
112 ctx->mcu_h = syntax->mcu_ver_cnt;
113 ctx->sw_bit = 0;
114 ctx->part_bytepos = 0;
115 ctx->part_x_fill = 0;
116 ctx->part_y_fill = 0;
117 task->part_first = 1;
118 task->part_last = 0;
119
120 if (ctx->cfg->jpeg.update) {
121 hal_jpege_rc_update(&ctx->hal_rc, syntax);
122 ctx->cfg->jpeg.update = 0;
123 }
124
125 task->rc_task->frm.is_intra = 1;
126
127 hal_jpege_dbg_func("leave hal %p\n", hal);
128
129 return MPP_OK;
130 }
131
hal_jpege_vepu1_set_extra_info(MppDev dev,JpegeSyntax * syntax,RK_U32 start_mbrow)132 static MPP_RET hal_jpege_vepu1_set_extra_info(MppDev dev, JpegeSyntax *syntax,
133 RK_U32 start_mbrow)
134 {
135 MppFrameFormat fmt = syntax->format;
136 RK_U32 hor_stride = syntax->hor_stride;
137 RK_U32 ver_stride = syntax->ver_stride;
138 RK_U32 offset = 0;
139
140 switch (fmt) {
141 case MPP_FMT_YUV420SP :
142 case MPP_FMT_YUV420P : {
143 if (start_mbrow) {
144 offset = 16 * start_mbrow * hor_stride;
145
146 mpp_dev_set_reg_offset(dev, 11, offset);
147 }
148
149 offset = hor_stride * ver_stride + hor_stride * start_mbrow * 16 / 2;
150 if (fmt == MPP_FMT_YUV420P)
151 offset = hor_stride * start_mbrow * 16 / 4 + hor_stride * ver_stride;
152
153 mpp_dev_set_reg_offset(dev, 12, offset);
154
155 if (fmt == MPP_FMT_YUV420P)
156 offset = hor_stride * start_mbrow * 16 / 4 + hor_stride * ver_stride * 5 / 4;
157
158 mpp_dev_set_reg_offset(dev, 13, offset);
159 } break;
160 default : {
161 if (start_mbrow) {
162 offset = start_mbrow * hor_stride;
163
164 mpp_dev_set_reg_offset(dev, 11, offset);
165 }
166 } break;
167 }
168
169 return MPP_OK;
170 }
171
hal_jpege_vepu1_gen_regs(void * hal,HalEncTask * task)172 static MPP_RET hal_jpege_vepu1_gen_regs(void *hal, HalEncTask *task)
173 {
174 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
175 MppBuffer input = task->input;
176 MppBuffer output = task->output;
177 JpegeSyntax *syntax = &ctx->syntax;
178 RK_U32 width = syntax->width;
179 RK_U32 width_align = MPP_ALIGN(width, 16);
180 RK_U32 height = syntax->height;
181 MppFrameFormat fmt = syntax->format;
182 RK_U32 hor_stride = 0;
183 RK_U32 ver_stride = MPP_ALIGN(height, 16);
184 JpegeBits bits = ctx->bits;
185 RK_U32 *regs = (RK_U32 *)ctx->regs;
186 size_t length = mpp_packet_get_length(task->packet);
187 RK_U8 *buf = mpp_buffer_get_ptr(output);
188 size_t size = mpp_buffer_get_size(output);
189 RK_S32 bitpos;
190 RK_S32 bytepos;
191 RK_U32 x_fill = 0;
192 RK_U32 y_fill = 0;
193 VepuFormatCfg fmt_cfg;
194 RK_U32 rotation = 0;
195
196 hal_jpege_dbg_func("enter hal %p\n", hal);
197
198 // do not support mirroring
199 if (syntax->mirroring)
200 mpp_err_f("Warning: do not support mirroring\n");
201
202 if (syntax->rotation == MPP_ENC_ROT_90)
203 rotation = 1;
204 else if (syntax->rotation == MPP_ENC_ROT_270)
205 rotation = 2;
206 else if (syntax->rotation != MPP_ENC_ROT_0)
207 mpp_err_f("Warning: only support 90 or 270 degree rotate, request rotate %d", syntax->rotation);
208 if (rotation) {
209 MPP_SWAP(RK_U32, width, height);
210 MPP_SWAP(RK_U32, width_align, ver_stride);
211 }
212
213 hor_stride = get_vepu_pixel_stride(&ctx->stride_cfg, width,
214 syntax->hor_stride, fmt);
215
216 //hor_stride must be align with 8, and ver_stride mus align with 2
217 if ((hor_stride & 0x7) || (ver_stride & 0x1) || (hor_stride >= (1 << 15))) {
218 mpp_err_f("illegal resolution, hor_stride %d, ver_stride %d, width %d, height %d\n",
219 syntax->hor_stride, syntax->ver_stride,
220 syntax->width, syntax->height);
221 }
222
223 x_fill = (width_align - width) / 4;
224 y_fill = (ver_stride - height);
225 mpp_assert(x_fill <= 3);
226 mpp_assert(y_fill <= 15);
227 ctx->part_x_fill = x_fill;
228 ctx->part_y_fill = y_fill;
229
230 mpp_buffer_sync_begin(output);
231
232 if (syntax->q_mode == JPEG_QFACTOR) {
233 syntax->q_factor = 100 - task->rc_task->info.quality_target;
234 hal_jpege_rc_update(&ctx->hal_rc, syntax);
235 }
236 /* write header to output buffer */
237 jpege_bits_setup(bits, buf, (RK_U32)size);
238 /* seek length bytes data */
239 jpege_seek_bits(bits, length << 3);
240 /* NOTE: write header will update qtable */
241 write_jpeg_header(bits, syntax, &ctx->hal_rc);
242
243 memset(regs, 0, sizeof(RK_U32) * VEPU_JPEGE_VEPU1_NUM_REGS);
244 regs[11] = mpp_buffer_get_fd(input);
245 regs[12] = mpp_buffer_get_fd(input);
246 regs[13] = regs[12];
247
248 bitpos = jpege_bits_get_bitpos(bits);
249 bytepos = (bitpos + 7) >> 3;
250 ctx->base = buf;
251 ctx->size = size;
252 ctx->sw_bit = bitpos;
253 ctx->part_bytepos = bytepos;
254
255 get_msb_lsb_at_pos(®s[22], ®s[23], buf, bytepos);
256
257 mpp_buffer_sync_end(output);
258
259 if (!get_vepu_fmt(&fmt_cfg, fmt)) {
260 RK_U32 deflt_cfg = ((0 & (255)) << 24) |
261 ((0 & (255)) << 16) |
262 ((1 & (1)) << 15) |
263 ((16 & (63)) << 8) |
264 ((0 & (1)) << 6) |
265 ((0 & (1)) << 5) |
266 ((1 & (1)) << 4) |
267 ((1 & (1)) << 3) |
268 ((1 & (1)) << 1);
269
270 regs[2] = deflt_cfg | (fmt_cfg.swap_8_in & 1) |
271 (fmt_cfg.swap_32_in & 1) << 2 |
272 (fmt_cfg.swap_16_in & 1) << 14;
273 }
274
275 regs[5] = mpp_buffer_get_fd(output);
276 if (bytepos)
277 mpp_dev_set_reg_offset(ctx->dev, 5, bytepos);
278
279 regs[14] = (1 << 31) |
280 (0 << 30) |
281 (0 << 29) |
282 ((width_align >> 4) << 19) |
283 ((ver_stride >> 4) << 10) |
284 (1 << 3) | (2 << 1);
285
286 regs[15] = (0 << 29) |
287 (0 << 26) |
288 (hor_stride << 12) |
289 (x_fill << 10) |
290 (y_fill << 6) |
291 (fmt_cfg.format << 2) | rotation;
292
293 regs[24] = size - bytepos;
294
295 regs[37] = ((bytepos & 7) * 8) << 23;
296
297 {
298 RK_U32 coeffA;
299 RK_U32 coeffB;
300 RK_U32 coeffC;
301 RK_U32 coeffE;
302 RK_U32 coeffF;
303
304 switch (syntax->color_conversion_type) {
305 case 0 : { /* BT.601 */
306 /*
307 * Y = 0.2989 R + 0.5866 G + 0.1145 B
308 * Cb = 0.5647 (B - Y) + 128
309 * Cr = 0.7132 (R - Y) + 128
310 */
311 coeffA = 19589;
312 coeffB = 38443;
313 coeffC = 7504;
314 coeffE = 37008;
315 coeffF = 46740;
316 } break;
317 case 1 : { /* BT.709 */
318 /*
319 * Y = 0.2126 R + 0.7152 G + 0.0722 B
320 * Cb = 0.5389 (B - Y) + 128
321 * Cr = 0.6350 (R - Y) + 128
322 */
323 coeffA = 13933;
324 coeffB = 46871;
325 coeffC = 4732;
326 coeffE = 35317;
327 coeffF = 41615;
328 } break;
329 case 2 : {
330 coeffA = syntax->coeffA;
331 coeffB = syntax->coeffB;
332 coeffC = syntax->coeffC;
333 coeffE = syntax->coeffE;
334 coeffF = syntax->coeffF;
335 } break;
336 default : {
337 mpp_err("invalid color conversion type %d\n",
338 syntax->color_conversion_type);
339 coeffA = 19589;
340 coeffB = 38443;
341 coeffC = 7504;
342 coeffE = 37008;
343 coeffF = 46740;
344 } break;
345 }
346
347 regs[53] = coeffA | (coeffB << 16);
348 regs[54] = coeffC | (coeffE << 16);
349 regs[55] = ((fmt_cfg.b_mask & 0x1f) << 26) |
350 ((fmt_cfg.g_mask & 0x1f) << 21) |
351 ((fmt_cfg.r_mask & 0x1f) << 16) | coeffF;
352 }
353
354 regs[20] = ((syntax->part_rows & 0xff) << 16) | jpege_restart_marker[0];
355
356 regs[14] |= 0x001;
357
358 {
359 RK_S32 i;
360
361 for (i = 0; i < 16; i++) {
362 /* qtable need to reorder in particular order */
363 regs[i + 64] = ctx->hal_rc.qtables[0][qp_reorder_table[i * 4 + 0]] << 24 |
364 ctx->hal_rc.qtables[0][qp_reorder_table[i * 4 + 1]] << 16 |
365 ctx->hal_rc.qtables[0][qp_reorder_table[i * 4 + 2]] << 8 |
366 ctx->hal_rc.qtables[0][qp_reorder_table[i * 4 + 3]];
367 }
368 for (i = 0; i < 16; i++) {
369 /* qtable need to reorder in particular order */
370 regs[i + 80] = ctx->hal_rc.qtables[1][qp_reorder_table[i * 4 + 0]] << 24 |
371 ctx->hal_rc.qtables[1][qp_reorder_table[i * 4 + 1]] << 16 |
372 ctx->hal_rc.qtables[1][qp_reorder_table[i * 4 + 2]] << 8 |
373 ctx->hal_rc.qtables[1][qp_reorder_table[i * 4 + 3]];
374 }
375 }
376
377 hal_jpege_dbg_func("leave hal %p\n", hal);
378 return MPP_OK;
379 }
380
hal_jpege_vepu1_start(void * hal,HalEncTask * task)381 static MPP_RET hal_jpege_vepu1_start(void *hal, HalEncTask *task)
382 {
383 MPP_RET ret = MPP_OK;
384 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
385
386 hal_jpege_dbg_func("enter hal %p\n", hal);
387
388 hal_jpege_vepu1_set_extra_info(ctx->dev, &ctx->syntax, 0);
389
390 do {
391 MppDevRegWrCfg wr_cfg;
392 MppDevRegRdCfg rd_cfg;
393 RK_U32 reg_size = ctx->reg_size;
394
395 wr_cfg.reg = ctx->regs;
396 wr_cfg.size = reg_size;
397 wr_cfg.offset = 0;
398
399 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);
400 if (ret) {
401 mpp_err_f("set register write failed %d\n", ret);
402 break;
403 }
404
405 rd_cfg.reg = ctx->regs;
406 rd_cfg.size = reg_size;
407 rd_cfg.offset = 0;
408
409 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_RD, &rd_cfg);
410 if (ret) {
411 mpp_err_f("set register read failed %d\n", ret);
412 break;
413 }
414
415 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_SEND, NULL);
416 if (ret) {
417 mpp_err_f("send cmd failed %d\n", ret);
418 break;
419 }
420 } while (0);
421
422 hal_jpege_dbg_func("leave hal %p\n", hal);
423 (void)task;
424 return ret;
425 }
426
hal_jpege_vepu1_wait(void * hal,HalEncTask * task)427 static MPP_RET hal_jpege_vepu1_wait(void *hal, HalEncTask *task)
428 {
429 MPP_RET ret = MPP_OK;
430 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
431 JpegeBits bits = ctx->bits;
432 RK_U32 *regs = (RK_U32 *)ctx->regs;
433 JpegeFeedback *feedback = &ctx->feedback;
434 RK_U32 val;
435 RK_U32 sw_bit = 0;
436 RK_U32 hw_bit = 0;
437
438 hal_jpege_dbg_func("enter hal %p\n", hal);
439
440 if (ctx->dev) {
441 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_POLL, NULL);
442 if (ret)
443 mpp_err_f("poll cmd failed %d\n", ret);
444 }
445
446 val = regs[1];
447 hal_jpege_dbg_output("hw_status %08x\n", val);
448 feedback->hw_status = val & 0x70;
449 val = regs[24];
450
451 sw_bit = jpege_bits_get_bitpos(bits);
452 hw_bit = val;
453
454 // NOTE: hardware will return 64 bit access byte count
455 feedback->stream_length = ((sw_bit / 8) & (~0x7)) + hw_bit / 8;
456 task->length = feedback->stream_length;
457 task->hw_length = task->length - ctx->hal_start_pos;
458 hal_jpege_dbg_output("stream bit: sw %d hw %d total %d hw_length %d\n",
459 sw_bit, hw_bit, feedback->stream_length, task->hw_length);
460
461 hal_jpege_dbg_func("leave hal %p\n", hal);
462 return ret;
463 }
464
hal_jpege_vepu1_part_start(void * hal,HalEncTask * task)465 static MPP_RET hal_jpege_vepu1_part_start(void *hal, HalEncTask *task)
466 {
467 MPP_RET ret = MPP_OK;
468 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
469 JpegeSyntax *syntax = (JpegeSyntax *)task->syntax.data;
470 RK_U32 mcu_w = syntax->mcu_hor_cnt;
471 RK_U32 mcu_h = syntax->mcu_ver_cnt;
472 RK_U32 mcu_y = ctx->mcu_y;
473 RK_U32 part_mcu_h = syntax->part_rows;
474 RK_U32 *regs = (RK_U32 *)ctx->regs;
475 RK_U32 part_enc_h;
476 RK_U32 part_enc_mcu_h;
477 RK_U32 part_y_fill;
478 RK_U32 part_not_end;
479
480 hal_jpege_dbg_func("enter part start %p\n", hal);
481
482 /* Fix register for each part encoding */
483 task->part_first = !mcu_y;
484 if (mcu_y + part_mcu_h < mcu_h) {
485 part_enc_h = part_mcu_h * 16;
486 part_enc_mcu_h = part_mcu_h;
487 part_y_fill = 0;
488 part_not_end = 1;
489 task->part_last = 0;
490 } else {
491 part_enc_h = syntax->height - mcu_y * 16;
492 part_enc_mcu_h = MPP_ALIGN(part_enc_h, 16) / 16;;
493 part_y_fill = ctx->part_y_fill;
494 part_not_end = 0;
495 task->part_last = 1;
496 }
497
498 hal_jpege_dbg_detail("part first %d last %d\n", task->part_first, task->part_last);
499
500 get_msb_lsb_at_pos(®s[22], ®s[23], ctx->base, ctx->part_bytepos);
501
502 regs[24] = ctx->size - ctx->part_bytepos;
503
504 regs[15] = (regs[15] & 0xfffffc3f) | (part_y_fill << 6);
505
506 regs[37] = ((ctx->part_bytepos & 7) * 8) << 23;
507
508 regs[5] = mpp_buffer_get_fd(task->output);
509 if (ctx->part_bytepos)
510 mpp_dev_set_reg_offset(ctx->dev, 5, ctx->part_bytepos);
511
512 regs[14] = (1 << 31) |
513 (0 << 30) |
514 (0 << 29) |
515 (mcu_w << 19) |
516 (part_enc_mcu_h << 10) |
517 (1 << 3) | (2 << 1) | 1;
518
519 regs[20] = part_not_end << 24 | jpege_restart_marker[ctx->rst_marker_idx & 7];
520 ctx->rst_marker_idx++;
521
522 hal_jpege_vepu1_set_extra_info(ctx->dev, syntax, mcu_y);
523 ctx->mcu_y += part_enc_mcu_h;
524
525 do {
526 MppDevRegWrCfg wr_cfg;
527 MppDevRegRdCfg rd_cfg;
528 RK_U32 reg_size = ctx->reg_size;
529
530 wr_cfg.reg = ctx->regs;
531 wr_cfg.size = reg_size;
532 wr_cfg.offset = 0;
533
534 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg);
535 if (ret) {
536 mpp_err_f("set register write failed %d\n", ret);
537 break;
538 }
539
540 rd_cfg.reg = ctx->regs_out;
541 rd_cfg.size = reg_size;
542 rd_cfg.offset = 0;
543
544 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_RD, &rd_cfg);
545 if (ret) {
546 mpp_err_f("set register read failed %d\n", ret);
547 break;
548 }
549
550 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_SEND, NULL);
551 if (ret) {
552 mpp_err_f("send cmd failed %d\n", ret);
553 break;
554 }
555 } while (0);
556
557 hal_jpege_dbg_func("leave part start %p\n", hal);
558 (void)task;
559 return ret;
560 }
561
hal_jpege_vepu1_part_wait(void * hal,HalEncTask * task)562 static MPP_RET hal_jpege_vepu1_part_wait(void *hal, HalEncTask *task)
563 {
564 MPP_RET ret = MPP_OK;
565 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
566 RK_U32 *regs = ctx->regs_out;
567 JpegeFeedback *feedback = &ctx->feedback;
568 RK_U32 hw_bit = 0;
569
570 hal_jpege_dbg_func("enter part wait %p\n", hal);
571
572 if (ctx->dev) {
573 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_CMD_POLL, NULL);
574 if (ret)
575 mpp_err_f("poll cmd failed %d\n", ret);
576 }
577
578 hal_jpege_dbg_detail("hw_status %08x\n", regs[1]);
579
580 hw_bit = regs[24];
581
582 hal_jpege_dbg_detail("byte pos %d -> %d\n", ctx->part_bytepos,
583 (ctx->part_bytepos & (~7)) + (hw_bit / 8));
584 ctx->part_bytepos = (ctx->part_bytepos & (~7)) + (hw_bit / 8);
585
586 feedback->stream_length = ctx->part_bytepos;
587 task->length = ctx->part_bytepos;
588 task->hw_length = task->length - ctx->hal_start_pos;
589
590 hal_jpege_dbg_detail("stream_length %d, hw_byte %d",
591 feedback->stream_length, hw_bit / 8);
592
593 hal_jpege_dbg_output("stream bit: sw %d hw %d total %d hw_length %d\n",
594 ctx->sw_bit, hw_bit, feedback->stream_length, task->hw_length);
595
596 hal_jpege_dbg_func("leave part wait %p\n", hal);
597 return ret;
598 }
599
hal_jpege_vepu1_ret_task(void * hal,HalEncTask * task)600 static MPP_RET hal_jpege_vepu1_ret_task(void *hal, HalEncTask *task)
601 {
602 HalJpegeCtx *ctx = (HalJpegeCtx *)hal;
603
604 task->rc_task->info.bit_real = ctx->feedback.stream_length * 8;
605 task->hal_ret.data = &ctx->feedback;
606 task->hal_ret.number = 1;
607 task->rc_task->info.quality_real = task->rc_task->info.quality_target;
608
609 return MPP_OK;
610 }
611
612 const MppEncHalApi hal_jpege_vepu1 = {
613 .name = "hal_jpege_vepu1",
614 .coding = MPP_VIDEO_CodingMJPEG,
615 .ctx_size = sizeof(HalJpegeCtx),
616 .flag = 0,
617 .init = hal_jpege_vepu1_init,
618 .deinit = hal_jpege_vepu1_deinit,
619 .prepare = NULL,
620 .get_task = hal_jpege_vepu1_get_task,
621 .gen_regs = hal_jpege_vepu1_gen_regs,
622 .start = hal_jpege_vepu1_start,
623 .wait = hal_jpege_vepu1_wait,
624 .part_start = hal_jpege_vepu1_part_start,
625 .part_wait = hal_jpege_vepu1_part_wait,
626 .ret_task = hal_jpege_vepu1_ret_task,
627 };
628