1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 - 2017 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __HAL_JPEGD_BASE_H__ 18*437bfbebSnyanmisaka #define __HAL_JPEGD_BASE_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include <stdio.h> 21*437bfbebSnyanmisaka 22*437bfbebSnyanmisaka #include "mpp_hal.h" 23*437bfbebSnyanmisaka #include "mpp_device.h" 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka typedef struct PPInfo_t { 26*437bfbebSnyanmisaka /* PP parameters */ 27*437bfbebSnyanmisaka RK_U8 pp_enable; /* 0 - disable; 1 - enable */ 28*437bfbebSnyanmisaka RK_U8 pp_in_fmt; /* PP input format */ 29*437bfbebSnyanmisaka RK_U8 pp_out_fmt;/* PP output format */ 30*437bfbebSnyanmisaka RK_U8 dither_enable; /* for PP output RGB565 */ 31*437bfbebSnyanmisaka RK_U32 crop_width; 32*437bfbebSnyanmisaka RK_U32 crop_height; 33*437bfbebSnyanmisaka RK_U32 crop_x; 34*437bfbebSnyanmisaka RK_U32 crop_y; 35*437bfbebSnyanmisaka } PPInfo; 36*437bfbebSnyanmisaka 37*437bfbebSnyanmisaka typedef struct JpegdHalCtx { 38*437bfbebSnyanmisaka MppBufSlots packet_slots; 39*437bfbebSnyanmisaka MppBufSlots frame_slots; 40*437bfbebSnyanmisaka MppDev dev; 41*437bfbebSnyanmisaka void *regs; 42*437bfbebSnyanmisaka MppBufferGroup group; 43*437bfbebSnyanmisaka MppBuffer pTableBase; 44*437bfbebSnyanmisaka MppHalApi hal_api; 45*437bfbebSnyanmisaka MppCbCtx *dec_cb; 46*437bfbebSnyanmisaka 47*437bfbebSnyanmisaka MppFrameFormat output_fmt; 48*437bfbebSnyanmisaka RK_U32 set_output_fmt_flag; 49*437bfbebSnyanmisaka RK_U32 hal_debug_enable; 50*437bfbebSnyanmisaka RK_U32 frame_count; 51*437bfbebSnyanmisaka RK_U32 output_yuv_count; 52*437bfbebSnyanmisaka RK_U8 scale; 53*437bfbebSnyanmisaka 54*437bfbebSnyanmisaka RK_S32 pkt_fd; /* input stream's physical address(fd) */ 55*437bfbebSnyanmisaka RK_S32 frame_fd; /* output picture's physical address(fd) */ 56*437bfbebSnyanmisaka 57*437bfbebSnyanmisaka RK_U32 have_pp; 58*437bfbebSnyanmisaka PPInfo pp_info; 59*437bfbebSnyanmisaka const MppDecHwCap *hw_info; 60*437bfbebSnyanmisaka } JpegdHalCtx; 61*437bfbebSnyanmisaka 62*437bfbebSnyanmisaka #endif /* __HAL_JPEGD_COMMON_H__ */ 63