xref: /rockchip-linux_mpp/mpp/hal/vpu/common/vepu_common.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka  * Copyright 2015 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka  *
4*437bfbebSnyanmisaka  * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka  * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka  * You may obtain a copy of the License at
7*437bfbebSnyanmisaka  *
8*437bfbebSnyanmisaka  *      http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka  *
10*437bfbebSnyanmisaka  * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka  * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka  * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka  * limitations under the License.
15*437bfbebSnyanmisaka  */
16*437bfbebSnyanmisaka #ifndef __VEPU_COMMON_H__
17*437bfbebSnyanmisaka #define __VEPU_COMMON_H__
18*437bfbebSnyanmisaka 
19*437bfbebSnyanmisaka #include "mpp_frame.h"
20*437bfbebSnyanmisaka 
21*437bfbebSnyanmisaka typedef enum VepuFormat_e {
22*437bfbebSnyanmisaka     VEPU_FMT_YUV420PLANAR,          //0
23*437bfbebSnyanmisaka     VEPU_FMT_YUV420SEMIPLANAR,      //1
24*437bfbebSnyanmisaka     VEPU_FMT_YUYV422INTERLEAVED,    //2
25*437bfbebSnyanmisaka     VEPU_FMT_UYVY422INTERLEAVED,    //3
26*437bfbebSnyanmisaka     VEPU_FMT_RGB565,                //4
27*437bfbebSnyanmisaka     VEPU_FMT_RGB555,                //5
28*437bfbebSnyanmisaka     VEPU_FMT_RGB444,                //6
29*437bfbebSnyanmisaka     VEPU_FMT_RGB888,                //7
30*437bfbebSnyanmisaka     VEPU_FMT_RGB101010,             //8
31*437bfbebSnyanmisaka     VEPU_FMT_BUTT,                  //9
32*437bfbebSnyanmisaka } VepuFmt;
33*437bfbebSnyanmisaka 
34*437bfbebSnyanmisaka typedef struct VepuFormatCfg_t {
35*437bfbebSnyanmisaka     VepuFmt format;
36*437bfbebSnyanmisaka     RK_U8   r_mask;
37*437bfbebSnyanmisaka     RK_U8   g_mask;
38*437bfbebSnyanmisaka     RK_U8   b_mask;
39*437bfbebSnyanmisaka     RK_U8   swap_8_in;
40*437bfbebSnyanmisaka     RK_U8   swap_16_in;
41*437bfbebSnyanmisaka     RK_U8   swap_32_in;
42*437bfbebSnyanmisaka } VepuFormatCfg;
43*437bfbebSnyanmisaka 
44*437bfbebSnyanmisaka typedef struct VepuStrideCfg_t {
45*437bfbebSnyanmisaka     MppFrameFormat fmt;
46*437bfbebSnyanmisaka     RK_S32  not_8_pixel;
47*437bfbebSnyanmisaka     RK_S32  is_pixel_stride;
48*437bfbebSnyanmisaka 
49*437bfbebSnyanmisaka     RK_U32  width;
50*437bfbebSnyanmisaka     RK_U32  stride;
51*437bfbebSnyanmisaka 
52*437bfbebSnyanmisaka     RK_U32  pixel_stride;
53*437bfbebSnyanmisaka     RK_U32  pixel_size;
54*437bfbebSnyanmisaka } VepuStrideCfg;
55*437bfbebSnyanmisaka 
56*437bfbebSnyanmisaka typedef struct VepuOffsetCfg_t {
57*437bfbebSnyanmisaka     /* input parameter */
58*437bfbebSnyanmisaka     MppFrameFormat fmt;
59*437bfbebSnyanmisaka     /* width / height by pixel */
60*437bfbebSnyanmisaka     RK_U32  width;
61*437bfbebSnyanmisaka     RK_U32  height;
62*437bfbebSnyanmisaka     /* stride by byte */
63*437bfbebSnyanmisaka     RK_U32  hor_stride;
64*437bfbebSnyanmisaka     RK_U32  ver_stride;
65*437bfbebSnyanmisaka     /* offset by pixel */
66*437bfbebSnyanmisaka     RK_U32  offset_x;
67*437bfbebSnyanmisaka     RK_U32  offset_y;
68*437bfbebSnyanmisaka 
69*437bfbebSnyanmisaka     /* output parameter */
70*437bfbebSnyanmisaka     /* offset by byte */
71*437bfbebSnyanmisaka     RK_U32  offset_byte[3];
72*437bfbebSnyanmisaka 
73*437bfbebSnyanmisaka     /* offset by pixel */
74*437bfbebSnyanmisaka     RK_U32  offset_pixel[3];
75*437bfbebSnyanmisaka } VepuOffsetCfg;
76*437bfbebSnyanmisaka 
77*437bfbebSnyanmisaka #ifdef __cplusplus
78*437bfbebSnyanmisaka extern "C" {
79*437bfbebSnyanmisaka #endif
80*437bfbebSnyanmisaka 
81*437bfbebSnyanmisaka MPP_RET get_vepu_fmt(VepuFormatCfg *cfg, MppFrameFormat format);
82*437bfbebSnyanmisaka RK_U32 get_vepu_pixel_stride(VepuStrideCfg *cfg, RK_U32 width,
83*437bfbebSnyanmisaka                              RK_U32 stride, MppFrameFormat fmt);
84*437bfbebSnyanmisaka 
85*437bfbebSnyanmisaka MPP_RET get_vepu_offset_cfg(VepuOffsetCfg *cfg);
86*437bfbebSnyanmisaka 
87*437bfbebSnyanmisaka #ifdef __cplusplus
88*437bfbebSnyanmisaka }
89*437bfbebSnyanmisaka #endif
90*437bfbebSnyanmisaka 
91*437bfbebSnyanmisaka #endif
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