1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka #ifndef __VEPU541_COMMON_H__ 17*437bfbebSnyanmisaka #define __VEPU541_COMMON_H__ 18*437bfbebSnyanmisaka 19*437bfbebSnyanmisaka #include "rk_venc_cmd.h" 20*437bfbebSnyanmisaka #include "mpp_device.h" 21*437bfbebSnyanmisaka #include "vepu5xx_common.h" 22*437bfbebSnyanmisaka 23*437bfbebSnyanmisaka #define VEPU541_REG_BASE_HW_STATUS 0x0000001C 24*437bfbebSnyanmisaka #define VEPU541_REG_BASE_STATISTICS 0x00000210 25*437bfbebSnyanmisaka #define VEPU541_REG_BASE_OSD_PLT 0x00000400 26*437bfbebSnyanmisaka #define VEPU541_REG_BASE_L2 0x00010004 27*437bfbebSnyanmisaka 28*437bfbebSnyanmisaka #define VEPU541_MAX_ROI_NUM 8 29*437bfbebSnyanmisaka 30*437bfbebSnyanmisaka /* 31*437bfbebSnyanmisaka * Vepu541RoiCfg 32*437bfbebSnyanmisaka * 33*437bfbebSnyanmisaka * Each Vepu541RoiCfg in roi buffer indicates a 16x16 cu encoding config at 34*437bfbebSnyanmisaka * corresponding position. 35*437bfbebSnyanmisaka * 36*437bfbebSnyanmisaka * NOTE: roi buffer should be aligned to 64x64 each is 4 16x16 in horizontal 37*437bfbebSnyanmisaka * and 4 16x16 in vertical. So the buffer need to be enlarged to avoid hardware 38*437bfbebSnyanmisaka * access error. 39*437bfbebSnyanmisaka */ 40*437bfbebSnyanmisaka typedef struct Vepu541RoiCfg_t { 41*437bfbebSnyanmisaka /* 42*437bfbebSnyanmisaka * Force_intra 43*437bfbebSnyanmisaka * 1 - The corresponding 16x16cu is forced to be intra 44*437bfbebSnyanmisaka * 0 - Not force to intra 45*437bfbebSnyanmisaka */ 46*437bfbebSnyanmisaka RK_U16 force_intra : 1; 47*437bfbebSnyanmisaka RK_U16 reserved : 3; 48*437bfbebSnyanmisaka /* 49*437bfbebSnyanmisaka * Qp area index 50*437bfbebSnyanmisaka * The choosed qp area index. 51*437bfbebSnyanmisaka */ 52*437bfbebSnyanmisaka RK_U16 qp_area_idx : 3; 53*437bfbebSnyanmisaka /* 54*437bfbebSnyanmisaka * Area qp limit function enable flag 55*437bfbebSnyanmisaka * Force to be true in vepu541 56*437bfbebSnyanmisaka */ 57*437bfbebSnyanmisaka RK_U16 qp_area_en : 1; 58*437bfbebSnyanmisaka /* 59*437bfbebSnyanmisaka * Qp_adj 60*437bfbebSnyanmisaka * Qp_adj 61*437bfbebSnyanmisaka * in absolute qp mode qp_adj is the final qp used by encoder 62*437bfbebSnyanmisaka * in relative qp mode qp_adj is a adjustment to final qp 63*437bfbebSnyanmisaka */ 64*437bfbebSnyanmisaka RK_S16 qp_adj : 7; 65*437bfbebSnyanmisaka /* 66*437bfbebSnyanmisaka * Qp_adj_mode 67*437bfbebSnyanmisaka * Qp adjustment mode 68*437bfbebSnyanmisaka * 1 - absolute qp mode: 69*437bfbebSnyanmisaka * the 16x16 MB qp is set to the qp_adj value 70*437bfbebSnyanmisaka * 0 - relative qp mode 71*437bfbebSnyanmisaka * the 16x16 MB qp is adjusted by qp_adj value 72*437bfbebSnyanmisaka */ 73*437bfbebSnyanmisaka RK_U16 qp_adj_mode : 1; 74*437bfbebSnyanmisaka } Vepu541RoiCfg; 75*437bfbebSnyanmisaka 76*437bfbebSnyanmisaka typedef struct Vepu541OsdPos_t { 77*437bfbebSnyanmisaka /* X coordinate/16 of OSD region's left-top point. */ 78*437bfbebSnyanmisaka RK_U32 osd_lt_x : 8; 79*437bfbebSnyanmisaka /* Y coordinate/16 of OSD region's left-top point. */ 80*437bfbebSnyanmisaka RK_U32 osd_lt_y : 8; 81*437bfbebSnyanmisaka /* X coordinate/16 of OSD region's right-bottom point. */ 82*437bfbebSnyanmisaka RK_U32 osd_rb_x : 8; 83*437bfbebSnyanmisaka /* Y coordinate/16 of OSD region's right-bottom point. */ 84*437bfbebSnyanmisaka RK_U32 osd_rb_y : 8; 85*437bfbebSnyanmisaka } Vepu541OsdPos; 86*437bfbebSnyanmisaka 87*437bfbebSnyanmisaka typedef struct Vepu541B8NumQp_t { 88*437bfbebSnyanmisaka RK_U32 b8num_qp : 18; 89*437bfbebSnyanmisaka RK_U32 reserved : 14; 90*437bfbebSnyanmisaka } Vepu541B8NumQp; 91*437bfbebSnyanmisaka 92*437bfbebSnyanmisaka #ifdef __cplusplus 93*437bfbebSnyanmisaka extern "C" { 94*437bfbebSnyanmisaka #endif 95*437bfbebSnyanmisaka 96*437bfbebSnyanmisaka /* 97*437bfbebSnyanmisaka * roi function 98*437bfbebSnyanmisaka * 99*437bfbebSnyanmisaka * vepu541_get_roi_buf_size 100*437bfbebSnyanmisaka * Calculate roi buffer size for image with size w * h 101*437bfbebSnyanmisaka * 102*437bfbebSnyanmisaka * vepu541_set_roi 103*437bfbebSnyanmisaka * Setup roi config buffeer for image with mb count mb_w * mb_h 104*437bfbebSnyanmisaka */ 105*437bfbebSnyanmisaka RK_S32 vepu541_get_roi_buf_size(RK_S32 w, RK_S32 h); 106*437bfbebSnyanmisaka MPP_RET vepu541_set_roi(void *buf, MppEncROICfg *roi, RK_S32 w, RK_S32 h); 107*437bfbebSnyanmisaka MPP_RET vepu541_set_one_roi(void *buf, MppEncROIRegion *region, RK_S32 w, RK_S32 h); 108*437bfbebSnyanmisaka 109*437bfbebSnyanmisaka MPP_RET vepu541_set_osd(Vepu5xxOsdCfg *cfg); 110*437bfbebSnyanmisaka MPP_RET vepu540_set_osd(Vepu5xxOsdCfg *cfg); 111*437bfbebSnyanmisaka 112*437bfbebSnyanmisaka #ifdef __cplusplus 113*437bfbebSnyanmisaka } 114*437bfbebSnyanmisaka #endif 115*437bfbebSnyanmisaka 116*437bfbebSnyanmisaka #endif /* __VEPU541_COMMON_H__ */ 117