xref: /rockchip-linux_mpp/mpp/hal/rkdec/h265d/hal_h265d_debug.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka *
3*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD
4*437bfbebSnyanmisaka *
5*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License");
6*437bfbebSnyanmisaka * you may not use this file except in compliance with the License.
7*437bfbebSnyanmisaka * You may obtain a copy of the License at
8*437bfbebSnyanmisaka *
9*437bfbebSnyanmisaka *      http://www.apache.org/licenses/LICENSE-2.0
10*437bfbebSnyanmisaka *
11*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software
12*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS,
13*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14*437bfbebSnyanmisaka * See the License for the specific language governing permissions and
15*437bfbebSnyanmisaka * limitations under the License.
16*437bfbebSnyanmisaka */
17*437bfbebSnyanmisaka 
18*437bfbebSnyanmisaka #ifndef __HAL_H265D_DEBUG_H__
19*437bfbebSnyanmisaka #define __HAL_H265D_DEBUG_H__
20*437bfbebSnyanmisaka 
21*437bfbebSnyanmisaka #include "mpp_debug.h"
22*437bfbebSnyanmisaka 
23*437bfbebSnyanmisaka #define H265H_DBG_FUNCTION          (0x00000001)
24*437bfbebSnyanmisaka #define H265H_DBG_RPS               (0x00000002)
25*437bfbebSnyanmisaka #define H265H_DBG_PPS               (0x00000004)
26*437bfbebSnyanmisaka #define H265H_DBG_REG               (0x00000008)
27*437bfbebSnyanmisaka #define H265H_DBG_FAST_ERR          (0x00000010)
28*437bfbebSnyanmisaka #define H265H_DBG_TASK_ERR          (0x00000020)
29*437bfbebSnyanmisaka 
30*437bfbebSnyanmisaka #define h265h_dbg(flag, fmt, ...) _mpp_dbg(hal_h265d_debug, flag, fmt, ## __VA_ARGS__)
31*437bfbebSnyanmisaka 
32*437bfbebSnyanmisaka #ifdef __cplusplus
33*437bfbebSnyanmisaka extern "C" {
34*437bfbebSnyanmisaka #endif
35*437bfbebSnyanmisaka 
36*437bfbebSnyanmisaka extern RK_U32 hal_h265d_debug;
37*437bfbebSnyanmisaka 
38*437bfbebSnyanmisaka #ifdef __cplusplus
39*437bfbebSnyanmisaka }
40*437bfbebSnyanmisaka #endif
41*437bfbebSnyanmisaka 
42*437bfbebSnyanmisaka #endif /*__HAL_H265D_DEBUG_H__*/
43