1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __MPP_HAL_H__ 18*437bfbebSnyanmisaka #define __MPP_HAL_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include "rk_mpi_cmd.h" 21*437bfbebSnyanmisaka 22*437bfbebSnyanmisaka #include "mpp_buf_slot.h" 23*437bfbebSnyanmisaka #include "mpp_platform.h" 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka #include "hal_dec_task.h" 26*437bfbebSnyanmisaka #include "mpp_dec_cfg.h" 27*437bfbebSnyanmisaka #include "mpp_device.h" 28*437bfbebSnyanmisaka 29*437bfbebSnyanmisaka typedef enum VpuHwMode_e { 30*437bfbebSnyanmisaka MODE_NULL = 0, 31*437bfbebSnyanmisaka RKVDEC_MODE = 0x01, 32*437bfbebSnyanmisaka VDPU1_MODE = 0x02, 33*437bfbebSnyanmisaka VDPU2_MODE = 0x04, 34*437bfbebSnyanmisaka RKVENC_MODE = 0x05, 35*437bfbebSnyanmisaka MODE_BUTT, 36*437bfbebSnyanmisaka } VpuHwMode; 37*437bfbebSnyanmisaka 38*437bfbebSnyanmisaka typedef struct MppHalCfg_t { 39*437bfbebSnyanmisaka // input 40*437bfbebSnyanmisaka MppCtxType type; 41*437bfbebSnyanmisaka MppCodingType coding; 42*437bfbebSnyanmisaka MppBufSlots frame_slots; 43*437bfbebSnyanmisaka MppBufSlots packet_slots; 44*437bfbebSnyanmisaka MppDecCfgSet *cfg; 45*437bfbebSnyanmisaka MppCbCtx *dec_cb; 46*437bfbebSnyanmisaka 47*437bfbebSnyanmisaka // output from hardware module 48*437bfbebSnyanmisaka const MppDecHwCap *hw_info; 49*437bfbebSnyanmisaka // codec dev 50*437bfbebSnyanmisaka MppDev dev; 51*437bfbebSnyanmisaka RK_S32 support_fast_mode; 52*437bfbebSnyanmisaka SlotHalFbcAdjCfg *hal_fbc_adj_cfg; 53*437bfbebSnyanmisaka } MppHalCfg; 54*437bfbebSnyanmisaka 55*437bfbebSnyanmisaka typedef struct MppHalApi_t { 56*437bfbebSnyanmisaka char *name; 57*437bfbebSnyanmisaka MppCtxType type; 58*437bfbebSnyanmisaka MppCodingType coding; 59*437bfbebSnyanmisaka RK_U32 ctx_size; 60*437bfbebSnyanmisaka RK_U32 flag; 61*437bfbebSnyanmisaka 62*437bfbebSnyanmisaka MPP_RET (*init)(void *ctx, MppHalCfg *cfg); 63*437bfbebSnyanmisaka MPP_RET (*deinit)(void *ctx); 64*437bfbebSnyanmisaka 65*437bfbebSnyanmisaka // task preprocess function 66*437bfbebSnyanmisaka MPP_RET (*reg_gen)(void *ctx, HalTaskInfo *syn); 67*437bfbebSnyanmisaka 68*437bfbebSnyanmisaka // hw operation function 69*437bfbebSnyanmisaka MPP_RET (*start)(void *ctx, HalTaskInfo *task); 70*437bfbebSnyanmisaka MPP_RET (*wait)(void *ctx, HalTaskInfo *task); 71*437bfbebSnyanmisaka 72*437bfbebSnyanmisaka MPP_RET (*reset)(void *ctx); 73*437bfbebSnyanmisaka MPP_RET (*flush)(void *ctx); 74*437bfbebSnyanmisaka MPP_RET (*control)(void *ctx, MpiCmd cmd, void *param); 75*437bfbebSnyanmisaka } MppHalApi; 76*437bfbebSnyanmisaka 77*437bfbebSnyanmisaka typedef void* MppHal; 78*437bfbebSnyanmisaka 79*437bfbebSnyanmisaka #ifdef __cplusplus 80*437bfbebSnyanmisaka extern "C" { 81*437bfbebSnyanmisaka #endif 82*437bfbebSnyanmisaka 83*437bfbebSnyanmisaka MPP_RET mpp_hal_init(MppHal *ctx, MppHalCfg *cfg); 84*437bfbebSnyanmisaka MPP_RET mpp_hal_deinit(MppHal ctx); 85*437bfbebSnyanmisaka 86*437bfbebSnyanmisaka MPP_RET mpp_hal_reg_gen(MppHal ctx, HalTaskInfo *task); 87*437bfbebSnyanmisaka MPP_RET mpp_hal_hw_start(MppHal ctx, HalTaskInfo *task); 88*437bfbebSnyanmisaka MPP_RET mpp_hal_hw_wait(MppHal ctx, HalTaskInfo *task); 89*437bfbebSnyanmisaka 90*437bfbebSnyanmisaka MPP_RET mpp_hal_reset(MppHal ctx); 91*437bfbebSnyanmisaka MPP_RET mpp_hal_flush(MppHal ctx); 92*437bfbebSnyanmisaka MPP_RET mpp_hal_control(MppHal ctx, MpiCmd cmd, void *param); 93*437bfbebSnyanmisaka 94*437bfbebSnyanmisaka #ifdef __cplusplus 95*437bfbebSnyanmisaka } 96*437bfbebSnyanmisaka #endif 97*437bfbebSnyanmisaka 98*437bfbebSnyanmisaka #endif /*__MPP_HAL_H__*/ 99