xref: /rockchip-linux_mpp/mpp/codec/rc/rc_ctx.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka  * Copyright 2016 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka  *
4*437bfbebSnyanmisaka  * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka  * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka  * You may obtain a copy of the License at
7*437bfbebSnyanmisaka  *
8*437bfbebSnyanmisaka  *      http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka  *
10*437bfbebSnyanmisaka  * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka  * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka  * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka  * limitations under the License.
15*437bfbebSnyanmisaka  */
16*437bfbebSnyanmisaka #ifndef __RC_CTX_H__
17*437bfbebSnyanmisaka #define __RC_CTX_H__
18*437bfbebSnyanmisaka 
19*437bfbebSnyanmisaka #include "mpp_rc_api.h"
20*437bfbebSnyanmisaka #include "rc_base.h"
21*437bfbebSnyanmisaka 
22*437bfbebSnyanmisaka typedef struct RcModelV2Ctx_t {
23*437bfbebSnyanmisaka     RcCfg           usr_cfg;
24*437bfbebSnyanmisaka 
25*437bfbebSnyanmisaka     RK_U32          last_frame_type;
26*437bfbebSnyanmisaka     RK_S64          gop_total_bits;
27*437bfbebSnyanmisaka     RK_U32          bit_per_frame;
28*437bfbebSnyanmisaka     RK_U32          first_frm_flg;
29*437bfbebSnyanmisaka     RK_S64          avg_gbits;
30*437bfbebSnyanmisaka     RK_S64          real_gbits;
31*437bfbebSnyanmisaka 
32*437bfbebSnyanmisaka     MppDataV2       *i_bit;
33*437bfbebSnyanmisaka     RK_U32          i_sumbits;
34*437bfbebSnyanmisaka     RK_U32          i_scale;
35*437bfbebSnyanmisaka 
36*437bfbebSnyanmisaka     MppDataV2       *idr_bit;
37*437bfbebSnyanmisaka     RK_U32          idr_sumbits;
38*437bfbebSnyanmisaka     RK_U32          idr_scale;
39*437bfbebSnyanmisaka 
40*437bfbebSnyanmisaka     MppDataV2       *vi_bit;
41*437bfbebSnyanmisaka     RK_U32          vi_sumbits;
42*437bfbebSnyanmisaka     RK_U32          vi_scale;
43*437bfbebSnyanmisaka     RK_U32          i_refresh_scale;
44*437bfbebSnyanmisaka     MppDataV2       *p_bit;
45*437bfbebSnyanmisaka     RK_U32          p_sumbits;
46*437bfbebSnyanmisaka     RK_U32          i_refresh_sumbits;
47*437bfbebSnyanmisaka     RK_U32          p_scale;
48*437bfbebSnyanmisaka 
49*437bfbebSnyanmisaka     MppDataV2       *pre_p_bit;
50*437bfbebSnyanmisaka     MppDataV2       *pre_i_bit;
51*437bfbebSnyanmisaka     MppDataV2       *i_refresh_bit;
52*437bfbebSnyanmisaka     MppDataV2       *pre_i_mean_qp;
53*437bfbebSnyanmisaka     MppDataV2       *madi;
54*437bfbebSnyanmisaka     MppDataV2       *madp;
55*437bfbebSnyanmisaka     MppDataV2       *motion_level;
56*437bfbebSnyanmisaka     MppDataV2       *complex_level;
57*437bfbebSnyanmisaka 
58*437bfbebSnyanmisaka     RK_S32          target_bps;
59*437bfbebSnyanmisaka     RK_S32          pre_target_bits;
60*437bfbebSnyanmisaka     RK_S32          pre_target_bits_fix;
61*437bfbebSnyanmisaka     RK_S64          pre_target_bits_fix_count;
62*437bfbebSnyanmisaka     RK_S64          pre_real_bits_count;
63*437bfbebSnyanmisaka     RK_S32          pre_real_bits;
64*437bfbebSnyanmisaka     RK_S32          frm_bits_thr;
65*437bfbebSnyanmisaka     RK_S32          ins_bps;
66*437bfbebSnyanmisaka     RK_S32          last_inst_bps;
67*437bfbebSnyanmisaka 
68*437bfbebSnyanmisaka     RK_U32          motion_sensitivity;
69*437bfbebSnyanmisaka     RK_U32          min_still_percent;
70*437bfbebSnyanmisaka     RK_U32          max_still_qp;
71*437bfbebSnyanmisaka     RK_S32          moving_ratio;
72*437bfbebSnyanmisaka     RK_U32          pre_mean_qp;
73*437bfbebSnyanmisaka     RK_U32          pre_i_scale;
74*437bfbebSnyanmisaka     RK_S32          cur_super_thd;
75*437bfbebSnyanmisaka     MppDataV2       *stat_bits;
76*437bfbebSnyanmisaka     MppDataV2       *gop_bits;
77*437bfbebSnyanmisaka     MppDataV2       *stat_rate;
78*437bfbebSnyanmisaka     RK_S32          watl_thrd;
79*437bfbebSnyanmisaka     RK_S32          stat_watl;
80*437bfbebSnyanmisaka     RK_S32          watl_base;
81*437bfbebSnyanmisaka 
82*437bfbebSnyanmisaka     RK_S32          next_i_ratio;      // scale 64
83*437bfbebSnyanmisaka     RK_S32          next_ratio;        // scale 64
84*437bfbebSnyanmisaka     RK_S32          pre_i_qp;
85*437bfbebSnyanmisaka     RK_S32          pre_p_qp;
86*437bfbebSnyanmisaka     RK_U32          scale_qp;          // scale 64
87*437bfbebSnyanmisaka     MppDataV2       *means_qp;
88*437bfbebSnyanmisaka     RK_U32          frm_num;
89*437bfbebSnyanmisaka 
90*437bfbebSnyanmisaka     /* qp decision */
91*437bfbebSnyanmisaka     RK_S32          cur_scale_qp;
92*437bfbebSnyanmisaka     RK_S32          start_qp;
93*437bfbebSnyanmisaka     RK_S32          prev_quality;
94*437bfbebSnyanmisaka     RK_S32          prev_md_prop;
95*437bfbebSnyanmisaka     RK_S32          gop_qp_sum;
96*437bfbebSnyanmisaka     RK_S32          gop_frm_cnt;
97*437bfbebSnyanmisaka     RK_S32          pre_iblk4_prop;
98*437bfbebSnyanmisaka 
99*437bfbebSnyanmisaka     RK_S32          reenc_cnt;
100*437bfbebSnyanmisaka     RK_U32          drop_cnt;
101*437bfbebSnyanmisaka     RK_S32          on_drop;
102*437bfbebSnyanmisaka     RK_S32          on_pskip;
103*437bfbebSnyanmisaka     RK_S32          qp_layer_id;
104*437bfbebSnyanmisaka     RK_S32          hier_frm_cnt[4];
105*437bfbebSnyanmisaka 
106*437bfbebSnyanmisaka     RK_S64          time_base;
107*437bfbebSnyanmisaka     RK_S64          time_end;
108*437bfbebSnyanmisaka     RK_S32          frm_cnt;
109*437bfbebSnyanmisaka     RK_S32          last_fps;
110*437bfbebSnyanmisaka 
111*437bfbebSnyanmisaka     MPP_RET         (*calc_ratio)(void* ctx, EncRcTaskInfo *cfg);
112*437bfbebSnyanmisaka     MPP_RET         (*re_calc_ratio)(void* ctx, EncRcTaskInfo *cfg);
113*437bfbebSnyanmisaka } RcModelV2Ctx;
114*437bfbebSnyanmisaka 
115*437bfbebSnyanmisaka 
116*437bfbebSnyanmisaka #ifdef  __cplusplus
117*437bfbebSnyanmisaka extern "C" {
118*437bfbebSnyanmisaka #endif
119*437bfbebSnyanmisaka 
120*437bfbebSnyanmisaka /* basic helper function */
121*437bfbebSnyanmisaka MPP_RET bits_model_init(RcModelV2Ctx *ctx);
122*437bfbebSnyanmisaka MPP_RET bits_model_deinit(RcModelV2Ctx *ctx);
123*437bfbebSnyanmisaka 
124*437bfbebSnyanmisaka MPP_RET bits_model_alloc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg, RK_S64 total_bits);
125*437bfbebSnyanmisaka MPP_RET bits_model_update(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg);
126*437bfbebSnyanmisaka 
127*437bfbebSnyanmisaka MPP_RET calc_next_i_ratio(RcModelV2Ctx *ctx);
128*437bfbebSnyanmisaka MPP_RET check_re_enc(RcModelV2Ctx *ctx, EncRcTaskInfo *cfg);
129*437bfbebSnyanmisaka 
130*437bfbebSnyanmisaka #ifdef  __cplusplus
131*437bfbebSnyanmisaka }
132*437bfbebSnyanmisaka #endif
133*437bfbebSnyanmisaka 
134*437bfbebSnyanmisaka #endif /* __RC_CTX_H__ */
135