1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __MPP_DEC_IMPL_H__ 18*437bfbebSnyanmisaka #define __MPP_DEC_IMPL_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include "mpp_time.h" 21*437bfbebSnyanmisaka #include "mpp_mem_pool.h" 22*437bfbebSnyanmisaka #include "mpp_lock.h" 23*437bfbebSnyanmisaka #include "hal_info.h" 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka #include "mpp.h" 26*437bfbebSnyanmisaka #include "mpp_dec_cfg.h" 27*437bfbebSnyanmisaka #include "mpp_callback.h" 28*437bfbebSnyanmisaka 29*437bfbebSnyanmisaka #include "mpp_parser.h" 30*437bfbebSnyanmisaka #include "mpp_hal.h" 31*437bfbebSnyanmisaka 32*437bfbebSnyanmisaka // for timing record 33*437bfbebSnyanmisaka typedef enum MppDecTimingType_e { 34*437bfbebSnyanmisaka DEC_PRS_TOTAL, 35*437bfbebSnyanmisaka DEC_PRS_WAIT, 36*437bfbebSnyanmisaka DEC_PRS_PROC, 37*437bfbebSnyanmisaka DEC_PRS_PREPARE, 38*437bfbebSnyanmisaka DEC_PRS_PARSE, 39*437bfbebSnyanmisaka DEC_HAL_GEN_REG, 40*437bfbebSnyanmisaka DEC_HW_START, 41*437bfbebSnyanmisaka 42*437bfbebSnyanmisaka DEC_HAL_TOTAL, 43*437bfbebSnyanmisaka DEC_HAL_WAIT, 44*437bfbebSnyanmisaka DEC_HAL_PROC, 45*437bfbebSnyanmisaka DEC_HW_WAIT, 46*437bfbebSnyanmisaka DEC_TIMING_BUTT, 47*437bfbebSnyanmisaka } MppDecTimingType; 48*437bfbebSnyanmisaka 49*437bfbebSnyanmisaka 50*437bfbebSnyanmisaka typedef enum MppDecMode_e { 51*437bfbebSnyanmisaka MPP_DEC_MODE_DEFAULT, 52*437bfbebSnyanmisaka MPP_DEC_MODE_NO_THREAD, 53*437bfbebSnyanmisaka 54*437bfbebSnyanmisaka MPP_DEC_MODE_BUTT, 55*437bfbebSnyanmisaka } MppDecMode; 56*437bfbebSnyanmisaka 57*437bfbebSnyanmisaka typedef struct MppDecImpl_t MppDecImpl; 58*437bfbebSnyanmisaka 59*437bfbebSnyanmisaka typedef struct MppDecModeApi_t { 60*437bfbebSnyanmisaka MPP_RET (*start)(MppDecImpl *dec); 61*437bfbebSnyanmisaka MPP_RET (*stop)(MppDecImpl *dec); 62*437bfbebSnyanmisaka MPP_RET (*reset)(MppDecImpl *dec); 63*437bfbebSnyanmisaka MPP_RET (*notify)(MppDecImpl *dec, RK_U32 flag); 64*437bfbebSnyanmisaka MPP_RET (*control)(MppDecImpl *dec, MpiCmd cmd, void *param); 65*437bfbebSnyanmisaka } MppDecModeApi; 66*437bfbebSnyanmisaka 67*437bfbebSnyanmisaka struct MppDecImpl_t { 68*437bfbebSnyanmisaka MppCodingType coding; 69*437bfbebSnyanmisaka 70*437bfbebSnyanmisaka MppDecMode mode; 71*437bfbebSnyanmisaka MppDecModeApi *api; 72*437bfbebSnyanmisaka 73*437bfbebSnyanmisaka Parser parser; 74*437bfbebSnyanmisaka MppHal hal; 75*437bfbebSnyanmisaka 76*437bfbebSnyanmisaka // worker thread 77*437bfbebSnyanmisaka MppThread *thread_parser; 78*437bfbebSnyanmisaka MppThread *thread_hal; 79*437bfbebSnyanmisaka 80*437bfbebSnyanmisaka // common resource 81*437bfbebSnyanmisaka MppBufSlots frame_slots; 82*437bfbebSnyanmisaka MppBufSlots packet_slots; 83*437bfbebSnyanmisaka MppCbCtx dec_cb; 84*437bfbebSnyanmisaka const MppDecHwCap *hw_info; 85*437bfbebSnyanmisaka MppDev dev; 86*437bfbebSnyanmisaka HalInfo hal_info; 87*437bfbebSnyanmisaka RK_U32 info_updated; 88*437bfbebSnyanmisaka 89*437bfbebSnyanmisaka HalTaskGroup tasks; 90*437bfbebSnyanmisaka HalTaskGroup vproc_tasks; 91*437bfbebSnyanmisaka 92*437bfbebSnyanmisaka // runtime configure set 93*437bfbebSnyanmisaka MppDecCfg cfg_obj; 94*437bfbebSnyanmisaka MppDecCfgSet *cfg; 95*437bfbebSnyanmisaka 96*437bfbebSnyanmisaka /* control process */ 97*437bfbebSnyanmisaka MppMutexCond cmd_lock; 98*437bfbebSnyanmisaka RK_U32 cmd_send; 99*437bfbebSnyanmisaka RK_U32 cmd_recv; 100*437bfbebSnyanmisaka MpiCmd cmd; 101*437bfbebSnyanmisaka void *param; 102*437bfbebSnyanmisaka MPP_RET *cmd_ret; 103*437bfbebSnyanmisaka sem_t cmd_start; 104*437bfbebSnyanmisaka sem_t cmd_done; 105*437bfbebSnyanmisaka 106*437bfbebSnyanmisaka // status flags 107*437bfbebSnyanmisaka RK_U32 parser_work_count; 108*437bfbebSnyanmisaka RK_U32 parser_wait_count; 109*437bfbebSnyanmisaka RK_U32 parser_status_flag; 110*437bfbebSnyanmisaka RK_U32 parser_wait_flag; 111*437bfbebSnyanmisaka RK_U32 parser_notify_flag; 112*437bfbebSnyanmisaka RK_U32 hal_notify_flag; 113*437bfbebSnyanmisaka 114*437bfbebSnyanmisaka // reset process: 115*437bfbebSnyanmisaka // 1. mpp_dec set reset flag and signal parser 116*437bfbebSnyanmisaka // 2. mpp_dec wait on parser_reset sem 117*437bfbebSnyanmisaka // 3. parser wait hal reset done 118*437bfbebSnyanmisaka // 4. hal wait vproc reset done 119*437bfbebSnyanmisaka // 5. vproc do reset and signal hal 120*437bfbebSnyanmisaka // 6. hal do reset and signal parser 121*437bfbebSnyanmisaka // 7. parser do reset and signal mpp_dec 122*437bfbebSnyanmisaka // 8. mpp_dec reset done 123*437bfbebSnyanmisaka RK_U32 reset_flag; 124*437bfbebSnyanmisaka 125*437bfbebSnyanmisaka RK_U32 hal_reset_post; 126*437bfbebSnyanmisaka RK_U32 hal_reset_done; 127*437bfbebSnyanmisaka sem_t parser_reset; 128*437bfbebSnyanmisaka sem_t hal_reset; 129*437bfbebSnyanmisaka 130*437bfbebSnyanmisaka // work mode flags 131*437bfbebSnyanmisaka RK_U32 parser_fast_mode; 132*437bfbebSnyanmisaka RK_U32 disable_error; 133*437bfbebSnyanmisaka RK_U32 dis_err_clr_mark; 134*437bfbebSnyanmisaka RK_U32 enable_deinterlace; 135*437bfbebSnyanmisaka 136*437bfbebSnyanmisaka // dec parser thread runtime resource context 137*437bfbebSnyanmisaka MppPacket mpp_pkt_in; 138*437bfbebSnyanmisaka void *mpp; 139*437bfbebSnyanmisaka void *vproc; 140*437bfbebSnyanmisaka 141*437bfbebSnyanmisaka // statistics data 142*437bfbebSnyanmisaka RK_U32 statistics_en; 143*437bfbebSnyanmisaka MppClock clocks[DEC_TIMING_BUTT]; 144*437bfbebSnyanmisaka 145*437bfbebSnyanmisaka // query data 146*437bfbebSnyanmisaka RK_U32 dec_in_pkt_count; 147*437bfbebSnyanmisaka RK_U32 dec_hw_run_count; 148*437bfbebSnyanmisaka RK_U32 dec_out_frame_count; 149*437bfbebSnyanmisaka 150*437bfbebSnyanmisaka MppMemPool ts_pool; 151*437bfbebSnyanmisaka struct list_head ts_link; 152*437bfbebSnyanmisaka spinlock_t ts_lock; 153*437bfbebSnyanmisaka void *task_single; 154*437bfbebSnyanmisaka }; 155*437bfbebSnyanmisaka 156*437bfbebSnyanmisaka /* external wait state */ 157*437bfbebSnyanmisaka #define MPP_DEC_WAIT_PKT_IN (0x00000001) /* input packet not ready */ 158*437bfbebSnyanmisaka #define MPP_DEC_WAIT_FRM_OUT (0x00000002) /* frame output queue full */ 159*437bfbebSnyanmisaka 160*437bfbebSnyanmisaka #define MPP_DEC_WAIT_INFO_CHG (0x00000020) /* wait info change ready */ 161*437bfbebSnyanmisaka #define MPP_DEC_WAIT_BUF_RDY (0x00000040) /* wait valid frame buffer */ 162*437bfbebSnyanmisaka #define MPP_DEC_WAIT_TSK_ALL_DONE (0x00000080) /* wait all task done */ 163*437bfbebSnyanmisaka 164*437bfbebSnyanmisaka #define MPP_DEC_WAIT_TSK_HND_RDY (0x00000100) /* wait task handle ready */ 165*437bfbebSnyanmisaka #define MPP_DEC_WAIT_TSK_PREV_DONE (0x00000200) /* wait previous task done */ 166*437bfbebSnyanmisaka #define MPP_DEC_WAIT_BUF_GRP_RDY (0x00000200) /* wait buffer group change ready */ 167*437bfbebSnyanmisaka 168*437bfbebSnyanmisaka /* internal wait state */ 169*437bfbebSnyanmisaka #define MPP_DEC_WAIT_BUF_SLOT_RDY (0x00001000) /* wait buffer slot ready */ 170*437bfbebSnyanmisaka #define MPP_DEC_WAIT_PKT_BUF_RDY (0x00002000) /* wait packet buffer ready */ 171*437bfbebSnyanmisaka #define MPP_DEC_WAIT_BUF_SLOT_KEEP (0x00004000) /* wait buffer slot reservation */ 172*437bfbebSnyanmisaka 173*437bfbebSnyanmisaka typedef union PaserTaskWait_u { 174*437bfbebSnyanmisaka RK_U32 val; 175*437bfbebSnyanmisaka struct { 176*437bfbebSnyanmisaka RK_U32 dec_pkt_in : 1; // 0x0001 MPP_DEC_NOTIFY_PACKET_ENQUEUE 177*437bfbebSnyanmisaka RK_U32 dis_que_full : 1; // 0x0002 MPP_DEC_NOTIFY_FRAME_DEQUEUE 178*437bfbebSnyanmisaka RK_U32 reserv0004 : 1; // 0x0004 179*437bfbebSnyanmisaka RK_U32 reserv0008 : 1; // 0x0008 180*437bfbebSnyanmisaka 181*437bfbebSnyanmisaka RK_U32 ext_buf_grp : 1; // 0x0010 MPP_DEC_NOTIFY_EXT_BUF_GRP_READY 182*437bfbebSnyanmisaka RK_U32 info_change : 1; // 0x0020 MPP_DEC_NOTIFY_INFO_CHG_DONE 183*437bfbebSnyanmisaka RK_U32 dec_pic_unusd : 1; // 0x0040 MPP_DEC_NOTIFY_BUFFER_VALID 184*437bfbebSnyanmisaka RK_U32 dec_all_done : 1; // 0x0080 MPP_DEC_NOTIFY_TASK_ALL_DONE 185*437bfbebSnyanmisaka 186*437bfbebSnyanmisaka RK_U32 task_hnd : 1; // 0x0100 MPP_DEC_NOTIFY_TASK_HND_VALID 187*437bfbebSnyanmisaka RK_U32 prev_task : 1; // 0x0200 MPP_DEC_NOTIFY_TASK_PREV_DONE 188*437bfbebSnyanmisaka RK_U32 dec_pic_match : 1; // 0x0400 MPP_DEC_NOTIFY_BUFFER_MATCH 189*437bfbebSnyanmisaka RK_U32 reserv0800 : 1; // 0x0800 190*437bfbebSnyanmisaka 191*437bfbebSnyanmisaka RK_U32 dec_pkt_idx : 1; // 0x1000 192*437bfbebSnyanmisaka RK_U32 dec_pkt_buf : 1; // 0x2000 193*437bfbebSnyanmisaka RK_U32 dec_slot_idx : 1; // 0x4000 MPP_DEC_NOTIFY_SLOT_VALID 194*437bfbebSnyanmisaka }; 195*437bfbebSnyanmisaka } PaserTaskWait; 196*437bfbebSnyanmisaka 197*437bfbebSnyanmisaka typedef union DecTaskStatus_u { 198*437bfbebSnyanmisaka RK_U32 val; 199*437bfbebSnyanmisaka struct { 200*437bfbebSnyanmisaka RK_U32 task_hnd_rdy : 1; 201*437bfbebSnyanmisaka RK_U32 mpp_pkt_in_rdy : 1; 202*437bfbebSnyanmisaka RK_U32 dec_pkt_idx_rdy : 1; 203*437bfbebSnyanmisaka RK_U32 dec_pkt_buf_rdy : 1; 204*437bfbebSnyanmisaka RK_U32 task_valid_rdy : 1; 205*437bfbebSnyanmisaka RK_U32 dec_pkt_copy_rdy : 1; 206*437bfbebSnyanmisaka RK_U32 prev_task_rdy : 1; 207*437bfbebSnyanmisaka RK_U32 info_task_gen_rdy : 1; 208*437bfbebSnyanmisaka RK_U32 curr_task_rdy : 1; 209*437bfbebSnyanmisaka RK_U32 task_parsed_rdy : 1; 210*437bfbebSnyanmisaka RK_U32 mpp_in_frm_at_pkt : 1; 211*437bfbebSnyanmisaka }; 212*437bfbebSnyanmisaka } DecTaskStatus; 213*437bfbebSnyanmisaka 214*437bfbebSnyanmisaka typedef struct MppPktTimestamp_t { 215*437bfbebSnyanmisaka struct list_head link; 216*437bfbebSnyanmisaka RK_S64 pts; 217*437bfbebSnyanmisaka RK_S64 dts; 218*437bfbebSnyanmisaka } MppPktTs; 219*437bfbebSnyanmisaka 220*437bfbebSnyanmisaka typedef struct DecTask_t { 221*437bfbebSnyanmisaka HalTaskHnd hnd; 222*437bfbebSnyanmisaka 223*437bfbebSnyanmisaka DecTaskStatus status; 224*437bfbebSnyanmisaka PaserTaskWait wait; 225*437bfbebSnyanmisaka 226*437bfbebSnyanmisaka HalTaskInfo info; 227*437bfbebSnyanmisaka MppPktTs ts_cur; 228*437bfbebSnyanmisaka 229*437bfbebSnyanmisaka MppBuffer hal_pkt_buf_in; 230*437bfbebSnyanmisaka MppBuffer hal_frm_buf_out; 231*437bfbebSnyanmisaka } DecTask; 232*437bfbebSnyanmisaka 233*437bfbebSnyanmisaka #ifdef __cplusplus 234*437bfbebSnyanmisaka extern "C" { 235*437bfbebSnyanmisaka #endif 236*437bfbebSnyanmisaka 237*437bfbebSnyanmisaka MPP_RET dec_task_info_init(HalTaskInfo *task); 238*437bfbebSnyanmisaka void dec_task_init(DecTask *task); 239*437bfbebSnyanmisaka 240*437bfbebSnyanmisaka MPP_RET mpp_dec_proc_cfg(MppDecImpl *dec, MpiCmd cmd, void *param); 241*437bfbebSnyanmisaka 242*437bfbebSnyanmisaka MPP_RET update_dec_hal_info(MppDecImpl *dec, MppFrame frame); 243*437bfbebSnyanmisaka void mpp_dec_put_frame(Mpp *mpp, RK_S32 index, HalDecTaskFlag flags); 244*437bfbebSnyanmisaka RK_S32 mpp_dec_push_display(Mpp *mpp, HalDecTaskFlag flags); 245*437bfbebSnyanmisaka 246*437bfbebSnyanmisaka #ifdef __cplusplus 247*437bfbebSnyanmisaka } 248*437bfbebSnyanmisaka #endif 249*437bfbebSnyanmisaka 250*437bfbebSnyanmisaka #endif /*__MPP_DEC_IMPL_H__*/ 251