1*437bfbebSnyanmisaka /* 2*437bfbebSnyanmisaka * Copyright 2015 Rockchip Electronics Co. LTD 3*437bfbebSnyanmisaka * 4*437bfbebSnyanmisaka * Licensed under the Apache License, Version 2.0 (the "License"); 5*437bfbebSnyanmisaka * you may not use this file except in compliance with the License. 6*437bfbebSnyanmisaka * You may obtain a copy of the License at 7*437bfbebSnyanmisaka * 8*437bfbebSnyanmisaka * http://www.apache.org/licenses/LICENSE-2.0 9*437bfbebSnyanmisaka * 10*437bfbebSnyanmisaka * Unless required by applicable law or agreed to in writing, software 11*437bfbebSnyanmisaka * distributed under the License is distributed on an "AS IS" BASIS, 12*437bfbebSnyanmisaka * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*437bfbebSnyanmisaka * See the License for the specific language governing permissions and 14*437bfbebSnyanmisaka * limitations under the License. 15*437bfbebSnyanmisaka */ 16*437bfbebSnyanmisaka 17*437bfbebSnyanmisaka #ifndef __MPP_DEC_H__ 18*437bfbebSnyanmisaka #define __MPP_DEC_H__ 19*437bfbebSnyanmisaka 20*437bfbebSnyanmisaka #include "rk_type.h" 21*437bfbebSnyanmisaka #include "mpp_err.h" 22*437bfbebSnyanmisaka #include "rk_mpi_cmd.h" 23*437bfbebSnyanmisaka #include "mpp_dec_cfg.h" 24*437bfbebSnyanmisaka 25*437bfbebSnyanmisaka typedef enum MppDecEvent_e { 26*437bfbebSnyanmisaka MPP_DEC_EVENT_ON_PKT_RELEASE, 27*437bfbebSnyanmisaka MPP_DEC_EVENT_ON_FRM_READY, 28*437bfbebSnyanmisaka 29*437bfbebSnyanmisaka MPP_DEC_EVENT_BUTT, 30*437bfbebSnyanmisaka } MppDecEvent; 31*437bfbebSnyanmisaka 32*437bfbebSnyanmisaka typedef void* MppDec; 33*437bfbebSnyanmisaka 34*437bfbebSnyanmisaka typedef struct { 35*437bfbebSnyanmisaka MppCodingType coding; 36*437bfbebSnyanmisaka void *mpp; 37*437bfbebSnyanmisaka 38*437bfbebSnyanmisaka MppDecCfg cfg; 39*437bfbebSnyanmisaka } MppDecInitCfg; 40*437bfbebSnyanmisaka 41*437bfbebSnyanmisaka #ifdef __cplusplus 42*437bfbebSnyanmisaka extern "C" { 43*437bfbebSnyanmisaka #endif 44*437bfbebSnyanmisaka 45*437bfbebSnyanmisaka MPP_RET mpp_dec_init(MppDec *ctx, MppDecInitCfg *cfg); 46*437bfbebSnyanmisaka MPP_RET mpp_dec_deinit(MppDec ctx); 47*437bfbebSnyanmisaka 48*437bfbebSnyanmisaka MPP_RET mpp_dec_start(MppDec ctx); 49*437bfbebSnyanmisaka MPP_RET mpp_dec_stop(MppDec ctx); 50*437bfbebSnyanmisaka 51*437bfbebSnyanmisaka MPP_RET mpp_dec_reset(MppDec ctx); 52*437bfbebSnyanmisaka MPP_RET mpp_dec_flush(MppDec ctx); 53*437bfbebSnyanmisaka MPP_RET mpp_dec_control(MppDec ctx, MpiCmd cmd, void *param); 54*437bfbebSnyanmisaka MPP_RET mpp_dec_notify(MppDec ctx, RK_U32 flag); 55*437bfbebSnyanmisaka MPP_RET mpp_dec_callback(MppDec ctx, MppDecEvent event, void *arg); 56*437bfbebSnyanmisaka 57*437bfbebSnyanmisaka /* update init cfg before init */ 58*437bfbebSnyanmisaka MPP_RET mpp_dec_set_cfg_by_cmd(MppDecCfg cfg, MpiCmd cmd, void *param); 59*437bfbebSnyanmisaka 60*437bfbebSnyanmisaka /* 61*437bfbebSnyanmisaka * return positive value for the number of decoded frame 62*437bfbebSnyanmisaka * return zero for decoding success but no frame decoded 63*437bfbebSnyanmisaka * return negtive value for decoding flow failed 64*437bfbebSnyanmisaka */ 65*437bfbebSnyanmisaka MPP_RET mpp_dec_decode(MppDec ctx, MppPacket packet); 66*437bfbebSnyanmisaka 67*437bfbebSnyanmisaka #ifdef __cplusplus 68*437bfbebSnyanmisaka } 69*437bfbebSnyanmisaka #endif 70*437bfbebSnyanmisaka 71*437bfbebSnyanmisaka #endif /*__MPP_DEC_H__*/ 72