xref: /rockchip-linux_mpp/inc/vpu_api.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /*
2  * Copyright 2015 Rockchip Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __VPU_API_H__
18 #define __VPU_API_H__
19 
20 #include "rk_type.h"
21 #include "mpp_err.h"
22 
23 /**
24  * @brief rockchip media process interface
25  */
26 
27 #define VPU_API_NOPTS_VALUE          (0x8000000000000000LL)
28 
29 /*
30  * bit definition of ColorType in structure VPU_FRAME
31  */
32 #define VPU_OUTPUT_FORMAT_TYPE_MASK                 (0x0000ffff)
33 #define VPU_OUTPUT_FORMAT_ARGB8888                  (0x00000000)
34 #define VPU_OUTPUT_FORMAT_ABGR8888                  (0x00000001)
35 #define VPU_OUTPUT_FORMAT_RGB888                    (0x00000002)
36 #define VPU_OUTPUT_FORMAT_RGB565                    (0x00000003)
37 #define VPU_OUTPUT_FORMAT_RGB555                    (0x00000004)
38 #define VPU_OUTPUT_FORMAT_YUV420_SEMIPLANAR         (0x00000005)
39 #define VPU_OUTPUT_FORMAT_YUV420_PLANAR             (0x00000006)
40 #define VPU_OUTPUT_FORMAT_YUV422                    (0x00000007)
41 #define VPU_OUTPUT_FORMAT_YUV444                    (0x00000008)
42 #define VPU_OUTPUT_FORMAT_YCH420                    (0x00000009)
43 #define VPU_OUTPUT_FORMAT_BIT_MASK                  (0x000f0000)
44 #define VPU_OUTPUT_FORMAT_BIT_8                     (0x00000000)
45 #define VPU_OUTPUT_FORMAT_BIT_10                    (0x00010000)
46 #define VPU_OUTPUT_FORMAT_BIT_12                    (0x00020000)
47 #define VPU_OUTPUT_FORMAT_BIT_14                    (0x00030000)
48 #define VPU_OUTPUT_FORMAT_BIT_16                    (0x00040000)
49 #define VPU_OUTPUT_FORMAT_FBC_MASK                  (0x00f00000)
50 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V1               (0x00100000)
51 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V2               (0x00200000)
52 #define VPU_OUTPUT_FORMAT_DYNCRANGE_MASK            (0x0f000000)
53 #define VPU_OUTPUT_FORMAT_DYNCRANGE_SDR             (0x00000000)
54 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR10           (0x01000000)
55 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_HLG         (0x02000000)
56 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_DLBY        (0x03000000)
57 
58 /**
59  * @brief input picture type
60  */
61 typedef enum {
62     ENC_INPUT_YUV420_PLANAR = 0,              /**< YYYY... UUUU... VVVV */
63     ENC_INPUT_YUV420_SEMIPLANAR = 1,          /**< YYYY... UVUVUV...    */
64     ENC_INPUT_YUV422_INTERLEAVED_YUYV = 2,    /**< YUYVYUYV...          */
65     ENC_INPUT_YUV422_INTERLEAVED_UYVY = 3,    /**< UYVYUYVY...          */
66     ENC_INPUT_RGB565 = 4,                     /**< 16-bit RGB           */
67     ENC_INPUT_BGR565 = 5,                     /**< 16-bit RGB           */
68     ENC_INPUT_RGB555 = 6,                     /**< 15-bit RGB           */
69     ENC_INPUT_BGR555 = 7,                     /**< 15-bit RGB           */
70     ENC_INPUT_RGB444 = 8,                     /**< 12-bit RGB           */
71     ENC_INPUT_BGR444 = 9,                     /**< 12-bit RGB           */
72     ENC_INPUT_RGB888 = 10,                    /**< 24-bit RGB           */
73     ENC_INPUT_BGR888 = 11,                    /**< 24-bit RGB           */
74     ENC_INPUT_RGB101010 = 12,                 /**< 30-bit RGB           */
75     ENC_INPUT_BGR101010 = 13,                 /**< 30-bit RGB           */
76     ENC_INPUT_YUV420_SEMIPLANAR_VU = 0X100    /**< YYYY... VUVUVUVU...  */
77 } EncInputPictureType;
78 
79 typedef enum VPU_API_CMD {
80     VPU_API_ENC_SETCFG,
81     VPU_API_ENC_GETCFG,
82     VPU_API_ENC_SETFORMAT,
83     VPU_API_ENC_SETIDRFRAME,
84 
85     VPU_API_ENABLE_DEINTERLACE,
86     VPU_API_SET_VPUMEM_CONTEXT,
87     VPU_API_USE_PRESENT_TIME_ORDER,
88     VPU_API_SET_DEFAULT_WIDTH_HEIGH,
89     VPU_API_SET_INFO_CHANGE,
90     VPU_API_USE_FAST_MODE,
91     VPU_API_DEC_GET_STREAM_COUNT,
92     VPU_API_GET_VPUMEM_USED_COUNT,
93     VPU_API_GET_FRAME_INFO,
94     VPU_API_SET_OUTPUT_BLOCK,
95     VPU_API_GET_EOS_STATUS,
96     VPU_API_SET_OUTPUT_MODE,
97     VPU_API_SET_FRAME_INFO,
98 
99     /* get sps/pps header */
100     VPU_API_GET_EXTRA_INFO = 0x200,
101 
102     VPU_API_SET_IMMEDIATE_OUT = 0x1000,
103     VPU_API_SET_PARSER_SPLIT_MODE,          /* NOTE: should control before init */
104     VPU_API_DEC_OUT_FRM_STRUCT_TYPE,
105     VPU_API_DEC_EN_THUMBNAIL,
106     VPU_API_DEC_EN_HDR_META,
107     VPU_API_DEC_EN_MVC,
108     VPU_API_DEC_EN_FBC_HDR_256_ODD,
109     VPU_API_SET_INPUT_BLOCK,
110     VPU_API_SET_DISABLE_ERROR,
111     VPU_API_SET_DIS_ERR_CLR_MARK,
112 
113     /* set pkt/frm ready callback */
114     VPU_API_SET_PKT_RDY_CB = 0x1100,
115     VPU_API_SET_FRM_RDY_CB,
116 
117     VPU_API_ENC_VEPU22_START = 0x2000,
118     VPU_API_ENC_SET_VEPU22_CFG,
119     VPU_API_ENC_GET_VEPU22_CFG,
120     VPU_API_ENC_SET_VEPU22_CTU_QP,
121     VPU_API_ENC_SET_VEPU22_ROI,
122 
123     VPU_API_ENC_MPP        = 0x3000,
124     VPU_API_ENC_MPP_SETCFG,
125     VPU_API_ENC_MPP_GETCFG,
126 
127     /* mlvec dynamic configure */
128     VPU_API_ENC_MLVEC_CFG = 0x4000,
129     VPU_API_ENC_SET_MAX_TID,
130     VPU_API_ENC_SET_MARK_LTR,
131     VPU_API_ENC_SET_USE_LTR,
132     VPU_API_ENC_SET_FRAME_QP,
133     VPU_API_ENC_SET_BASE_LAYER_PID,
134 } VPU_API_CMD;
135 
136 typedef struct {
137     RK_U32   TimeLow;
138     RK_U32   TimeHigh;
139 } TIME_STAMP;
140 
141 typedef struct {
142     RK_U32   CodecType;
143     RK_U32   ImgWidth;
144     RK_U32   ImgHeight;
145     RK_U32   ImgHorStride;
146     RK_U32   ImgVerStride;
147     RK_U32   BufSize;
148 } VPU_GENERIC;
149 
150 typedef struct VPUMem {
151     RK_U32  phy_addr;
152     RK_U32 *vir_addr;
153     RK_U32  size;
154     RK_U32 *offset;
155 } VPUMemLinear_t;
156 
157 typedef struct tVPU_FRAME {
158     RK_U32              FrameBusAddr[2];    // 0: Y address; 1: UV address;
159     RK_U32              FrameWidth;         // buffer horizontal stride
160     RK_U32              FrameHeight;        // buffer vertical   stride
161     RK_U32              OutputWidth;        // deprecated
162     RK_U32              OutputHeight;       // deprecated
163     RK_U32              DisplayWidth;       // valid width  for display
164     RK_U32              DisplayHeight;      // valid height for display
165     RK_U32              CodingType;
166     RK_U32              FrameType;          // frame; top_field_first; bot_field_first
167     RK_U32              ColorType;
168     RK_U32              DecodeFrmNum;
169     TIME_STAMP          ShowTime;
170     RK_U32              ErrorInfo;          // error information
171     RK_U32              employ_cnt;
172     VPUMemLinear_t      vpumem;
173     struct tVPU_FRAME  *next_frame;
174     union {
175         struct {
176             RK_U32      Res0[2];
177             struct {
178                 RK_U32      ColorPrimaries : 8;
179                 RK_U32      ColorTransfer  : 8;
180                 RK_U32      ColorCoeffs    : 8;
181                 RK_U32      ColorRange     : 1;
182                 RK_U32      Res1           : 7;
183             };
184 
185             RK_U32      Res2;
186         };
187 
188         RK_U32          Res[4];
189     };
190 } VPU_FRAME;
191 
192 typedef struct FrameThumbInfo {
193     RK_U32      enable;
194     RK_U32      yOffset;
195     RK_U32      uvOffset;
196 } FrameThumbInfo_t;
197 
198 typedef struct FrameHdrInfo {
199     RK_U32      isHdr;
200     RK_U32      offset;
201     RK_U32      size;
202 } FrameHdrInfo_t;
203 
204 typedef struct VideoFrame {
205     VPU_FRAME        vpuFrame;
206     FrameThumbInfo_t thumbInfo;
207     FrameHdrInfo_t   hdrInfo;
208     RK_U32           viewId;
209     RK_U32           reserved[16];
210 } VideoFrame_t;
211 
212 typedef struct VideoPacket {
213     RK_S64 pts;                /* with unit of us*/
214     RK_S64 dts;                /* with unit of us*/
215     RK_U8 *data;
216     RK_S32 size;
217     RK_U32 capability;
218     RK_U32 nFlags;
219 } VideoPacket_t;
220 
221 typedef struct DecoderOut {
222     RK_U8 *data;
223     RK_U32 size;
224     RK_S64 timeUs;
225     RK_S32 nFlags;
226 } DecoderOut_t;
227 
228 typedef struct ParserOut {
229     RK_U8 *data;
230     RK_U32 size;
231     RK_S64 timeUs;
232     RK_U32 nFlags;
233     RK_U32 width;
234     RK_U32 height;
235 } ParserOut_t;
236 
237 typedef struct EncInputStream {
238     RK_U8 *buf;
239     RK_S32 size;
240     RK_U32 bufPhyAddr;
241     RK_S64 timeUs;
242     RK_U32 nFlags;
243 } EncInputStream_t;
244 
245 typedef struct EncoderOut {
246     RK_U8 *data;
247     RK_S32 size;
248     RK_S64 timeUs;
249     RK_S32 keyFrame;
250 
251 } EncoderOut_t;
252 
253 typedef RK_S32 (*VpuFrmRdyCbFunc)(void *cb_ctx);
254 
255 typedef struct {
256     VpuFrmRdyCbFunc cb;
257     void           *cbCtx;
258 } FrameRdyCB;
259 
260 /*
261  * @brief Enumeration used to define the possible video compression codings.
262  * @note  This essentially refers to file extensions. If the coding is
263  *        being used to specify the ENCODE type, then additional work
264  *        must be done to configure the exact flavor of the compression
265  *        to be used.  For decode cases where the user application can
266  *        not differentiate between MPEG-4 and H.264 bit streams, it is
267  *        up to the codec to handle this.
268  *
269  *        sync with the omx_video.h
270  */
271 typedef enum OMX_RK_VIDEO_CODINGTYPE {
272     OMX_RK_VIDEO_CodingUnused,                          /**< Value when coding is N/A */
273     OMX_RK_VIDEO_CodingAutoDetect,                      /**< Autodetection of coding type */
274     OMX_RK_VIDEO_CodingMPEG2,                           /**< AKA: H.262 */
275     OMX_RK_VIDEO_CodingH263,                            /**< H.263 */
276     OMX_RK_VIDEO_CodingMPEG4,                           /**< MPEG-4 */
277     OMX_RK_VIDEO_CodingWMV,                             /**< Windows Media Video (WMV1,WMV2,WMV3)*/
278     OMX_RK_VIDEO_CodingRV,                              /**< all versions of Real Video */
279     OMX_RK_VIDEO_CodingAVC,                             /**< H.264/AVC */
280     OMX_RK_VIDEO_CodingMJPEG,                           /**< Motion JPEG */
281     OMX_RK_VIDEO_CodingVP8,                             /**< VP8 */
282     OMX_RK_VIDEO_CodingVP9,                             /**< VP9 */
283     OMX_RK_VIDEO_CodingVC1 = 0x01000000,                /**< Windows Media Video (WMV1,WMV2,WMV3)*/
284     OMX_RK_VIDEO_CodingFLV1,                            /**< Sorenson H.263 */
285     OMX_RK_VIDEO_CodingDIVX3,                           /**< DIVX3 */
286     OMX_RK_VIDEO_CodingVP6,
287     OMX_RK_VIDEO_CodingHEVC,                            /**< H.265/HEVC */
288     OMX_RK_VIDEO_CodingAVSPLUS,                         /**< AVS+ profile 0x48 */
289     OMX_RK_VIDEO_CodingAVS,                             /**< AVS  profile 0x20 */
290     OMX_RK_VIDEO_CodingAVS2,                            /**< AVS2 */
291     OMX_RK_VIDEO_CodingAV1,                             /**< av1 */
292     OMX_RK_VIDEO_CodingKhronosExtensions = 0x6F000000,  /**< Reserved region for introducing Khronos Standard Extensions */
293     OMX_RK_VIDEO_CodingVendorStartUnused = 0x7F000000,  /**< Reserved region for introducing Vendor Extensions */
294     OMX_RK_VIDEO_CodingMax = 0x7FFFFFFF
295 } OMX_RK_VIDEO_CODINGTYPE;
296 
297 typedef enum CODEC_TYPE {
298     CODEC_NONE,
299     CODEC_DECODER,
300     CODEC_ENCODER,
301     CODEC_BUTT,
302 } CODEC_TYPE;
303 
304 typedef enum VPU_API_ERR {
305     VPU_API_OK                      = 0,
306     VPU_API_ERR_UNKNOW              = -1,
307     VPU_API_ERR_BASE                = -1000,
308     VPU_API_ERR_LIST_STREAM         = VPU_API_ERR_BASE - 1,
309     VPU_API_ERR_INIT                = VPU_API_ERR_BASE - 2,
310     VPU_API_ERR_VPU_CODEC_INIT      = VPU_API_ERR_BASE - 3,
311     VPU_API_ERR_STREAM              = VPU_API_ERR_BASE - 4,
312     VPU_API_ERR_FATAL_THREAD        = VPU_API_ERR_BASE - 5,
313     VPU_API_EOS_STREAM_REACHED      = VPU_API_ERR_BASE - 11,
314 
315     VPU_API_ERR_BUTT,
316 } VPU_API_ERR;
317 
318 typedef enum VPU_FRAME_ERR {
319     VPU_FRAME_ERR_UNKNOW           = 0x0001,
320     VPU_FRAME_ERR_UNSUPPORT        = 0x0002,
321 
322 } VPU_FRAME_ERR;
323 
324 typedef struct EncParameter {
325     RK_S32 width;
326     RK_S32 height;
327     RK_S32 rc_mode;                 /* 0 - CQP mode; 1 - CBR mode; 2 - FIXQP mode*/
328     RK_S32 bitRate;                 /* target bitrate */
329     RK_S32 framerate;
330     RK_S32 qp;
331     RK_S32 enableCabac;
332     RK_S32 cabacInitIdc;
333     RK_S32 format;
334     RK_S32 intraPicRate;
335     RK_S32 framerateout;
336     RK_S32 profileIdc;
337     RK_S32 levelIdc;
338     RK_S32 reserved[3];
339 } EncParameter_t;
340 
341 typedef struct EXtraCfg {
342     RK_S32 vc1extra_size;
343     RK_S32 vp6codeid;
344     RK_S32 tsformat;
345     RK_U32 ori_vpu; /* use origin vpu framework */
346     /* below used in decode */
347     RK_U32 mpp_mode;     /* use mpp framework */
348     RK_U32 bit_depth;    /* 8 or 10 bit */
349     RK_U32 yuv_format;   /* 0:420 1:422 2:444 */
350     RK_U32 reserved[16];
351 } EXtraCfg_t;
352 
353 /**
354  * @brief vpu function interface
355  */
356 typedef struct VpuCodecContext {
357     void* vpuApiObj;
358 
359     CODEC_TYPE codecType;
360     OMX_RK_VIDEO_CODINGTYPE videoCoding;
361 
362     RK_U32 width;
363     RK_U32 height;
364     void  *extradata;
365     RK_S32 extradata_size;
366 
367     RK_U8  enableparsing;
368 
369     RK_S32 no_thread;
370     EXtraCfg_t extra_cfg;
371 
372     void* private_data;
373 
374     /*
375      ** 1: error state(not working)  0: working
376     */
377     RK_S32 decoder_err;
378 
379 
380     /**
381      * Allocate and initialize an VpuCodecContext.
382      *
383      * @param ctx The context of vpu api, allocated in this function.
384      * @param extraData The extra data of codec, some codecs need / can
385      *        use extradata like Huffman tables, also live VC1 codec can
386      *        use extradata to initialize itself.
387      * @param extra_size The size of extra data.
388      *
389      * @return 0 for init success, others for failure.
390      * @note check whether ctx has been allocated success after you do init.
391      */
392     RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size);
393     /**
394      * @brief both send video stream packet to decoder and get video frame from
395      *        decoder at the same time
396      * @param ctx The context of vpu codec
397      * @param pkt[in] Stream to be decoded
398      * @param aDecOut[out] Decoding frame
399      * @return 0 for decode success, others for failure.
400      */
401     RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut);
402     /**
403      * @brief both send video frame to encoder and get encoded video stream from
404      *        encoder at the same time.
405      * @param ctx The context of vpu codec
406      * @param aEncInStrm[in] Frame to be encoded
407      * @param aEncOut[out] Encoding stream
408      * @return 0 for encode success, others for failure.
409      */
410     RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut);
411     /**
412      * @brief flush codec while do fast forward playing.
413      * @param ctx The context of vpu codec
414      * @return 0 for flush success, others for failure.
415      */
416     RK_S32 (*flush)(struct VpuCodecContext *ctx);
417     RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CMD cmdType, void* param);
418     /**
419      * @brief send video stream packet to decoder only, async interface
420      * @param ctx The context of vpu codec
421      * @param pkt Stream to be decoded
422      * @return 0 for success, others for failure.
423      */
424     RK_S32 (*decode_sendstream)(struct VpuCodecContext *ctx, VideoPacket_t *pkt);
425     /**
426      * @brief get video frame from decoder only, async interface
427      * @param ctx The context of vpu codec
428      * @param aDecOut Decoding frame
429      * @return 0 for success, others for failure.
430      */
431     RK_S32 (*decode_getframe)(struct VpuCodecContext *ctx, DecoderOut_t *aDecOut);
432     /**
433      * @brief send video frame to encoder only, async interface
434      * @param ctx The context of vpu codec
435      * @param aEncInStrm Frame to be encoded
436      * @return 0 for success, others for failure.
437      */
438     RK_S32 (*encoder_sendframe)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm);
439     /**
440      * @brief get encoded video packet from encoder only, async interface
441      * @param ctx The context of vpu codec
442      * @param aEncOut Encoding stream
443      * @return 0 for success, others for failure.
444      */
445     RK_S32 (*encoder_getstream)(struct VpuCodecContext *ctx, EncoderOut_t *aEncOut);
446 } VpuCodecContext_t;
447 
448 /* allocated vpu codec context */
449 #ifdef __cplusplus
450 extern "C"
451 {
452 #endif
453 
454 /**
455  * @brief open context of vpu
456  * @param ctx pointer of vpu codec context
457  */
458 RK_S32 vpu_open_context(struct VpuCodecContext **ctx);
459 /**
460  * @brief close context of vpu
461  * @param ctx pointer of vpu codec context
462  */
463 RK_S32 vpu_close_context(struct VpuCodecContext **ctx);
464 
465 #ifdef __cplusplus
466 }
467 #endif
468 
469 /*
470  * vpu_mem api
471  */
472 #define vpu_display_mem_pool_FIELDS \
473     RK_S32 (*commit_hdl)(vpu_display_mem_pool *p, RK_S32 hdl, RK_S32 size); \
474     void* (*get_free)(vpu_display_mem_pool *p); \
475     RK_S32 (*inc_used)(vpu_display_mem_pool *p, void *hdl); \
476     RK_S32 (*put_used)(vpu_display_mem_pool *p, void *hdl); \
477     RK_S32 (*reset)(vpu_display_mem_pool *p); \
478     RK_S32 (*get_unused_num)(vpu_display_mem_pool *p); \
479     RK_S32 buff_size;\
480     float version; \
481     RK_S32 res[18];
482 
483 typedef struct vpu_display_mem_pool vpu_display_mem_pool;
484 
485 struct vpu_display_mem_pool {
486     vpu_display_mem_pool_FIELDS
487 };
488 
489 #ifdef __cplusplus
490 extern "C"
491 {
492 #endif
493 
494 /*
495  * vpu memory handle interface
496  */
497 RK_S32 VPUMemJudgeIommu(void);
498 RK_S32 VPUMallocLinear(VPUMemLinear_t *p, RK_U32 size);
499 RK_S32 VPUFreeLinear(VPUMemLinear_t *p);
500 RK_S32 VPUMemDuplicate(VPUMemLinear_t *dst, VPUMemLinear_t *src);
501 RK_S32 VPUMemLink(VPUMemLinear_t *p);
502 RK_S32 VPUMemFlush(VPUMemLinear_t *p);
503 RK_S32 VPUMemClean(VPUMemLinear_t *p);
504 RK_S32 VPUMemInvalidate(VPUMemLinear_t *p);
505 RK_S32 VPUMemGetFD(VPUMemLinear_t *p);
506 RK_S32 VPUMallocLinearFromRender(VPUMemLinear_t *p, RK_U32 size, void *ctx);
507 
508 /*
509  * vpu memory allocator and manager interface
510  */
511 vpu_display_mem_pool* open_vpu_memory_pool(void);
512 void close_vpu_memory_pool(vpu_display_mem_pool *p);
513 int create_vpu_memory_pool_allocator(vpu_display_mem_pool **ipool, int num, int size);
514 void release_vpu_memory_pool_allocator(vpu_display_mem_pool *ipool);
515 
516 #ifdef __cplusplus
517 }
518 #endif
519 
520 #endif /*__VPU_API_H__*/
521