xref: /rockchip-linux_mpp/inc/rk_mpi_cmd.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1*437bfbebSnyanmisaka /*
2*437bfbebSnyanmisaka  * Copyright 2015 Rockchip Electronics Co. LTD
3*437bfbebSnyanmisaka  *
4*437bfbebSnyanmisaka  * Licensed under the Apache License, Version 2.0 (the "License");
5*437bfbebSnyanmisaka  * you may not use this file except in compliance with the License.
6*437bfbebSnyanmisaka  * You may obtain a copy of the License at
7*437bfbebSnyanmisaka  *
8*437bfbebSnyanmisaka  *      http://www.apache.org/licenses/LICENSE-2.0
9*437bfbebSnyanmisaka  *
10*437bfbebSnyanmisaka  * Unless required by applicable law or agreed to in writing, software
11*437bfbebSnyanmisaka  * distributed under the License is distributed on an "AS IS" BASIS,
12*437bfbebSnyanmisaka  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*437bfbebSnyanmisaka  * See the License for the specific language governing permissions and
14*437bfbebSnyanmisaka  * limitations under the License.
15*437bfbebSnyanmisaka  */
16*437bfbebSnyanmisaka 
17*437bfbebSnyanmisaka #ifndef __RK_MPI_CMD_H__
18*437bfbebSnyanmisaka #define __RK_MPI_CMD_H__
19*437bfbebSnyanmisaka 
20*437bfbebSnyanmisaka /*
21*437bfbebSnyanmisaka  * Command id bit usage is defined as follows:
22*437bfbebSnyanmisaka  * bit 20 - 23  - module id
23*437bfbebSnyanmisaka  * bit 16 - 19  - contex id
24*437bfbebSnyanmisaka  * bit  0 - 15  - command id
25*437bfbebSnyanmisaka  */
26*437bfbebSnyanmisaka #define CMD_MODULE_ID_MASK              (0x00F00000)
27*437bfbebSnyanmisaka #define CMD_MODULE_OSAL                 (0x00100000)
28*437bfbebSnyanmisaka #define CMD_MODULE_MPP                  (0x00200000)
29*437bfbebSnyanmisaka #define CMD_MODULE_CODEC                (0x00300000)
30*437bfbebSnyanmisaka #define CMD_MODULE_HAL                  (0x00400000)
31*437bfbebSnyanmisaka 
32*437bfbebSnyanmisaka #define CMD_CTX_ID_MASK                 (0x000F0000)
33*437bfbebSnyanmisaka #define CMD_CTX_ID_DEC                  (0x00010000)
34*437bfbebSnyanmisaka #define CMD_CTX_ID_ENC                  (0x00020000)
35*437bfbebSnyanmisaka #define CMD_CTX_ID_ISP                  (0x00030000)
36*437bfbebSnyanmisaka 
37*437bfbebSnyanmisaka /* separate encoder / decoder control command to different segment */
38*437bfbebSnyanmisaka #define CMD_CFG_ID_MASK                 (0x0000FF00)
39*437bfbebSnyanmisaka 
40*437bfbebSnyanmisaka /* mpp status control command */
41*437bfbebSnyanmisaka #define CMD_STATE_OPS                   (0x00000100)
42*437bfbebSnyanmisaka 
43*437bfbebSnyanmisaka /* decoder control command */
44*437bfbebSnyanmisaka #define CMD_DEC_CFG_ALL                 (0x00000000)
45*437bfbebSnyanmisaka #define CMD_DEC_QUERY                   (0x00000100)
46*437bfbebSnyanmisaka #define CMD_DEC_CFG                     (0x00000200)
47*437bfbebSnyanmisaka 
48*437bfbebSnyanmisaka /* encoder control command */
49*437bfbebSnyanmisaka #define CMD_ENC_CFG_ALL                 (0x00000000)
50*437bfbebSnyanmisaka #define CMD_ENC_QUERY                   (0x00000100)
51*437bfbebSnyanmisaka #define CMD_ENC_CFG_RC_API              (0x00000200)
52*437bfbebSnyanmisaka 
53*437bfbebSnyanmisaka #define CMD_ENC_CFG_MISC                (0x00008000)
54*437bfbebSnyanmisaka #define CMD_ENC_CFG_SPLIT               (0x00008100)
55*437bfbebSnyanmisaka #define CMD_ENC_CFG_REF                 (0x00008200)
56*437bfbebSnyanmisaka #define CMD_ENC_CFG_ROI                 (0x00008300)
57*437bfbebSnyanmisaka #define CMD_ENC_CFG_OSD                 (0x00008400)
58*437bfbebSnyanmisaka #define CMD_ENC_CFG_USERDATA            (0x00008500)
59*437bfbebSnyanmisaka 
60*437bfbebSnyanmisaka typedef enum {
61*437bfbebSnyanmisaka     MPP_OSAL_CMD_BASE                   = CMD_MODULE_OSAL,
62*437bfbebSnyanmisaka     MPP_OSAL_CMD_END,
63*437bfbebSnyanmisaka 
64*437bfbebSnyanmisaka     MPP_CMD_BASE                        = CMD_MODULE_MPP,
65*437bfbebSnyanmisaka     MPP_ENABLE_DEINTERLACE,
66*437bfbebSnyanmisaka     MPP_SET_INPUT_BLOCK,                /* deprecated */
67*437bfbebSnyanmisaka     MPP_SET_INTPUT_BLOCK_TIMEOUT,       /* deprecated */
68*437bfbebSnyanmisaka     MPP_SET_OUTPUT_BLOCK,               /* deprecated */
69*437bfbebSnyanmisaka     MPP_SET_OUTPUT_BLOCK_TIMEOUT,       /* deprecated */
70*437bfbebSnyanmisaka     /*
71*437bfbebSnyanmisaka      * timeout setup, refer to  MPP_TIMEOUT_XXX
72*437bfbebSnyanmisaka      * zero     - non block
73*437bfbebSnyanmisaka      * negative - block with no timeout
74*437bfbebSnyanmisaka      * positive - timeout in milisecond
75*437bfbebSnyanmisaka      */
76*437bfbebSnyanmisaka     MPP_SET_INPUT_TIMEOUT,              /* parameter type RK_S64 */
77*437bfbebSnyanmisaka     MPP_SET_OUTPUT_TIMEOUT,             /* parameter type RK_S64 */
78*437bfbebSnyanmisaka     MPP_SET_DISABLE_THREAD,             /* MPP no thread mode and use external thread to decode */
79*437bfbebSnyanmisaka     MPP_SET_SELECT_TIMEOUT,             /* kmpp path select operation timeout */
80*437bfbebSnyanmisaka     MPP_SET_VENC_INIT_KCFG,             /* kmpp path venc init cfg set */
81*437bfbebSnyanmisaka 
82*437bfbebSnyanmisaka     MPP_STATE_CMD_BASE                  = CMD_MODULE_MPP | CMD_STATE_OPS,
83*437bfbebSnyanmisaka     MPP_START,
84*437bfbebSnyanmisaka     MPP_STOP,
85*437bfbebSnyanmisaka     MPP_PAUSE,
86*437bfbebSnyanmisaka     MPP_RESUME,
87*437bfbebSnyanmisaka 
88*437bfbebSnyanmisaka     MPP_CMD_END,
89*437bfbebSnyanmisaka 
90*437bfbebSnyanmisaka     MPP_CODEC_CMD_BASE                  = CMD_MODULE_CODEC,
91*437bfbebSnyanmisaka     MPP_CODEC_GET_FRAME_INFO,
92*437bfbebSnyanmisaka     MPP_CODEC_CMD_END,
93*437bfbebSnyanmisaka 
94*437bfbebSnyanmisaka     MPP_DEC_CMD_BASE                    = CMD_MODULE_CODEC | CMD_CTX_ID_DEC,
95*437bfbebSnyanmisaka     MPP_DEC_SET_FRAME_INFO,             /* vpu api legacy control for buffer slot dimension init */
96*437bfbebSnyanmisaka     MPP_DEC_SET_EXT_BUF_GROUP,          /* IMPORTANT: set external buffer group to mpp decoder */
97*437bfbebSnyanmisaka     MPP_DEC_SET_INFO_CHANGE_READY,
98*437bfbebSnyanmisaka     MPP_DEC_SET_PRESENT_TIME_ORDER,     /* use input time order for output */
99*437bfbebSnyanmisaka     MPP_DEC_SET_PARSER_SPLIT_MODE,      /* Need to setup before init */
100*437bfbebSnyanmisaka     MPP_DEC_SET_PARSER_FAST_MODE,       /* Need to setup before init */
101*437bfbebSnyanmisaka     MPP_DEC_GET_STREAM_COUNT,
102*437bfbebSnyanmisaka     MPP_DEC_GET_VPUMEM_USED_COUNT,
103*437bfbebSnyanmisaka     MPP_DEC_SET_VC1_EXTRA_DATA,
104*437bfbebSnyanmisaka     MPP_DEC_SET_OUTPUT_FORMAT,
105*437bfbebSnyanmisaka     MPP_DEC_SET_DISABLE_ERROR,          /* When set it will disable sw/hw error (H.264 / H.265) */
106*437bfbebSnyanmisaka     MPP_DEC_SET_IMMEDIATE_OUT,
107*437bfbebSnyanmisaka     MPP_DEC_SET_ENABLE_DEINTERLACE,     /* MPP enable deinterlace by default. Vpuapi can disable it */
108*437bfbebSnyanmisaka     MPP_DEC_SET_ENABLE_FAST_PLAY,       /* enable idr output immediately */
109*437bfbebSnyanmisaka     MPP_DEC_SET_DISABLE_THREAD,         /* MPP no thread mode and use external thread to decode */
110*437bfbebSnyanmisaka     MPP_DEC_SET_MAX_USE_BUFFER_SIZE,
111*437bfbebSnyanmisaka     MPP_DEC_SET_ENABLE_MVC,             /* enable MVC decoding*/
112*437bfbebSnyanmisaka     MPP_DEC_GET_THUMBNAIL_FRAME_INFO,   /* update thumbnail frame info to user, for MPP_FRAME_THUMBNAIL_ONLY mode */
113*437bfbebSnyanmisaka     MPP_DEC_SET_DISABLE_DPB_CHECK,      /* disable dpb discontinuous check */
114*437bfbebSnyanmisaka     MPP_DEC_SET_CODEC_MODE,             /* select codec mode */
115*437bfbebSnyanmisaka     MPP_DEC_SET_DIS_ERR_CLR_MARK,
116*437bfbebSnyanmisaka 
117*437bfbebSnyanmisaka     MPP_DEC_CMD_QUERY                   = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_QUERY,
118*437bfbebSnyanmisaka     /* query decoder runtime information for decode stage */
119*437bfbebSnyanmisaka     MPP_DEC_QUERY,                      /* set and get MppDecQueryCfg structure */
120*437bfbebSnyanmisaka 
121*437bfbebSnyanmisaka     CMD_DEC_CMD_CFG                     = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_CFG,
122*437bfbebSnyanmisaka     MPP_DEC_SET_CFG,                    /* set MppDecCfg structure */
123*437bfbebSnyanmisaka     MPP_DEC_GET_CFG,                    /* get MppDecCfg structure */
124*437bfbebSnyanmisaka 
125*437bfbebSnyanmisaka     MPP_DEC_CMD_END,
126*437bfbebSnyanmisaka 
127*437bfbebSnyanmisaka     MPP_ENC_CMD_BASE                    = CMD_MODULE_CODEC | CMD_CTX_ID_ENC,
128*437bfbebSnyanmisaka     /* basic encoder setup control */
129*437bfbebSnyanmisaka     MPP_ENC_SET_CFG,                    /* set MppEncCfg structure */
130*437bfbebSnyanmisaka     MPP_ENC_GET_CFG,                    /* get MppEncCfg structure */
131*437bfbebSnyanmisaka     MPP_ENC_SET_PREP_CFG,               /* deprecated set MppEncPrepCfg structure, use MPP_ENC_SET_CFG instead */
132*437bfbebSnyanmisaka     MPP_ENC_GET_PREP_CFG,               /* deprecated get MppEncPrepCfg structure, use MPP_ENC_GET_CFG instead */
133*437bfbebSnyanmisaka     MPP_ENC_SET_RC_CFG,                 /* deprecated set MppEncRcCfg structure, use MPP_ENC_SET_CFG instead */
134*437bfbebSnyanmisaka     MPP_ENC_GET_RC_CFG,                 /* deprecated get MppEncRcCfg structure, use MPP_ENC_GET_CFG instead */
135*437bfbebSnyanmisaka     MPP_ENC_SET_CODEC_CFG,              /* deprecated set MppEncCodecCfg structure, use MPP_ENC_SET_CFG instead */
136*437bfbebSnyanmisaka     MPP_ENC_GET_CODEC_CFG,              /* deprecated get MppEncCodecCfg structure, use MPP_ENC_GET_CFG instead */
137*437bfbebSnyanmisaka     /* runtime encoder setup control */
138*437bfbebSnyanmisaka     MPP_ENC_SET_IDR_FRAME,              /* next frame will be encoded as intra frame */
139*437bfbebSnyanmisaka     MPP_ENC_SET_OSD_LEGACY_0,           /* deprecated */
140*437bfbebSnyanmisaka     MPP_ENC_SET_OSD_LEGACY_1,           /* deprecated */
141*437bfbebSnyanmisaka     MPP_ENC_SET_OSD_LEGACY_2,           /* deprecated */
142*437bfbebSnyanmisaka     MPP_ENC_GET_HDR_SYNC,               /* get vps / sps / pps which has better sync behavior parameter is MppPacket */
143*437bfbebSnyanmisaka     MPP_ENC_GET_EXTRA_INFO,             /* deprecated */
144*437bfbebSnyanmisaka     MPP_ENC_SET_SEI_CFG,                /* SEI: Supplement Enhancemant Information, parameter is MppSeiMode */
145*437bfbebSnyanmisaka     MPP_ENC_GET_SEI_DATA,               /* SEI: Supplement Enhancemant Information, parameter is MppPacket */
146*437bfbebSnyanmisaka     MPP_ENC_PRE_ALLOC_BUFF,             /* deprecated */
147*437bfbebSnyanmisaka     MPP_ENC_SET_QP_RANGE,               /* used for adjusting qp range, the parameter can be 1 or 2 */
148*437bfbebSnyanmisaka     MPP_ENC_SET_ROI_CFG,                /* set MppEncROICfg structure */
149*437bfbebSnyanmisaka     MPP_ENC_SET_CTU_QP,                 /* for H265 Encoder,set CTU's size and QP */
150*437bfbebSnyanmisaka     MPP_ENC_GET_ROI_CFG,                /* get MppEncROICfg structure */
151*437bfbebSnyanmisaka     MPP_ENC_SET_JPEG_ROI_CFG,           /* set MppJpegROICfg structure */
152*437bfbebSnyanmisaka     MPP_ENC_GET_JPEG_ROI_CFG,           /* get MppJpegROICfg structure */
153*437bfbebSnyanmisaka 
154*437bfbebSnyanmisaka     MPP_ENC_CMD_QUERY                   = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_QUERY,
155*437bfbebSnyanmisaka     /* query encoder runtime information for encode stage */
156*437bfbebSnyanmisaka     MPP_ENC_QUERY,                      /* set and get MppEncQueryCfg structure */
157*437bfbebSnyanmisaka 
158*437bfbebSnyanmisaka     /* User define rate control stategy API control */
159*437bfbebSnyanmisaka     MPP_ENC_CFG_RC_API                  = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_RC_API,
160*437bfbebSnyanmisaka     /*
161*437bfbebSnyanmisaka      * Get RcApiQueryAll structure
162*437bfbebSnyanmisaka      * Get all available rate control stategy string and count
163*437bfbebSnyanmisaka      */
164*437bfbebSnyanmisaka     MPP_ENC_GET_RC_API_ALL              = MPP_ENC_CFG_RC_API + 1,
165*437bfbebSnyanmisaka     /*
166*437bfbebSnyanmisaka      * Get RcApiQueryType structure
167*437bfbebSnyanmisaka      * Get available rate control stategy string with certain type
168*437bfbebSnyanmisaka      */
169*437bfbebSnyanmisaka     MPP_ENC_GET_RC_API_BY_TYPE          = MPP_ENC_CFG_RC_API + 2,
170*437bfbebSnyanmisaka     /*
171*437bfbebSnyanmisaka      * Set RcImplApi structure
172*437bfbebSnyanmisaka      * Add new or update rate control stategy function pointers
173*437bfbebSnyanmisaka      */
174*437bfbebSnyanmisaka     MPP_ENC_SET_RC_API_CFG              = MPP_ENC_CFG_RC_API + 3,
175*437bfbebSnyanmisaka     /*
176*437bfbebSnyanmisaka      * Get RcApiBrief structure
177*437bfbebSnyanmisaka      * Get current used rate control stategy brief information (type and name)
178*437bfbebSnyanmisaka      */
179*437bfbebSnyanmisaka     MPP_ENC_GET_RC_API_CURRENT          = MPP_ENC_CFG_RC_API + 4,
180*437bfbebSnyanmisaka     /*
181*437bfbebSnyanmisaka      * Set RcApiBrief structure
182*437bfbebSnyanmisaka      * Set current used rate control stategy brief information (type and name)
183*437bfbebSnyanmisaka      */
184*437bfbebSnyanmisaka     MPP_ENC_SET_RC_API_CURRENT          = MPP_ENC_CFG_RC_API + 5,
185*437bfbebSnyanmisaka 
186*437bfbebSnyanmisaka     MPP_ENC_CFG_MISC                    = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MISC,
187*437bfbebSnyanmisaka     MPP_ENC_SET_HEADER_MODE,            /* set MppEncHeaderMode */
188*437bfbebSnyanmisaka     MPP_ENC_GET_HEADER_MODE,            /* get MppEncHeaderMode */
189*437bfbebSnyanmisaka 
190*437bfbebSnyanmisaka     MPP_ENC_CFG_SPLIT                   = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_SPLIT,
191*437bfbebSnyanmisaka     MPP_ENC_SET_SPLIT,                  /* set MppEncSliceSplit structure */
192*437bfbebSnyanmisaka     MPP_ENC_GET_SPLIT,                  /* get MppEncSliceSplit structure */
193*437bfbebSnyanmisaka 
194*437bfbebSnyanmisaka     MPP_ENC_CFG_REF                     = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_REF,
195*437bfbebSnyanmisaka     MPP_ENC_SET_REF_CFG,                /* set MppEncRefCfg structure */
196*437bfbebSnyanmisaka     MPP_ENC_GET_REF_CFG,
197*437bfbebSnyanmisaka 
198*437bfbebSnyanmisaka     MPP_ENC_CFG_OSD                     = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_OSD,
199*437bfbebSnyanmisaka     MPP_ENC_SET_OSD_PLT_CFG,            /* set OSD palette, parameter should be pointer to MppEncOSDPltCfg */
200*437bfbebSnyanmisaka     MPP_ENC_GET_OSD_PLT_CFG,            /* get OSD palette, parameter should be pointer to MppEncOSDPltCfg */
201*437bfbebSnyanmisaka     MPP_ENC_SET_OSD_DATA_CFG,           /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */
202*437bfbebSnyanmisaka 
203*437bfbebSnyanmisaka     MPP_ENC_CFG_USERDATA                = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_USERDATA,
204*437bfbebSnyanmisaka     MPP_ENC_SET_USERDATA,
205*437bfbebSnyanmisaka     MPP_ENC_GET_USERDATA,
206*437bfbebSnyanmisaka     MPP_ENC_CMD_END,
207*437bfbebSnyanmisaka 
208*437bfbebSnyanmisaka     MPP_ISP_CMD_BASE                    = CMD_MODULE_CODEC | CMD_CTX_ID_ISP,
209*437bfbebSnyanmisaka     MPP_ISP_CMD_END,
210*437bfbebSnyanmisaka 
211*437bfbebSnyanmisaka     MPP_HAL_CMD_BASE                    = CMD_MODULE_HAL,
212*437bfbebSnyanmisaka     MPP_HAL_CMD_END,
213*437bfbebSnyanmisaka 
214*437bfbebSnyanmisaka     MPI_CMD_BUTT,
215*437bfbebSnyanmisaka } MpiCmd;
216*437bfbebSnyanmisaka 
217*437bfbebSnyanmisaka #include "rk_vdec_cmd.h"
218*437bfbebSnyanmisaka #include "rk_vdec_cfg.h"
219*437bfbebSnyanmisaka #include "rk_venc_cmd.h"
220*437bfbebSnyanmisaka #include "rk_venc_cfg.h"
221*437bfbebSnyanmisaka #include "rk_venc_ref.h"
222*437bfbebSnyanmisaka 
223*437bfbebSnyanmisaka #endif /*__RK_MPI_CMD_H__*/
224