xref: /rkbin/tools/ddrbin_tool_user_guide.txt (revision 612e733e7ea847d9a7358c27d16443ddc8d77ad8)

function 1: modify ddr.bin file from ddrbin_param.txt.
	1) modify 'ddrbin_param.txt', set ddr frequency, uart info etc what you want.
	   If want to keep items default, please keep these items blank.
	2) run 'ddrbin_tool' with argument 1: ddrbin_param.txt, argument 2: ddr bin file.
	   like: ./ddrbin_tool ddrbin_param.txt px30_ddr_333MHz_v1.13.bin

function 2: get ddr.bin file config to gen_param.txt file
	If want to get ddrbin file config, please run like that:
	./ddrbin_tool -g gen_param.txt px30_ddr_333MHz_v1.15.bin
	The config will show in gen_param.txt.

Note:	The function 1 and function 2 are two separate functions
	The gen_param.txt file which is generated by function 2 no need use in function 1.

The detail information as following:

* support ddrbin version
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|   platform    | uart info | ddr freq | ssmod | DDR 2T | sr pd | drv, odt, Vref etc| dis training info | eye sacn | res space remap|
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|  PX30/RK3326  |   V1.11   |     X    |   X   |  V1.12 | V1.15 |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK1808     |   V1.03   |   V1.03  |   X   |  V1.03 | V1.04 |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK322x     |   V1.08   |   V1.08  |   X   |  V1.09 |   X   |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK322xh    |   V1.14   |     X    |   X   |  V1.16 | V1.17 |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3288     |   V1.07   |     X    |   X   |  V1.08 |   X   |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3308     |   V1.28   |   V1.28  |   X   |  V1.29 | V1.30 |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3368     |   V2.04   |   V2.04  |   X   |  V2.05 |   X   |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3328     |   V1.14   |     X    |   X   |  V1.16 | V1.17 |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3399     |   V1.25   |     X    | V1.25 |    X   |   X   |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	| RK3399PRO NPU |   V1.03   |   V1.03  |   X   |  V1.03 |   X   |          X        |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	| RV1126/RV1109 |   V1.00   |   V1.00  | V1.05 |  V1.00 | V1.05 |        V1.05      |         X         |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	| RK3566/RK3568 |   V1.00   |   V1.00  | V1.06 |  V1.00 | V1.00 |        V1.06      |       V1.07       |     X    |       X        |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+
	|    RK3588     |   V1.00   |   V1.00  |   X   |  V1.00 | V1.00 |        V1.00      |       V1.03       |   V1.06  |      V1.06     |
	+---------------+-----------+----------+-------+--------+-------+-------------------+-------------------+----------+----------------+

* UART info

uart id: uart number. 0 for uart0, 1 for uart1, 2 for uart2..., 0xf will disable uart.
uart iomux: uart iomux info, 0 for uartn_m0, 1 for uartn_m1, 2 for uartn_m2...(like uart2_m0, uart2_m1,uart2_m2),
or 1 for uartn_a, 2 for uartn_b, 3 for uartn_c.(like uar2a, uart2b, uart2c).
uart baudrate: uart baudrate should be 115200 or 1500000.

* disable print training information

dis_printf_training: 1: will disabled print training information; 0: will enable print training information.

* remap pcie 100M reg to DDR

res_space_remap: 1: will remap pcie 100M reg to DDR memory space.

* DDR eye scanning
1) eye_2d_scan_en: 1: will enable 2D eye scanning for debug purpose, vref and skew eye scanning.
2) wr_vref_scan_en: 1: enable vref scan and use scanning result for write.
3) rd_vref_scan_en: 1: enable vref scan and use scanning result for read.

* DDR (final) freq

ddr2_freq: ddr2 frequency,  unit:MHz.
lp2_freq: lpddr2 frequency,  unit:MHz.
ddr3_freq: ddr3 frequency,  unit:MHz.
lp3_freq: lpddr3 frequency,  unit:MHz.
ddr4_freq: ddr4 frequency,  unit:MHz.
lp4_freq: lpddr4 frequency,  unit:MHz.
lp4x_freq: lpddr4x frequency,  unit:MHz.
lp5_freq: lpddr5 frequency,  unit:MHz.

For RV1126/RV1109, RK3566/RK3568, RK3588 those frequencies are the final freq in loader.

+---------------+--------------------------------------------------------+
|   platform    |                    support frequencies                 |
+---------------+--------------------------------------------------------+
|  PX30/RK3326  |                              X                         |
+---------------+--------------------------------------------------------+
|    RK1808     |                    333,400,533,666,786,933             |
+---------------+--------------------------------------------------------+
|    RK322x     |                     not larger than 800                |
+---------------+--------------------------------------------------------+
|    RK322xh    |                              X                         |
+---------------+--------------------------------------------------------+
|    RK3288     |                              X                         |
+---------------+--------------------------------------------------------+
|    RK3308     |                         393,451,589                    |
+---------------+--------------------------------------------------------+
|    RK3368     |    DDR3 not larger than 800, LP3 not larger than 666   |
+---------------+--------------------------------------------------------+
|    RK3328     |                              X                         |
+---------------+--------------------------------------------------------+
|    RK3399     |                              X                         |
+---------------+--------------------------------------------------------+
| RK3399PRO NPU |                   333,400,533,666,786,933              |
+---------------+--------------------------------------------------------+
| RV1126/RV1109 |               328,396,528,664,784,924,1056             |
+---------------+--------------------------------------------------------+
| RK3566/RK3568 |      324,396,528,630,780,920,1056,1184,1332,1560       |
+---------------+--------------------------------------------------------+
|    RK3588     | LP4/LP4x [306.5MHz - 2133MHz]; LP5: [400MHz - 2750MHz] |
+---------------+--------------------------------------------------------+

* DDR frequencies(add more)

ddr2_f1_freq_mhz: ddr2 frequency number 1,  unit:MHz.
ddr2_f2_freq_mhz: ddr2 frequency number 2,  unit:MHz.
ddr2_f3_freq_mhz: ddr2 frequency number 3,  unit:MHz.
ddr2_f4_freq_mhz: ddr2 frequency number 4,  unit:MHz.
ddr2_f5_freq_mhz: ddr2 frequency number 5,  unit:MHz.
...

ddr*_f*_freq_mhz/lp*_f*_freq_mhz: Only RV1126/RV1109, RK3566/RK3568, RK3588 used.
The program will initialize dram by following order.
for example: ddr4_f1_freq_mhz --> ddr4_f2_freq_mhz --> ddr4_f3_freq_mhz --> ddr4_freq.
And the final frequency is ddr4_freq to boot system.
The ddr frequency table in kernel dts/dtsi file need correspond to these frequencies.
So it is better to arrange the frequency values in order as above. That means the max freq is in final freq(lp*/ddr*_freq) and the min freq is in 'ddr*/lp*_f1_freq_mhz'.
Such as:	ddr*/lp*_f1_freq_mhz < ddr*/lp*_f2_freq_mhz < ddr*/lp*_f3_freq_mhz < lp*/ddr*_freq(the final freq)
For example:
	...
	ddr4_freq=1560
	...
	ddr4_f1_freq_mhz=324
	ddr4_f2_freq_mhz=528
	ddr4_f3_freq_mhz=780
	...

* SR PD idle

sr_idle: auto self-refresh mode delay time.
pd_idle: auto power-down mode delay time.

* DDR 2T

ddr_2t: ddr 2T timing mode. 1: enable ddr 2T, 0: disable ddr 2T.

* PLL ssmod

These parameters are about Spread Spectrum Modulator(ssmod) for PLL.
ssmod_downspread: ssmod work mode. 0: down spread, 1: center spread.
ssmod_div: Divider required to set the modulation frequency. RK3308 suggests to ssmod_div=2, others platforms suggest to ssmod_div=5.
ssmod_spread: spread amplitude % = 0.1 * ssmod_spread; 0: disable ssmod, others will enable ssmod, max to 0x1f.

* driver strength

phy_ddr*_dq_drv_when_odten_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt on. unit: ohm.
phy_ddr*_ca_drv_when_odten_ohm: The PHY CMD/ADDR driver strength when DRAM odt on. unit: ohm.
phy_ddr*_clk_drv_when_odten_ohm: The PHY clock driver strength when DRAM odt on. unit: ohm.
ddr*_dq_drv_when_odten_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt on. unit: ohm.
phy_ddr*_dq_drv_when_odtoff_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt off. unit: ohm.
phy_ddr*_ca_drv_when_odtoff_ohm: The PHY CMD/ADDR driver strength when DRAM odt off. unit: ohm.
phy_ddr*_clk_drv_when_odtoff_ohm: The PHY clock driver strength when DRAM odt off. unit: ohm.
ddr*_dq_drv_when_odtoff_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt off. unit: ohm.

The phy side driver strength support value as follows:
+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+
|   platform    |        DDR3       |        DDR4       |     LP3      |       LP4       |  LP4X pull up  | LP4X pull down |      LP5    |
+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+
|               | 455,230,153,115,  | 482,244,162,122,  |              | 501,253,168,126,|                |                |             |
|               | 91,76,65,57,51,46,| 97,81,69,61,54,48,|              | 101,84,72,63,56,|                |                |             |
| RV1126/RV1109 | 41,38,35,32,30,28,| 44,40,37,34,32,30,| follow DDR4  | 50,46,42,38,36, |  follow LP4    |   follow LP4   |      X      |
|               | 27,25,24,23,22,21,| 28,27,25,24,23,22,|              | 33,31,29,28,26, |                |                |             |
|               | 20                | 21                |              | 25,24,23,22     |                |                |             |
+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+
|               | 500,250,167,125,  | 556,279,185,139,  |              | 576,289,192,144,| 646,323,215,   | 513,259,172,   |             |
|               | 100,83,71,63,56,  | 111,93,79,69,62,  |              | 115,96,82,72,64,| 162,129,108,92,| 130,104,86,74, |             |
| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37,|  follow DDR4 | 57,52,48,44,41, | 81,72,65,59,54,| 65,58,52,47,43,|      X      |
|               | 31,29,28,26,25,24,| 34,32,31,29,27,26,|              | 38,36,34,32,30, | 50,46,43,40,38,| 40,37,35,32,30,|             |
|               | 23,22             | 25,24             |              | 28,27,26,25     | 36,34,32,31,29,| 29,27,26,25,24,|             |
|               |                   |                   |              |                 | 28             | 23             |             |
+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+
|    RK3588     |         X         |         X         |       X      |  240,120,80,60, |   follow LP4   |   follow LP4   | follow LP4  |
|               |                   |                   |              |   48,40,34,30   |                |                |             |
+---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+

The DRAM side driver strength support value as follows:
+---------------+-------------------+-------------------+----------------+----------------------+----------------+-------------+
|   platform    |        DDR3       |        DDR4       |     LP3        |           LP4        |      LP4X      |     LP5     |
+---------------+-------------------+-------------------+----------------+----------------------+----------------+-------------+
|     all       |       40,34       |        34,48      | 34,40,48,60,80 |  40,48,60,80,120,240 |   follow LP4   | follow LP4  |
+---------------+-------------------+-------------------+----------------+----------------------+----------------+-------------+

* ODT
phy_ddr*_odt_ohm: The PHY ODT strength(read direction). unit: ohm.
ddr*_odt_ohm: The DRAM ODT strength(write direction). unit: ohm.
phy_ddr*_odt_pull_up_en: 1: enable PHY pull up odt. 0: disable
phy_ddr*_odt_pull_dn_en: 1: enable PHY pull down odt. 0: disable
phy_ddr*_odten_freq_mhz: The PHY odt enable when larger than this frequency. unit: MHz.
ddr*_odten_freq_mhz: The DRAM odt(DQ/DQS) enable when larger than this frequency. unit: MHz.

The phy side ODT support value as follows:
The ODT "0" means disabled ODT.
+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+
|   platform    |        DDR3       |       DDR4         |       LP3    |         LP4       |  LP4X pull up  | LP4X pull down |     LP5     |
+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+
|               | 0,561,282,188,141,| 0,586,294,196,148, |              | 0,604,303,202,152,|                |                |             |
|               | 113,94,81,72,64,  | 118,99,58,76,67,60,|              | 122,101,87,78,69, |                |                |             |
| RV1126/RV1109 | 58,52,48,44,41,   | 55,50,46,43,40,38, | follow DDR4  | 62,56,52,48,44,41,|  follow LP4    |   follow LP4   |      X      |
|               | 38,37,34,32,31,29,| 36,34,32,31,29,28, |              | 39,37,35,33,32,30,|                |                |             |
|               | 28,27,25          | 27                 |              | 29,27             |                |                |             |
+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+
|               | 0,500,250,167,125,| 0,556,279,185,139, |              | 0,576,289,192,144,| 0,646,323,215, | 0,513,259,172, |             |
|               | 100,83,71,63,56,  | 111,93,79,69,62,   |              | 115,96,82,72,64,  | 162,129,108,92,| 130,104,86,74, |             |
| RK3566/RK3568 | 50,45,41,38,36,33,| 55,50,46,42,39,37, | follow DDR4  | 57,52,48,44,41,   | 81,72,65,59,54,| 65,58,52,47,43,|      X      |
|               | 31,29,28,26,25,24,| 34,32,31,29,27,26, |              | 38,36,34,32,30,   | 50,46,43,40,38,| 40,37,35,32,30,|             |
|               | 23,22             | 25,24              |              | 28,27,26,25       | 36,34,32,31,29,| 29,27,26,25,24,|             |
|               |                   |                    |              |                   | 28             | 23             |             |
+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+
|    RK3588     |         X         |          X         |       X      |   0,240,120,80,   |   follow LP4   |   follow LP4   | follow LP4  |
|               |                   |                    |              |  60,48,40,34,30   |                |                |             |
+---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+

The DRAM side ODT support value as follows:
+---------------+-------------------+-------------------+--------------+-----------------------+----------------+---------------+
|   platform    |        DDR3       |        DDR4       |     LP3      | LP4(include DQ and CA)|      LP4X      |      LP5      |
+---------------+-------------------+-------------------+--------------+-----------------------+----------------+---------------+
|     all       |    0,40,60,120    | 0,34,40,48,60,120 | 0,60,120,240 | 0,40,48,60,80,120,240 |   follow LP4   |   follow LP4  |
+---------------+-------------------+-------------------+--------------+-----------------------+----------------+---------------+

* slew rate

phy_ddr*_dq_sr_when_odten: The PHY DQ/DQS slew rate when odt on.
phy_ddr*_ca_sr_when_odten: The PHY CMD/ADDR slew rate when odt on.
phy_ddr*_clk_sr_when_odten: The PHY clock slew rate when odt on.
phy_ddr*_dq_sr_when_odtoff: The PHY DQ/DQS slew rate when odt off.
phy_ddr*_ca_sr_when_odtoff: The PHY CMD/ADDR slew rate when odt off.
phy_ddr*_clk_sr_when_odtoff: The PHY clock slew rate when odt off.

The max value is 0x1f, the min is 0x0.

* byte map

ddr*_bytes_map: The bytes remap in PHY.

* dq remap

lp*_dq*_*_map: The dq remap in PHY.
ddr*_cs*_dq*_dq*_map: The dq remap in PHY.

* lp4/lp4x more information

lp4*_ca_odten_freq_mhz: The DRAM CMD/ADDR odt enable when larger than this frequency. unit: MHz.
phy_lp4*_dq_vref_when_odten: The PHY VrefDQ when PHY odt on. uint: parts per thousand.
lp4*_dq_vref_when_odten: The DRAM VrefDQ when DRAM DQ/DQS odt on. uint: parts per thousand.
lp4*_ca_vref_when_odten: The DRAM VrefCA when DRAM CA odt on. uint: parts per thousand.
phy_lp4_dq_vref_when_odtoff:  The PHY VrefDQ when PHY odt off. uint: parts per thousand.
lp4_dq_vref_when_odtoff: The DRAM VrefDQ when DRAM DQ/DQS odt off. uint: parts per thousand.
lp4_ca_vref_when_odtoff: The DRAM VrefCA when DRAM CA odt off. uint: parts per thousand.

* hash info
ch/bank/rank_mask*: is used to DDR address hash mask.