xref: /rkbin/doc/release/RK3562_EN.md (revision 5b2037f335850ce555560cbecbc040b4b6c80603)
14574e1d2SJoseph Chen# RK3562 Release Note
24574e1d2SJoseph Chen
3*5b2037f3SFinley Xiao## rk3562_bl31_v1.09.elf
4*5b2037f3SFinley Xiao
5*5b2037f3SFinley Xiao| Date       | File                  | Build commit | Severity  |
6*5b2037f3SFinley Xiao| ---------- | :-------------------- | ------------ | --------- |
7*5b2037f3SFinley Xiao| 2023-03-08 | rk3562_bl31_v1.09.elf | 6a1e56879    | important |
8*5b2037f3SFinley Xiao
9*5b2037f3SFinley Xiao### New
10*5b2037f3SFinley Xiao
11*5b2037f3SFinley Xiao1. Add support to change pvtpll length according to otp and opp flag .
12*5b2037f3SFinley Xiao
13*5b2037f3SFinley Xiao------
1478fade4fSYifeng Zhao## rk3562_spl_v1.03.bin
1578fade4fSYifeng Zhao
1678fade4fSYifeng Zhao| Date       | File                  | Build commit | Severity  |
1778fade4fSYifeng Zhao| ---------- | :-------------------- | ----------- | -------- |
1878fade4fSYifeng Zhao| 2023-03-06 | rk3562_spl_v1.03.bin | 7ff748e19 | important     |
1978fade4fSYifeng Zhao
2078fade4fSYifeng Zhao### New
2178fade4fSYifeng Zhao
2278fade4fSYifeng Zhao1. First release version.
2378fade4fSYifeng Zhao
2478fade4fSYifeng Zhao------
2578fade4fSYifeng Zhao
26e53c80efSFinley Xiao## rk3562_bl31_v1.08.elf
27e53c80efSFinley Xiao
28e53c80efSFinley Xiao| Date       | File                  | Build commit | Severity  |
29e53c80efSFinley Xiao| ---------- | :-------------------- | ------------ | --------- |
30e53c80efSFinley Xiao| 2023-02-27 | rk3562_bl31_v1.08.elf | 1f6088dc0    | important |
31e53c80efSFinley Xiao
32e53c80efSFinley Xiao### New
33e53c80efSFinley Xiao
34e53c80efSFinley Xiao1. Change clock to normal pll when supend and reset.
35e53c80efSFinley Xiao
36e53c80efSFinley Xiao------
379bef93d4Sshengfei Xu## rk3562_bl31_v1.07.elf
389bef93d4Sshengfei Xu
399bef93d4Sshengfei Xu| Date       | File                  | Build commit | Severity  |
409bef93d4Sshengfei Xu| ---------- | :-------------------- | ------------ | --------- |
419bef93d4Sshengfei Xu| 2023-02-22 | rk3562_bl31_v1.07.elf | 4d4f21db2    | important |
429bef93d4Sshengfei Xu
439bef93d4Sshengfei Xu### New
449bef93d4Sshengfei Xu
459bef93d4Sshengfei Xu1. Support vdd_logic off in the system suspend.
469bef93d4Sshengfei Xu
479bef93d4Sshengfei Xu------
489bef93d4Sshengfei Xu
4952e2193eSTang Yun ping## rk3562_ddr_{1560...324}MHz_v1.04.bin
5052e2193eSTang Yun ping
5152e2193eSTang Yun ping| Date       | File                            | Build commit                              | Severity  |
5252e2193eSTang Yun ping| ---------- | :-------------------------------- | ---------------------------------------------- | -------- |
5352e2193eSTang Yun ping| 2023-02-14 | rk3562_ddr_{1560...324}MHz_v1.04.bin | bae1baa081 | important |
5452e2193eSTang Yun ping
5552e2193eSTang Yun ping### Fixed
5652e2193eSTang Yun ping
5752e2193eSTang Yun ping| Index | Severity  | Update                                  | Issue description                                            | Issue source |
5852e2193eSTang Yun ping| ----- | --------- | --------------------------------------- | ------------------------------------------------------------ | ------------ |
5952e2193eSTang Yun ping| 1     | moderate  | fix bug of uart print can't be disabled | uart print can't be disabled by ddrbin_tool                  | -            |
6052e2193eSTang Yun ping| 2     | important | update OS_REG rules                     | OS_REG0 may reset by reboot with NPOR, It lead to reboot maskrom failure. Use OS_REG8 replace OS_REG0 to fix this bug. | -            |
6152e2193eSTang Yun ping
6252e2193eSTang Yun ping------
6352e2193eSTang Yun ping
649520c75eSFinley Xiao## rk3562_bl31_v1.06.elf
659520c75eSFinley Xiao
669520c75eSFinley Xiao| Date       | File                  | Build commit | Severity  |
679520c75eSFinley Xiao| ---------- | :-------------------- | ------------ | --------- |
689520c75eSFinley Xiao| 2023-02-09 | rk3562_bl31_v1.06.elf | de0f55c9c    | important |
699520c75eSFinley Xiao
709520c75eSFinley Xiao### New
719520c75eSFinley Xiao
729520c75eSFinley Xiao1. Add crypto rng and klad clocks support.
739520c75eSFinley Xiao2. Adjust pvtpll table for npu 800MHz and 900MHz.
749520c75eSFinley Xiao3. Add dmc code.
759520c75eSFinley Xiao
769520c75eSFinley Xiao------
779520c75eSFinley Xiao
78f8b9fd59SJoseph Chen## rk3562_{ddr,spl,usbplug}_v1.x.bin
79f8b9fd59SJoseph Chen
80f8b9fd59SJoseph Chen| Date       | File                            | Build commit                              | Severity  |
81f8b9fd59SJoseph Chen| ---------- | :-------------------------------- | ---------------------------------------------- | -------- |
82f8b9fd59SJoseph Chen| 2023-02-03 | rk3562_{ddr,spl,usbplug}_v1.x.bin | ddr:4d38eafc48#spl:ec5f0a7c43#usbplug:3ed34f88 | important |
83f8b9fd59SJoseph Chen
84f8b9fd59SJoseph Chen### New
85f8b9fd59SJoseph Chen
86f8b9fd59SJoseph Chen1. Initial version.
87f8b9fd59SJoseph Chen
88f8b9fd59SJoseph Chen------
89f8b9fd59SJoseph Chen
904574e1d2SJoseph Chen## rk3562_{bl31,bl32,mcu}_v1.x.bin
914574e1d2SJoseph Chen
924574e1d2SJoseph Chen| Date       | File                            | Build commit                              | Severity  |
934574e1d2SJoseph Chen| ---------- | :------------------------------ | -------------------------------- | -------- |
944574e1d2SJoseph Chen| 2023-02-03 | rk3562_{bl31,bl32,mcu}_v1.x.bin | bl31:none#bl32:512740e0#mcu:none | important |
954574e1d2SJoseph Chen
964574e1d2SJoseph Chen### New
974574e1d2SJoseph Chen
984574e1d2SJoseph Chen1. Initial version.
994574e1d2SJoseph Chen
1004574e1d2SJoseph Chen------
1014574e1d2SJoseph Chen
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