1*a47a12beSStefan Roese /* 2*a47a12beSStefan Roese * (C) Copyright 2002 3*a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*a47a12beSStefan Roese * 5*a47a12beSStefan Roese * See file CREDITS for list of people who contributed to this 6*a47a12beSStefan Roese * project. 7*a47a12beSStefan Roese * 8*a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 9*a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 10*a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 11*a47a12beSStefan Roese * the License, or (at your option) any later version. 12*a47a12beSStefan Roese * 13*a47a12beSStefan Roese * This program is distributed in the hope that it will be useful, 14*a47a12beSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*a47a12beSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*a47a12beSStefan Roese * GNU General Public License for more details. 17*a47a12beSStefan Roese * 18*a47a12beSStefan Roese * You should have received a copy of the GNU General Public License 19*a47a12beSStefan Roese * along with this program; if not, write to the Free Software 20*a47a12beSStefan Roese * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*a47a12beSStefan Roese * MA 02111-1307 USA 22*a47a12beSStefan Roese */ 23*a47a12beSStefan Roese 24*a47a12beSStefan Roese #include <common.h> 25*a47a12beSStefan Roese 26*a47a12beSStefan Roese /* 27*a47a12beSStefan Roese * CPU test 28*a47a12beSStefan Roese * Load/store multiple word instructions: lmw, stmw 29*a47a12beSStefan Roese * 30*a47a12beSStefan Roese * 26 consecutive words are loaded from a source memory buffer 31*a47a12beSStefan Roese * into GPRs r6 through r31. After that, 26 consecutive words are stored 32*a47a12beSStefan Roese * from the GPRs r6 through r31 into a target memory buffer. The contents 33*a47a12beSStefan Roese * of the source and target buffers are then compared. 34*a47a12beSStefan Roese */ 35*a47a12beSStefan Roese 36*a47a12beSStefan Roese #include <post.h> 37*a47a12beSStefan Roese #include "cpu_asm.h" 38*a47a12beSStefan Roese 39*a47a12beSStefan Roese #if CONFIG_POST & CONFIG_SYS_POST_CPU 40*a47a12beSStefan Roese 41*a47a12beSStefan Roese extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); 42*a47a12beSStefan Roese 43*a47a12beSStefan Roese int cpu_post_test_multi (void) 44*a47a12beSStefan Roese { 45*a47a12beSStefan Roese int ret = 0; 46*a47a12beSStefan Roese unsigned int i; 47*a47a12beSStefan Roese int flag = disable_interrupts(); 48*a47a12beSStefan Roese 49*a47a12beSStefan Roese if (ret == 0) 50*a47a12beSStefan Roese { 51*a47a12beSStefan Roese ulong src [26], dst [26]; 52*a47a12beSStefan Roese 53*a47a12beSStefan Roese ulong code[] = 54*a47a12beSStefan Roese { 55*a47a12beSStefan Roese ASM_LMW(5, 3, 0), 56*a47a12beSStefan Roese ASM_STMW(5, 4, 0), 57*a47a12beSStefan Roese ASM_BLR, 58*a47a12beSStefan Roese }; 59*a47a12beSStefan Roese 60*a47a12beSStefan Roese for (i = 0; i < sizeof(src) / sizeof(src[0]); i ++) 61*a47a12beSStefan Roese { 62*a47a12beSStefan Roese src[i] = i; 63*a47a12beSStefan Roese dst[i] = 0; 64*a47a12beSStefan Roese } 65*a47a12beSStefan Roese 66*a47a12beSStefan Roese cpu_post_exec_02(code, (ulong)src, (ulong)dst); 67*a47a12beSStefan Roese 68*a47a12beSStefan Roese ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; 69*a47a12beSStefan Roese } 70*a47a12beSStefan Roese 71*a47a12beSStefan Roese if (ret != 0) 72*a47a12beSStefan Roese { 73*a47a12beSStefan Roese post_log ("Error at multi test !\n"); 74*a47a12beSStefan Roese } 75*a47a12beSStefan Roese 76*a47a12beSStefan Roese if (flag) 77*a47a12beSStefan Roese enable_interrupts(); 78*a47a12beSStefan Roese 79*a47a12beSStefan Roese return ret; 80*a47a12beSStefan Roese } 81*a47a12beSStefan Roese 82*a47a12beSStefan Roese #endif 83