1a47a12beSStefan Roese /* 2a47a12beSStefan Roese * (C) Copyright 2002 3a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4a47a12beSStefan Roese * 5a47a12beSStefan Roese * See file CREDITS for list of people who contributed to this 6a47a12beSStefan Roese * project. 7a47a12beSStefan Roese * 8a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 9a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 10a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 11a47a12beSStefan Roese * the License, or (at your option) any later version. 12a47a12beSStefan Roese * 13a47a12beSStefan Roese * This program is distributed in the hope that it will be useful, 14a47a12beSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 15a47a12beSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16a47a12beSStefan Roese * GNU General Public License for more details. 17a47a12beSStefan Roese * 18a47a12beSStefan Roese * You should have received a copy of the GNU General Public License 19a47a12beSStefan Roese * along with this program; if not, write to the Free Software 20a47a12beSStefan Roese * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21a47a12beSStefan Roese * MA 02111-1307 USA 22a47a12beSStefan Roese */ 23a47a12beSStefan Roese 24a47a12beSStefan Roese #include <common.h> 25a47a12beSStefan Roese 26a47a12beSStefan Roese /* 27a47a12beSStefan Roese * CPU test 28a47a12beSStefan Roese * Integer compare instructions: cmpw, cmplw 29a47a12beSStefan Roese * 30a47a12beSStefan Roese * To verify these instructions the test runs them with 31a47a12beSStefan Roese * different combinations of operands, reads the condition 32a47a12beSStefan Roese * register value and compares it with the expected one. 33a47a12beSStefan Roese * The test contains a pre-built table 34a47a12beSStefan Roese * containing the description of each test case: the instruction, 35a47a12beSStefan Roese * the values of the operands, the condition field to save 36a47a12beSStefan Roese * the result in and the expected result. 37a47a12beSStefan Roese */ 38a47a12beSStefan Roese 39a47a12beSStefan Roese #include <post.h> 40a47a12beSStefan Roese #include "cpu_asm.h" 41a47a12beSStefan Roese 42a47a12beSStefan Roese #if CONFIG_POST & CONFIG_SYS_POST_CPU 43a47a12beSStefan Roese 44a47a12beSStefan Roese extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); 45a47a12beSStefan Roese 46a47a12beSStefan Roese static struct cpu_post_cmp_s 47a47a12beSStefan Roese { 48a47a12beSStefan Roese ulong cmd; 49a47a12beSStefan Roese ulong op1; 50a47a12beSStefan Roese ulong op2; 51a47a12beSStefan Roese ulong cr; 52a47a12beSStefan Roese ulong res; 53a47a12beSStefan Roese } cpu_post_cmp_table[] = 54a47a12beSStefan Roese { 55a47a12beSStefan Roese { 56a47a12beSStefan Roese OP_CMPW, 57a47a12beSStefan Roese 123, 58a47a12beSStefan Roese 123, 59a47a12beSStefan Roese 2, 60a47a12beSStefan Roese 0x02 61a47a12beSStefan Roese }, 62a47a12beSStefan Roese { 63a47a12beSStefan Roese OP_CMPW, 64a47a12beSStefan Roese 123, 65a47a12beSStefan Roese 133, 66a47a12beSStefan Roese 3, 67a47a12beSStefan Roese 0x08 68a47a12beSStefan Roese }, 69a47a12beSStefan Roese { 70a47a12beSStefan Roese OP_CMPW, 71a47a12beSStefan Roese 123, 72a47a12beSStefan Roese -133, 73a47a12beSStefan Roese 4, 74a47a12beSStefan Roese 0x04 75a47a12beSStefan Roese }, 76a47a12beSStefan Roese { 77a47a12beSStefan Roese OP_CMPLW, 78a47a12beSStefan Roese 123, 79a47a12beSStefan Roese 123, 80a47a12beSStefan Roese 2, 81a47a12beSStefan Roese 0x02 82a47a12beSStefan Roese }, 83a47a12beSStefan Roese { 84a47a12beSStefan Roese OP_CMPLW, 85a47a12beSStefan Roese 123, 86a47a12beSStefan Roese -133, 87a47a12beSStefan Roese 3, 88a47a12beSStefan Roese 0x08 89a47a12beSStefan Roese }, 90a47a12beSStefan Roese { 91a47a12beSStefan Roese OP_CMPLW, 92a47a12beSStefan Roese 123, 93a47a12beSStefan Roese 113, 94a47a12beSStefan Roese 4, 95a47a12beSStefan Roese 0x04 96a47a12beSStefan Roese }, 97a47a12beSStefan Roese }; 98*d2397817SMike Frysinger static unsigned int cpu_post_cmp_size = ARRAY_SIZE(cpu_post_cmp_table); 99a47a12beSStefan Roese 100a47a12beSStefan Roese int cpu_post_test_cmp (void) 101a47a12beSStefan Roese { 102a47a12beSStefan Roese int ret = 0; 103a47a12beSStefan Roese unsigned int i; 104a47a12beSStefan Roese int flag = disable_interrupts(); 105a47a12beSStefan Roese 106a47a12beSStefan Roese for (i = 0; i < cpu_post_cmp_size && ret == 0; i++) 107a47a12beSStefan Roese { 108a47a12beSStefan Roese struct cpu_post_cmp_s *test = cpu_post_cmp_table + i; 109a47a12beSStefan Roese unsigned long code[] = 110a47a12beSStefan Roese { 111a47a12beSStefan Roese ASM_2C(test->cmd, test->cr, 3, 4), 112a47a12beSStefan Roese ASM_MFCR(3), 113a47a12beSStefan Roese ASM_BLR 114a47a12beSStefan Roese }; 115a47a12beSStefan Roese ulong res; 116a47a12beSStefan Roese 117a47a12beSStefan Roese cpu_post_exec_12 (code, & res, test->op1, test->op2); 118a47a12beSStefan Roese 119a47a12beSStefan Roese ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1; 120a47a12beSStefan Roese 121a47a12beSStefan Roese if (ret != 0) 122a47a12beSStefan Roese { 123a47a12beSStefan Roese post_log ("Error at cmp test %d !\n", i); 124a47a12beSStefan Roese } 125a47a12beSStefan Roese } 126a47a12beSStefan Roese 127a47a12beSStefan Roese if (flag) 128a47a12beSStefan Roese enable_interrupts(); 129a47a12beSStefan Roese 130a47a12beSStefan Roese return ret; 131a47a12beSStefan Roese } 132a47a12beSStefan Roese 133a47a12beSStefan Roese #endif 134