1a47a12beSStefan Roese /*
2a47a12beSStefan Roese * (C) Copyright 2002
3a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a47a12beSStefan Roese *
5*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
6a47a12beSStefan Roese */
7a47a12beSStefan Roese
8a47a12beSStefan Roese #include <common.h>
9a47a12beSStefan Roese
10a47a12beSStefan Roese /*
11a47a12beSStefan Roese * CPU test
12a47a12beSStefan Roese * Integer compare instructions: cmpw, cmplw
13a47a12beSStefan Roese *
14a47a12beSStefan Roese * To verify these instructions the test runs them with
15a47a12beSStefan Roese * different combinations of operands, reads the condition
16a47a12beSStefan Roese * register value and compares it with the expected one.
17a47a12beSStefan Roese * The test contains a pre-built table
18a47a12beSStefan Roese * containing the description of each test case: the instruction,
19a47a12beSStefan Roese * the values of the operands, the condition field to save
20a47a12beSStefan Roese * the result in and the expected result.
21a47a12beSStefan Roese */
22a47a12beSStefan Roese
23a47a12beSStefan Roese #include <post.h>
24a47a12beSStefan Roese #include "cpu_asm.h"
25a47a12beSStefan Roese
26a47a12beSStefan Roese #if CONFIG_POST & CONFIG_SYS_POST_CPU
27a47a12beSStefan Roese
28a47a12beSStefan Roese extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2);
29a47a12beSStefan Roese
30a47a12beSStefan Roese static struct cpu_post_cmp_s
31a47a12beSStefan Roese {
32a47a12beSStefan Roese ulong cmd;
33a47a12beSStefan Roese ulong op1;
34a47a12beSStefan Roese ulong op2;
35a47a12beSStefan Roese ulong cr;
36a47a12beSStefan Roese ulong res;
37a47a12beSStefan Roese } cpu_post_cmp_table[] =
38a47a12beSStefan Roese {
39a47a12beSStefan Roese {
40a47a12beSStefan Roese OP_CMPW,
41a47a12beSStefan Roese 123,
42a47a12beSStefan Roese 123,
43a47a12beSStefan Roese 2,
44a47a12beSStefan Roese 0x02
45a47a12beSStefan Roese },
46a47a12beSStefan Roese {
47a47a12beSStefan Roese OP_CMPW,
48a47a12beSStefan Roese 123,
49a47a12beSStefan Roese 133,
50a47a12beSStefan Roese 3,
51a47a12beSStefan Roese 0x08
52a47a12beSStefan Roese },
53a47a12beSStefan Roese {
54a47a12beSStefan Roese OP_CMPW,
55a47a12beSStefan Roese 123,
56a47a12beSStefan Roese -133,
57a47a12beSStefan Roese 4,
58a47a12beSStefan Roese 0x04
59a47a12beSStefan Roese },
60a47a12beSStefan Roese {
61a47a12beSStefan Roese OP_CMPLW,
62a47a12beSStefan Roese 123,
63a47a12beSStefan Roese 123,
64a47a12beSStefan Roese 2,
65a47a12beSStefan Roese 0x02
66a47a12beSStefan Roese },
67a47a12beSStefan Roese {
68a47a12beSStefan Roese OP_CMPLW,
69a47a12beSStefan Roese 123,
70a47a12beSStefan Roese -133,
71a47a12beSStefan Roese 3,
72a47a12beSStefan Roese 0x08
73a47a12beSStefan Roese },
74a47a12beSStefan Roese {
75a47a12beSStefan Roese OP_CMPLW,
76a47a12beSStefan Roese 123,
77a47a12beSStefan Roese 113,
78a47a12beSStefan Roese 4,
79a47a12beSStefan Roese 0x04
80a47a12beSStefan Roese },
81a47a12beSStefan Roese };
82d2397817SMike Frysinger static unsigned int cpu_post_cmp_size = ARRAY_SIZE(cpu_post_cmp_table);
83a47a12beSStefan Roese
cpu_post_test_cmp(void)84a47a12beSStefan Roese int cpu_post_test_cmp (void)
85a47a12beSStefan Roese {
86a47a12beSStefan Roese int ret = 0;
87a47a12beSStefan Roese unsigned int i;
88a47a12beSStefan Roese int flag = disable_interrupts();
89a47a12beSStefan Roese
90a47a12beSStefan Roese for (i = 0; i < cpu_post_cmp_size && ret == 0; i++)
91a47a12beSStefan Roese {
92a47a12beSStefan Roese struct cpu_post_cmp_s *test = cpu_post_cmp_table + i;
93a47a12beSStefan Roese unsigned long code[] =
94a47a12beSStefan Roese {
95a47a12beSStefan Roese ASM_2C(test->cmd, test->cr, 3, 4),
96a47a12beSStefan Roese ASM_MFCR(3),
97a47a12beSStefan Roese ASM_BLR
98a47a12beSStefan Roese };
99a47a12beSStefan Roese ulong res;
100a47a12beSStefan Roese
101a47a12beSStefan Roese cpu_post_exec_12 (code, & res, test->op1, test->op2);
102a47a12beSStefan Roese
103a47a12beSStefan Roese ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
104a47a12beSStefan Roese
105a47a12beSStefan Roese if (ret != 0)
106a47a12beSStefan Roese {
107a47a12beSStefan Roese post_log ("Error at cmp test %d !\n", i);
108a47a12beSStefan Roese }
109a47a12beSStefan Roese }
110a47a12beSStefan Roese
111a47a12beSStefan Roese if (flag)
112a47a12beSStefan Roese enable_interrupts();
113a47a12beSStefan Roese
114a47a12beSStefan Roese return ret;
115a47a12beSStefan Roese }
116a47a12beSStefan Roese
117a47a12beSStefan Roese #endif
118