1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * SPDX-License-Identifier: GPL-2.0+ 4 */ 5 6 #ifndef USE_HOSTCC 7 #include <common.h> 8 #include <boot_fit.h> 9 #include <dm.h> 10 #include <dm/of_extra.h> 11 #include <errno.h> 12 #include <fdtdec.h> 13 #include <fdt_support.h> 14 #include <linux/libfdt.h> 15 #include <serial.h> 16 #include <asm/sections.h> 17 #include <linux/ctype.h> 18 #include <linux/lzo.h> 19 20 DECLARE_GLOBAL_DATA_PTR; 21 22 /* 23 * Here are the type we know about. One day we might allow drivers to 24 * register. For now we just put them here. The COMPAT macro allows us to 25 * turn this into a sparse list later, and keeps the ID with the name. 26 * 27 * NOTE: This list is basically a TODO list for things that need to be 28 * converted to driver model. So don't add new things here unless there is a 29 * good reason why driver-model conversion is infeasible. Examples include 30 * things which are used before driver model is available. 31 */ 32 #define COMPAT(id, name) name 33 static const char * const compat_names[COMPAT_COUNT] = { 34 COMPAT(UNKNOWN, "<none>"), 35 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), 36 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), 37 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), 38 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), 39 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), 40 COMPAT(SMSC_LAN9215, "smsc,lan9215"), 41 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"), 42 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"), 43 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"), 44 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"), 45 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), 46 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), 47 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), 48 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), 49 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), 50 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), 51 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"), 52 COMPAT(GENERIC_SPI_FLASH, "spi-flash"), 53 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"), 54 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), 55 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), 56 COMPAT(INTEL_MICROCODE, "intel,microcode"), 57 COMPAT(AMS_AS3722, "ams,as3722"), 58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), 59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), 60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), 61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), 62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), 63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), 64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), 65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), 66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), 67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), 68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), 69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), 70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), 71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), 72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), 73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), 74 COMPAT(ROCKCHIP_NANDC, "rockchip,rk-nandc"), 75 }; 76 77 const char *fdtdec_get_compatible(enum fdt_compat_id id) 78 { 79 /* We allow reading of the 'unknown' ID for testing purposes */ 80 assert(id >= 0 && id < COMPAT_COUNT); 81 return compat_names[id]; 82 } 83 84 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, 85 const char *prop_name, int index, int na, int ns, 86 fdt_size_t *sizep, bool translate) 87 { 88 const fdt32_t *prop, *prop_end; 89 const fdt32_t *prop_addr, *prop_size, *prop_after_size; 90 int len; 91 fdt_addr_t addr; 92 93 debug("%s: %s: ", __func__, prop_name); 94 95 prop = fdt_getprop(blob, node, prop_name, &len); 96 if (!prop) { 97 debug("(not found)\n"); 98 return FDT_ADDR_T_NONE; 99 } 100 prop_end = prop + (len / sizeof(*prop)); 101 102 prop_addr = prop + (index * (na + ns)); 103 prop_size = prop_addr + na; 104 prop_after_size = prop_size + ns; 105 if (prop_after_size > prop_end) { 106 debug("(not enough data: expected >= %d cells, got %d cells)\n", 107 (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); 108 return FDT_ADDR_T_NONE; 109 } 110 111 #if CONFIG_IS_ENABLED(OF_TRANSLATE) 112 if (translate) 113 addr = fdt_translate_address(blob, node, prop_addr); 114 else 115 #endif 116 addr = fdtdec_get_number(prop_addr, na); 117 118 if (sizep) { 119 *sizep = fdtdec_get_number(prop_size, ns); 120 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, 121 (unsigned long long)*sizep); 122 } else { 123 debug("addr=%08llx\n", (unsigned long long)addr); 124 } 125 126 return addr; 127 } 128 129 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, 130 int node, const char *prop_name, int index, fdt_size_t *sizep, 131 bool translate) 132 { 133 int na, ns; 134 135 debug("%s: ", __func__); 136 137 na = fdt_address_cells(blob, parent); 138 if (na < 1) { 139 debug("(bad #address-cells)\n"); 140 return FDT_ADDR_T_NONE; 141 } 142 143 ns = fdt_size_cells(blob, parent); 144 if (ns < 0) { 145 debug("(bad #size-cells)\n"); 146 return FDT_ADDR_T_NONE; 147 } 148 149 debug("na=%d, ns=%d, ", na, ns); 150 151 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, 152 ns, sizep, translate); 153 } 154 155 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, 156 const char *prop_name, int index, fdt_size_t *sizep, 157 bool translate) 158 { 159 int parent; 160 161 debug("%s: ", __func__); 162 163 parent = fdt_parent_offset(blob, node); 164 if (parent < 0) { 165 debug("(no parent found)\n"); 166 return FDT_ADDR_T_NONE; 167 } 168 169 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, 170 index, sizep, translate); 171 } 172 173 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, 174 const char *prop_name, fdt_size_t *sizep) 175 { 176 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; 177 178 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, 179 sizeof(fdt_addr_t) / sizeof(fdt32_t), 180 ns, sizep, false); 181 } 182 183 fdt_addr_t fdtdec_get_addr(const void *blob, int node, 184 const char *prop_name) 185 { 186 return fdtdec_get_addr_size(blob, node, prop_name, NULL); 187 } 188 189 #if defined(CONFIG_PCI) && CONFIG_IS_ENABLED(DM_PCI) 190 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, 191 const char *prop_name, struct fdt_pci_addr *addr) 192 { 193 const u32 *cell; 194 int len; 195 int ret = -ENOENT; 196 197 debug("%s: %s: ", __func__, prop_name); 198 199 /* 200 * If we follow the pci bus bindings strictly, we should check 201 * the value of the node's parent node's #address-cells and 202 * #size-cells. They need to be 3 and 2 accordingly. However, 203 * for simplicity we skip the check here. 204 */ 205 cell = fdt_getprop(blob, node, prop_name, &len); 206 if (!cell) 207 goto fail; 208 209 if ((len % FDT_PCI_REG_SIZE) == 0) { 210 int num = len / FDT_PCI_REG_SIZE; 211 int i; 212 213 for (i = 0; i < num; i++) { 214 debug("pci address #%d: %08lx %08lx %08lx\n", i, 215 (ulong)fdt32_to_cpu(cell[0]), 216 (ulong)fdt32_to_cpu(cell[1]), 217 (ulong)fdt32_to_cpu(cell[2])); 218 if ((fdt32_to_cpu(*cell) & type) == type) { 219 addr->phys_hi = fdt32_to_cpu(cell[0]); 220 addr->phys_mid = fdt32_to_cpu(cell[1]); 221 addr->phys_lo = fdt32_to_cpu(cell[1]); 222 break; 223 } else { 224 cell += (FDT_PCI_ADDR_CELLS + 225 FDT_PCI_SIZE_CELLS); 226 } 227 } 228 229 if (i == num) { 230 ret = -ENXIO; 231 goto fail; 232 } 233 234 return 0; 235 } else { 236 ret = -EINVAL; 237 } 238 239 fail: 240 debug("(not found)\n"); 241 return ret; 242 } 243 244 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) 245 { 246 const char *list, *end; 247 int len; 248 249 list = fdt_getprop(blob, node, "compatible", &len); 250 if (!list) 251 return -ENOENT; 252 253 end = list + len; 254 while (list < end) { 255 char *s; 256 257 len = strlen(list); 258 if (len >= strlen("pciVVVV,DDDD")) { 259 s = strstr(list, "pci"); 260 261 /* 262 * check if the string is something like pciVVVV,DDDD.RR 263 * or just pciVVVV,DDDD 264 */ 265 if (s && s[7] == ',' && 266 (s[12] == '.' || s[12] == 0)) { 267 s += 3; 268 *vendor = simple_strtol(s, NULL, 16); 269 270 s += 5; 271 *device = simple_strtol(s, NULL, 16); 272 273 return 0; 274 } 275 } 276 list += (len + 1); 277 } 278 279 return -ENOENT; 280 } 281 282 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, 283 u32 *bar) 284 { 285 int barnum; 286 287 /* extract the bar number from fdt_pci_addr */ 288 barnum = addr->phys_hi & 0xff; 289 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS)) 290 return -EINVAL; 291 292 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; 293 *bar = dm_pci_read_bar32(dev, barnum); 294 295 return 0; 296 } 297 #endif 298 299 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, 300 uint64_t default_val) 301 { 302 const uint64_t *cell64; 303 int length; 304 305 cell64 = fdt_getprop(blob, node, prop_name, &length); 306 if (!cell64 || length < sizeof(*cell64)) 307 return default_val; 308 309 return fdt64_to_cpu(*cell64); 310 } 311 312 int fdtdec_get_is_enabled(const void *blob, int node) 313 { 314 const char *cell; 315 316 /* 317 * It should say "okay", so only allow that. Some fdts use "ok" but 318 * this is a bug. Please fix your device tree source file. See here 319 * for discussion: 320 * 321 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html 322 */ 323 cell = fdt_getprop(blob, node, "status", NULL); 324 if (cell) 325 return 0 == strcmp(cell, "okay"); 326 return 1; 327 } 328 329 enum fdt_compat_id fdtdec_lookup(const void *blob, int node) 330 { 331 enum fdt_compat_id id; 332 333 /* Search our drivers */ 334 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) 335 if (0 == fdt_node_check_compatible(blob, node, 336 compat_names[id])) 337 return id; 338 return COMPAT_UNKNOWN; 339 } 340 341 int fdtdec_next_compatible(const void *blob, int node, 342 enum fdt_compat_id id) 343 { 344 return fdt_node_offset_by_compatible(blob, node, compat_names[id]); 345 } 346 347 int fdtdec_next_compatible_subnode(const void *blob, int node, 348 enum fdt_compat_id id, int *depthp) 349 { 350 do { 351 node = fdt_next_node(blob, node, depthp); 352 } while (*depthp > 1); 353 354 /* If this is a direct subnode, and compatible, return it */ 355 if (*depthp == 1 && 0 == fdt_node_check_compatible( 356 blob, node, compat_names[id])) 357 return node; 358 359 return -FDT_ERR_NOTFOUND; 360 } 361 362 int fdtdec_next_alias(const void *blob, const char *name, 363 enum fdt_compat_id id, int *upto) 364 { 365 #define MAX_STR_LEN 20 366 char str[MAX_STR_LEN + 20]; 367 int node, err; 368 369 /* snprintf() is not available */ 370 assert(strlen(name) < MAX_STR_LEN); 371 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); 372 node = fdt_path_offset(blob, str); 373 if (node < 0) 374 return node; 375 err = fdt_node_check_compatible(blob, node, compat_names[id]); 376 if (err < 0) 377 return err; 378 if (err) 379 return -FDT_ERR_NOTFOUND; 380 (*upto)++; 381 return node; 382 } 383 384 int fdtdec_find_aliases_for_id(const void *blob, const char *name, 385 enum fdt_compat_id id, int *node_list, int maxcount) 386 { 387 memset(node_list, '\0', sizeof(*node_list) * maxcount); 388 389 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); 390 } 391 392 /* TODO: Can we tighten this code up a little? */ 393 int fdtdec_add_aliases_for_id(const void *blob, const char *name, 394 enum fdt_compat_id id, int *node_list, int maxcount) 395 { 396 int name_len = strlen(name); 397 int nodes[maxcount]; 398 int num_found = 0; 399 int offset, node; 400 int alias_node; 401 int count; 402 int i, j; 403 404 /* find the alias node if present */ 405 alias_node = fdt_path_offset(blob, "/aliases"); 406 407 /* 408 * start with nothing, and we can assume that the root node can't 409 * match 410 */ 411 memset(nodes, '\0', sizeof(nodes)); 412 413 /* First find all the compatible nodes */ 414 for (node = count = 0; node >= 0 && count < maxcount;) { 415 node = fdtdec_next_compatible(blob, node, id); 416 if (node >= 0) 417 nodes[count++] = node; 418 } 419 if (node >= 0) 420 debug("%s: warning: maxcount exceeded with alias '%s'\n", 421 __func__, name); 422 423 /* Now find all the aliases */ 424 for (offset = fdt_first_property_offset(blob, alias_node); 425 offset > 0; 426 offset = fdt_next_property_offset(blob, offset)) { 427 const struct fdt_property *prop; 428 const char *path; 429 int number; 430 int found; 431 432 node = 0; 433 prop = fdt_get_property_by_offset(blob, offset, NULL); 434 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); 435 if (prop->len && 0 == strncmp(path, name, name_len)) 436 node = fdt_path_offset(blob, prop->data); 437 if (node <= 0) 438 continue; 439 440 /* Get the alias number */ 441 number = simple_strtoul(path + name_len, NULL, 10); 442 if (number < 0 || number >= maxcount) { 443 debug("%s: warning: alias '%s' is out of range\n", 444 __func__, path); 445 continue; 446 } 447 448 /* Make sure the node we found is actually in our list! */ 449 found = -1; 450 for (j = 0; j < count; j++) 451 if (nodes[j] == node) { 452 found = j; 453 break; 454 } 455 456 if (found == -1) { 457 debug("%s: warning: alias '%s' points to a node " 458 "'%s' that is missing or is not compatible " 459 " with '%s'\n", __func__, path, 460 fdt_get_name(blob, node, NULL), 461 compat_names[id]); 462 continue; 463 } 464 465 /* 466 * Add this node to our list in the right place, and mark 467 * it as done. 468 */ 469 if (fdtdec_get_is_enabled(blob, node)) { 470 if (node_list[number]) { 471 debug("%s: warning: alias '%s' requires that " 472 "a node be placed in the list in a " 473 "position which is already filled by " 474 "node '%s'\n", __func__, path, 475 fdt_get_name(blob, node, NULL)); 476 continue; 477 } 478 node_list[number] = node; 479 if (number >= num_found) 480 num_found = number + 1; 481 } 482 nodes[found] = 0; 483 } 484 485 /* Add any nodes not mentioned by an alias */ 486 for (i = j = 0; i < maxcount; i++) { 487 if (!node_list[i]) { 488 for (; j < maxcount; j++) 489 if (nodes[j] && 490 fdtdec_get_is_enabled(blob, nodes[j])) 491 break; 492 493 /* Have we run out of nodes to add? */ 494 if (j == maxcount) 495 break; 496 497 assert(!node_list[i]); 498 node_list[i] = nodes[j++]; 499 if (i >= num_found) 500 num_found = i + 1; 501 } 502 } 503 504 return num_found; 505 } 506 507 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, 508 int *seqp) 509 { 510 int base_len = strlen(base); 511 const char *find_name; 512 int find_namelen; 513 int prop_offset; 514 int aliases; 515 516 find_name = fdt_get_name(blob, offset, &find_namelen); 517 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); 518 519 aliases = fdt_path_offset(blob, "/aliases"); 520 for (prop_offset = fdt_first_property_offset(blob, aliases); 521 prop_offset > 0; 522 prop_offset = fdt_next_property_offset(blob, prop_offset)) { 523 const char *prop; 524 const char *name; 525 const char *slash; 526 int len, val; 527 528 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); 529 debug(" - %s, %s\n", name, prop); 530 if (len < find_namelen || *prop != '/' || prop[len - 1] || 531 strncmp(name, base, base_len)) 532 continue; 533 534 slash = strrchr(prop, '/'); 535 if (strcmp(slash + 1, find_name)) 536 continue; 537 val = trailing_strtol(name); 538 if (val != -1) { 539 *seqp = val; 540 debug("Found seq %d\n", *seqp); 541 return 0; 542 } 543 } 544 545 debug("Not found\n"); 546 return -ENOENT; 547 } 548 549 const char *fdtdec_get_chosen_prop(const void *blob, const char *name) 550 { 551 int chosen_node; 552 553 if (!blob) 554 return NULL; 555 chosen_node = fdt_path_offset(blob, "/chosen"); 556 return fdt_getprop(blob, chosen_node, name, NULL); 557 } 558 559 int fdtdec_get_chosen_node(const void *blob, const char *name) 560 { 561 const char *prop; 562 563 prop = fdtdec_get_chosen_prop(blob, name); 564 if (!prop) 565 return -FDT_ERR_NOTFOUND; 566 return fdt_path_offset(blob, prop); 567 } 568 569 int fdtdec_check_fdt(void) 570 { 571 /* 572 * We must have an FDT, but we cannot panic() yet since the console 573 * is not ready. So for now, just assert(). Boards which need an early 574 * FDT (prior to console ready) will need to make their own 575 * arrangements and do their own checks. 576 */ 577 assert(!fdtdec_prepare_fdt()); 578 return 0; 579 } 580 581 /* 582 * This function is a little odd in that it accesses global data. At some 583 * point if the architecture board.c files merge this will make more sense. 584 * Even now, it is common code. 585 */ 586 int fdtdec_prepare_fdt(void) 587 { 588 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || 589 fdt_check_header(gd->fdt_blob)) { 590 #ifdef CONFIG_SPL_BUILD 591 puts("Missing DTB\n"); 592 #else 593 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n"); 594 # ifdef DEBUG 595 if (gd->fdt_blob) { 596 printf("fdt_blob=%p\n", gd->fdt_blob); 597 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, 598 32, 0); 599 } 600 # endif 601 #endif 602 return -1; 603 } 604 return 0; 605 } 606 607 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) 608 { 609 const u32 *phandle; 610 int lookup; 611 612 debug("%s: %s\n", __func__, prop_name); 613 phandle = fdt_getprop(blob, node, prop_name, NULL); 614 if (!phandle) 615 return -FDT_ERR_NOTFOUND; 616 617 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); 618 return lookup; 619 } 620 621 /** 622 * Look up a property in a node and check that it has a minimum length. 623 * 624 * @param blob FDT blob 625 * @param node node to examine 626 * @param prop_name name of property to find 627 * @param min_len minimum property length in bytes 628 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not 629 found, or -FDT_ERR_BADLAYOUT if not enough data 630 * @return pointer to cell, which is only valid if err == 0 631 */ 632 static const void *get_prop_check_min_len(const void *blob, int node, 633 const char *prop_name, int min_len, int *err) 634 { 635 const void *cell; 636 int len; 637 638 debug("%s: %s\n", __func__, prop_name); 639 cell = fdt_getprop(blob, node, prop_name, &len); 640 if (!cell) 641 *err = -FDT_ERR_NOTFOUND; 642 else if (len < min_len) 643 *err = -FDT_ERR_BADLAYOUT; 644 else 645 *err = 0; 646 return cell; 647 } 648 649 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, 650 u32 *array, int count) 651 { 652 const u32 *cell; 653 int i, err = 0; 654 655 debug("%s: %s\n", __func__, prop_name); 656 cell = get_prop_check_min_len(blob, node, prop_name, 657 sizeof(u32) * count, &err); 658 if (!err) { 659 for (i = 0; i < count; i++) 660 array[i] = fdt32_to_cpu(cell[i]); 661 } 662 return err; 663 } 664 665 int fdtdec_get_int_array_count(const void *blob, int node, 666 const char *prop_name, u32 *array, int count) 667 { 668 const u32 *cell; 669 int len, elems; 670 int i; 671 672 debug("%s: %s\n", __func__, prop_name); 673 cell = fdt_getprop(blob, node, prop_name, &len); 674 if (!cell) 675 return -FDT_ERR_NOTFOUND; 676 elems = len / sizeof(u32); 677 if (count > elems) 678 count = elems; 679 for (i = 0; i < count; i++) 680 array[i] = fdt32_to_cpu(cell[i]); 681 682 return count; 683 } 684 685 const u32 *fdtdec_locate_array(const void *blob, int node, 686 const char *prop_name, int count) 687 { 688 const u32 *cell; 689 int err; 690 691 cell = get_prop_check_min_len(blob, node, prop_name, 692 sizeof(u32) * count, &err); 693 return err ? NULL : cell; 694 } 695 696 int fdtdec_get_bool(const void *blob, int node, const char *prop_name) 697 { 698 const s32 *cell; 699 int len; 700 701 debug("%s: %s\n", __func__, prop_name); 702 cell = fdt_getprop(blob, node, prop_name, &len); 703 return cell != NULL; 704 } 705 706 int fdtdec_parse_phandle_with_args(const void *blob, int src_node, 707 const char *list_name, 708 const char *cells_name, 709 int cell_count, int index, 710 struct fdtdec_phandle_args *out_args) 711 { 712 const __be32 *list, *list_end; 713 int rc = 0, size, cur_index = 0; 714 uint32_t count = 0; 715 int node = -1; 716 int phandle; 717 718 /* Retrieve the phandle list property */ 719 list = fdt_getprop(blob, src_node, list_name, &size); 720 if (!list) 721 return -ENOENT; 722 list_end = list + size / sizeof(*list); 723 724 /* Loop over the phandles until all the requested entry is found */ 725 while (list < list_end) { 726 rc = -EINVAL; 727 count = 0; 728 729 /* 730 * If phandle is 0, then it is an empty entry with no 731 * arguments. Skip forward to the next entry. 732 */ 733 phandle = be32_to_cpup(list++); 734 if (phandle) { 735 /* 736 * Find the provider node and parse the #*-cells 737 * property to determine the argument length. 738 * 739 * This is not needed if the cell count is hard-coded 740 * (i.e. cells_name not set, but cell_count is set), 741 * except when we're going to return the found node 742 * below. 743 */ 744 if (cells_name || cur_index == index) { 745 node = fdt_node_offset_by_phandle(blob, 746 phandle); 747 if (!node) { 748 debug("%s: could not find phandle\n", 749 fdt_get_name(blob, src_node, 750 NULL)); 751 goto err; 752 } 753 } 754 755 if (cells_name) { 756 count = fdtdec_get_int(blob, node, cells_name, 757 -1); 758 if (count == -1) { 759 debug("%s: could not get %s for %s\n", 760 fdt_get_name(blob, src_node, 761 NULL), 762 cells_name, 763 fdt_get_name(blob, node, 764 NULL)); 765 goto err; 766 } 767 } else { 768 count = cell_count; 769 } 770 771 /* 772 * Make sure that the arguments actually fit in the 773 * remaining property data length 774 */ 775 if (list + count > list_end) { 776 debug("%s: arguments longer than property\n", 777 fdt_get_name(blob, src_node, NULL)); 778 goto err; 779 } 780 } 781 782 /* 783 * All of the error cases above bail out of the loop, so at 784 * this point, the parsing is successful. If the requested 785 * index matches, then fill the out_args structure and return, 786 * or return -ENOENT for an empty entry. 787 */ 788 rc = -ENOENT; 789 if (cur_index == index) { 790 if (!phandle) 791 goto err; 792 793 if (out_args) { 794 int i; 795 796 if (count > MAX_PHANDLE_ARGS) { 797 debug("%s: too many arguments %d\n", 798 fdt_get_name(blob, src_node, 799 NULL), count); 800 count = MAX_PHANDLE_ARGS; 801 } 802 out_args->node = node; 803 out_args->args_count = count; 804 for (i = 0; i < count; i++) { 805 out_args->args[i] = 806 be32_to_cpup(list++); 807 } 808 } 809 810 /* Found it! return success */ 811 return 0; 812 } 813 814 node = -1; 815 list += count; 816 cur_index++; 817 } 818 819 /* 820 * Result will be one of: 821 * -ENOENT : index is for empty phandle 822 * -EINVAL : parsing error on data 823 * [1..n] : Number of phandle (count mode; when index = -1) 824 */ 825 rc = index < 0 ? cur_index : -ENOENT; 826 err: 827 return rc; 828 } 829 830 int fdtdec_get_child_count(const void *blob, int node) 831 { 832 int subnode; 833 int num = 0; 834 835 fdt_for_each_subnode(subnode, blob, node) 836 num++; 837 838 return num; 839 } 840 841 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, 842 u8 *array, int count) 843 { 844 const u8 *cell; 845 int err; 846 847 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 848 if (!err) 849 memcpy(array, cell, count); 850 return err; 851 } 852 853 const u8 *fdtdec_locate_byte_array(const void *blob, int node, 854 const char *prop_name, int count) 855 { 856 const u8 *cell; 857 int err; 858 859 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 860 if (err) 861 return NULL; 862 return cell; 863 } 864 865 int fdtdec_get_config_int(const void *blob, const char *prop_name, 866 int default_val) 867 { 868 int config_node; 869 870 debug("%s: %s\n", __func__, prop_name); 871 config_node = fdt_path_offset(blob, "/config"); 872 if (config_node < 0) 873 return default_val; 874 return fdtdec_get_int(blob, config_node, prop_name, default_val); 875 } 876 877 int fdtdec_get_config_bool(const void *blob, const char *prop_name) 878 { 879 int config_node; 880 const void *prop; 881 882 debug("%s: %s\n", __func__, prop_name); 883 config_node = fdt_path_offset(blob, "/config"); 884 if (config_node < 0) 885 return 0; 886 prop = fdt_get_property(blob, config_node, prop_name, NULL); 887 888 return prop != NULL; 889 } 890 891 char *fdtdec_get_config_string(const void *blob, const char *prop_name) 892 { 893 const char *nodep; 894 int nodeoffset; 895 int len; 896 897 debug("%s: %s\n", __func__, prop_name); 898 nodeoffset = fdt_path_offset(blob, "/config"); 899 if (nodeoffset < 0) 900 return NULL; 901 902 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len); 903 if (!nodep) 904 return NULL; 905 906 return (char *)nodep; 907 } 908 909 int fdtdec_decode_region(const void *blob, int node, const char *prop_name, 910 fdt_addr_t *basep, fdt_size_t *sizep) 911 { 912 const fdt_addr_t *cell; 913 int len; 914 915 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL), 916 prop_name); 917 cell = fdt_getprop(blob, node, prop_name, &len); 918 if (!cell || (len < sizeof(fdt_addr_t) * 2)) { 919 debug("cell=%p, len=%d\n", cell, len); 920 return -1; 921 } 922 923 *basep = fdt_addr_to_cpu(*cell); 924 *sizep = fdt_size_to_cpu(cell[1]); 925 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, 926 (ulong)*sizep); 927 928 return 0; 929 } 930 931 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) 932 { 933 u64 number = 0; 934 935 while (cells--) 936 number = (number << 32) | fdt32_to_cpu(*ptr++); 937 938 return number; 939 } 940 941 int fdt_get_resource(const void *fdt, int node, const char *property, 942 unsigned int index, struct fdt_resource *res) 943 { 944 const fdt32_t *ptr, *end; 945 int na, ns, len, parent; 946 unsigned int i = 0; 947 948 parent = fdt_parent_offset(fdt, node); 949 if (parent < 0) 950 return parent; 951 952 na = fdt_address_cells(fdt, parent); 953 ns = fdt_size_cells(fdt, parent); 954 955 ptr = fdt_getprop(fdt, node, property, &len); 956 if (!ptr) 957 return len; 958 959 end = ptr + len / sizeof(*ptr); 960 961 while (ptr + na + ns <= end) { 962 if (i == index) { 963 if (CONFIG_IS_ENABLED(OF_TRANSLATE)) 964 res->start = fdt_translate_address(fdt, node, ptr); 965 else 966 res->start = fdtdec_get_number(ptr, na); 967 968 res->end = res->start; 969 res->end += fdtdec_get_number(&ptr[na], ns) - 1; 970 return 0; 971 } 972 973 ptr += na + ns; 974 i++; 975 } 976 977 return -FDT_ERR_NOTFOUND; 978 } 979 980 int fdt_get_named_resource(const void *fdt, int node, const char *property, 981 const char *prop_names, const char *name, 982 struct fdt_resource *res) 983 { 984 int index; 985 986 index = fdt_stringlist_search(fdt, node, prop_names, name); 987 if (index < 0) 988 return index; 989 990 return fdt_get_resource(fdt, node, property, index, res); 991 } 992 993 int fdtdec_decode_memory_region(const void *blob, int config_node, 994 const char *mem_type, const char *suffix, 995 fdt_addr_t *basep, fdt_size_t *sizep) 996 { 997 char prop_name[50]; 998 const char *mem; 999 fdt_size_t size, offset_size; 1000 fdt_addr_t base, offset; 1001 int node; 1002 1003 if (config_node == -1) { 1004 config_node = fdt_path_offset(blob, "/config"); 1005 if (config_node < 0) { 1006 debug("%s: Cannot find /config node\n", __func__); 1007 return -ENOENT; 1008 } 1009 } 1010 if (!suffix) 1011 suffix = ""; 1012 1013 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, 1014 suffix); 1015 mem = fdt_getprop(blob, config_node, prop_name, NULL); 1016 if (!mem) { 1017 debug("%s: No memory type for '%s', using /memory\n", __func__, 1018 prop_name); 1019 mem = "/memory"; 1020 } 1021 1022 node = fdt_path_offset(blob, mem); 1023 if (node < 0) { 1024 debug("%s: Failed to find node '%s': %s\n", __func__, mem, 1025 fdt_strerror(node)); 1026 return -ENOENT; 1027 } 1028 1029 /* 1030 * Not strictly correct - the memory may have multiple banks. We just 1031 * use the first 1032 */ 1033 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) { 1034 debug("%s: Failed to decode memory region %s\n", __func__, 1035 mem); 1036 return -EINVAL; 1037 } 1038 1039 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, 1040 suffix); 1041 if (fdtdec_decode_region(blob, config_node, prop_name, &offset, 1042 &offset_size)) { 1043 debug("%s: Failed to decode memory region '%s'\n", __func__, 1044 prop_name); 1045 return -EINVAL; 1046 } 1047 1048 *basep = base + offset; 1049 *sizep = offset_size; 1050 1051 return 0; 1052 } 1053 1054 static int decode_timing_property(const void *blob, int node, const char *name, 1055 struct timing_entry *result) 1056 { 1057 int length, ret = 0; 1058 const u32 *prop; 1059 1060 prop = fdt_getprop(blob, node, name, &length); 1061 if (!prop) { 1062 debug("%s: could not find property %s\n", 1063 fdt_get_name(blob, node, NULL), name); 1064 return length; 1065 } 1066 1067 if (length == sizeof(u32)) { 1068 result->typ = fdtdec_get_int(blob, node, name, 0); 1069 result->min = result->typ; 1070 result->max = result->typ; 1071 } else { 1072 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); 1073 } 1074 1075 return ret; 1076 } 1077 1078 int fdtdec_decode_display_timing(const void *blob, int parent, int index, 1079 struct display_timing *dt) 1080 { 1081 int i, node, timings_node; 1082 u32 val = 0; 1083 int ret = 0; 1084 1085 timings_node = fdt_subnode_offset(blob, parent, "display-timings"); 1086 if (timings_node < 0) 1087 return timings_node; 1088 1089 for (i = 0, node = fdt_first_subnode(blob, timings_node); 1090 node > 0 && i != index; 1091 node = fdt_next_subnode(blob, node)) 1092 i++; 1093 1094 if (node < 0) 1095 return node; 1096 1097 memset(dt, 0, sizeof(*dt)); 1098 1099 ret |= decode_timing_property(blob, node, "hback-porch", 1100 &dt->hback_porch); 1101 ret |= decode_timing_property(blob, node, "hfront-porch", 1102 &dt->hfront_porch); 1103 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); 1104 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); 1105 ret |= decode_timing_property(blob, node, "vback-porch", 1106 &dt->vback_porch); 1107 ret |= decode_timing_property(blob, node, "vfront-porch", 1108 &dt->vfront_porch); 1109 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); 1110 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); 1111 ret |= decode_timing_property(blob, node, "clock-frequency", 1112 &dt->pixelclock); 1113 1114 dt->flags = 0; 1115 val = fdtdec_get_int(blob, node, "vsync-active", -1); 1116 if (val != -1) { 1117 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : 1118 DISPLAY_FLAGS_VSYNC_LOW; 1119 } 1120 val = fdtdec_get_int(blob, node, "hsync-active", -1); 1121 if (val != -1) { 1122 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : 1123 DISPLAY_FLAGS_HSYNC_LOW; 1124 } 1125 val = fdtdec_get_int(blob, node, "de-active", -1); 1126 if (val != -1) { 1127 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : 1128 DISPLAY_FLAGS_DE_LOW; 1129 } 1130 val = fdtdec_get_int(blob, node, "pixelclk-active", -1); 1131 if (val != -1) { 1132 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : 1133 DISPLAY_FLAGS_PIXDATA_NEGEDGE; 1134 } 1135 1136 if (fdtdec_get_bool(blob, node, "interlaced")) 1137 dt->flags |= DISPLAY_FLAGS_INTERLACED; 1138 if (fdtdec_get_bool(blob, node, "doublescan")) 1139 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; 1140 if (fdtdec_get_bool(blob, node, "doubleclk")) 1141 dt->flags |= DISPLAY_FLAGS_DOUBLECLK; 1142 1143 return ret; 1144 } 1145 1146 int fdtdec_setup_memory_size(void) 1147 { 1148 int ret, mem; 1149 struct fdt_resource res; 1150 1151 mem = fdt_path_offset(gd->fdt_blob, "/memory"); 1152 if (mem < 0) { 1153 debug("%s: Missing /memory node\n", __func__); 1154 return -EINVAL; 1155 } 1156 1157 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); 1158 if (ret != 0) { 1159 debug("%s: Unable to decode first memory bank\n", __func__); 1160 return -EINVAL; 1161 } 1162 1163 gd->ram_size = (phys_size_t)(res.end - res.start + 1); 1164 debug("%s: Initial DRAM size %llx\n", __func__, 1165 (unsigned long long)gd->ram_size); 1166 1167 return 0; 1168 } 1169 1170 #if defined(CONFIG_NR_DRAM_BANKS) 1171 int fdtdec_setup_memory_banksize(void) 1172 { 1173 int bank, ret, mem, reg = 0; 1174 struct fdt_resource res; 1175 1176 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type", 1177 "memory", 7); 1178 if (mem < 0) { 1179 debug("%s: Missing /memory node\n", __func__); 1180 return -EINVAL; 1181 } 1182 1183 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1184 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); 1185 if (ret == -FDT_ERR_NOTFOUND) { 1186 reg = 0; 1187 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem, 1188 "device_type", 1189 "memory", 7); 1190 if (mem == -FDT_ERR_NOTFOUND) 1191 break; 1192 1193 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); 1194 if (ret == -FDT_ERR_NOTFOUND) 1195 break; 1196 } 1197 if (ret != 0) { 1198 return -EINVAL; 1199 } 1200 1201 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; 1202 gd->bd->bi_dram[bank].size = 1203 (phys_size_t)(res.end - res.start + 1); 1204 1205 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", 1206 __func__, bank, 1207 (unsigned long long)gd->bd->bi_dram[bank].start, 1208 (unsigned long long)gd->bd->bi_dram[bank].size); 1209 } 1210 1211 return 0; 1212 } 1213 #endif 1214 1215 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1216 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ 1217 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) 1218 static int uncompress_blob(const void *src, ulong sz_src, void **dstp) 1219 { 1220 size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ; 1221 ulong sz_in = sz_src; 1222 void *dst; 1223 int rc; 1224 1225 if (CONFIG_IS_ENABLED(GZIP)) 1226 if (gzip_parse_header(src, sz_in) < 0) 1227 return -1; 1228 if (CONFIG_IS_ENABLED(LZO)) 1229 if (!lzop_is_valid_header(src)) 1230 return -EBADMSG; 1231 1232 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) { 1233 dst = malloc(sz_out); 1234 if (!dst) { 1235 puts("uncompress_blob: Unable to allocate memory\n"); 1236 return -ENOMEM; 1237 } 1238 } else { 1239 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) 1240 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR); 1241 # else 1242 return -ENOTSUPP; 1243 # endif 1244 } 1245 1246 if (CONFIG_IS_ENABLED(GZIP)) 1247 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in); 1248 else if (CONFIG_IS_ENABLED(LZO)) 1249 rc = lzop_decompress(src, sz_in, dst, &sz_out); 1250 1251 if (rc < 0) { 1252 /* not a valid compressed blob */ 1253 puts("uncompress_blob: Unable to uncompress\n"); 1254 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) 1255 free(dst); 1256 return -EBADMSG; 1257 } 1258 *dstp = dst; 1259 return 0; 1260 } 1261 # else 1262 static int uncompress_blob(const void *src, ulong sz_src, void **dstp) 1263 { 1264 return -ENOTSUPP; 1265 } 1266 # endif 1267 #endif 1268 1269 int fdtdec_setup(void) 1270 { 1271 #if CONFIG_IS_ENABLED(OF_CONTROL) 1272 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1273 void *fdt_blob; 1274 # endif 1275 # ifdef CONFIG_OF_EMBED 1276 /* Get a pointer to the FDT */ 1277 # ifdef CONFIG_SPL_BUILD 1278 gd->fdt_blob = __dtb_dt_spl_begin; 1279 # else 1280 gd->fdt_blob = __dtb_dt_begin; 1281 # endif 1282 # elif defined CONFIG_OF_SEPARATE 1283 # ifdef CONFIG_SPL_BUILD 1284 /* FDT is at end of BSS unless it is in a different memory region */ 1285 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) 1286 gd->fdt_blob = (ulong *)&_image_binary_end; 1287 else 1288 gd->fdt_blob = (ulong *)&__bss_end; 1289 # else 1290 /* FDT is at end of image */ 1291 gd->fdt_blob = (ulong *)&_end; 1292 1293 # ifdef CONFIG_USING_KERNEL_DTB 1294 gd->fdt_blob_kern = (ulong *)ALIGN((ulong)gd->fdt_blob + 1295 fdt_totalsize(gd->fdt_blob), 8); 1296 if (fdt_check_header(gd->fdt_blob_kern)) 1297 gd->fdt_blob_kern = NULL; 1298 # endif 1299 # endif 1300 # elif defined(CONFIG_OF_BOARD) 1301 /* Allow the board to override the fdt address. */ 1302 gd->fdt_blob = board_fdt_blob_setup(); 1303 # elif defined(CONFIG_OF_HOSTFILE) 1304 if (sandbox_read_fdt_from_file()) { 1305 puts("Failed to read control FDT\n"); 1306 return -1; 1307 } 1308 # endif 1309 # ifndef CONFIG_SPL_BUILD 1310 /* Allow the early environment to override the fdt address */ 1311 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) 1312 gd->fdt_blob = (void *)prior_stage_fdt_address; 1313 # else 1314 gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16, 1315 (uintptr_t)gd->fdt_blob); 1316 # endif 1317 # endif 1318 1319 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT) 1320 /* 1321 * Try and uncompress the blob. 1322 * Unfortunately there is no way to know how big the input blob really 1323 * is. So let us set the maximum input size arbitrarily high. 16MB 1324 * ought to be more than enough for packed DTBs. 1325 */ 1326 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0) 1327 gd->fdt_blob = fdt_blob; 1328 1329 /* 1330 * Check if blob is a FIT images containings DTBs. 1331 * If so, pick the most relevant 1332 */ 1333 fdt_blob = locate_dtb_in_fit(gd->fdt_blob); 1334 if (fdt_blob) 1335 gd->fdt_blob = fdt_blob; 1336 # endif 1337 #endif 1338 1339 return fdtdec_prepare_fdt(); 1340 } 1341 1342 #endif /* !USE_HOSTCC */ 1343