1d5dae85fSMichal Simek /* 2d5dae85fSMichal Simek * (C) Copyright 2012-2013, Xilinx, Michal Simek 3d5dae85fSMichal Simek * 4d5dae85fSMichal Simek * (C) Copyright 2012 5d5dae85fSMichal Simek * Joe Hershberger <joe.hershberger@ni.com> 6d5dae85fSMichal Simek * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8d5dae85fSMichal Simek */ 9d5dae85fSMichal Simek 10d5dae85fSMichal Simek #ifndef _ZYNQPL_H_ 11d5dae85fSMichal Simek #define _ZYNQPL_H_ 12d5dae85fSMichal Simek 13d5dae85fSMichal Simek #include <xilinx.h> 14d5dae85fSMichal Simek 15*14cfc4f3SMichal Simek extern struct xilinx_fpga_op zynq_op; 16d5dae85fSMichal Simek 17d5dae85fSMichal Simek #define XILINX_ZYNQ_7010 0x2 1831993d6aSMichal Simek #define XILINX_ZYNQ_7015 0x1b 19d5dae85fSMichal Simek #define XILINX_ZYNQ_7020 0x7 20d5dae85fSMichal Simek #define XILINX_ZYNQ_7030 0xc 21d5dae85fSMichal Simek #define XILINX_ZYNQ_7045 0x11 22fd2b10b6SMichal Simek #define XILINX_ZYNQ_7100 0x16 23d5dae85fSMichal Simek 24d5dae85fSMichal Simek /* Device Image Sizes */ 25d5dae85fSMichal Simek #define XILINX_XC7Z010_SIZE 16669920/8 2631993d6aSMichal Simek #define XILINX_XC7Z015_SIZE 28085344/8 27d5dae85fSMichal Simek #define XILINX_XC7Z020_SIZE 32364512/8 28d5dae85fSMichal Simek #define XILINX_XC7Z030_SIZE 47839328/8 29d5dae85fSMichal Simek #define XILINX_XC7Z045_SIZE 106571232/8 30fd2b10b6SMichal Simek #define XILINX_XC7Z100_SIZE 139330784/8 31d5dae85fSMichal Simek 32d5dae85fSMichal Simek /* Descriptor Macros */ 33d5dae85fSMichal Simek #define XILINX_XC7Z010_DESC(cookie) \ 34*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" } 35d5dae85fSMichal Simek 3631993d6aSMichal Simek #define XILINX_XC7Z015_DESC(cookie) \ 37*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" } 3831993d6aSMichal Simek 39d5dae85fSMichal Simek #define XILINX_XC7Z020_DESC(cookie) \ 40*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" } 41d5dae85fSMichal Simek 42d5dae85fSMichal Simek #define XILINX_XC7Z030_DESC(cookie) \ 43*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" } 44d5dae85fSMichal Simek 45d5dae85fSMichal Simek #define XILINX_XC7Z045_DESC(cookie) \ 46*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" } 47d5dae85fSMichal Simek 48fd2b10b6SMichal Simek #define XILINX_XC7Z100_DESC(cookie) \ 49*14cfc4f3SMichal Simek { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" } 50fd2b10b6SMichal Simek 51d5dae85fSMichal Simek #endif /* _ZYNQPL_H_ */ 52