18966eb4cSTom Rix /* 28966eb4cSTom Rix * Copyright (c) 2009 Wind River Systems, Inc. 38966eb4cSTom Rix * Tom Rix <Tom.Rix at windriver.com> 48966eb4cSTom Rix * 58966eb4cSTom Rix * This program is free software; you can redistribute it and/or 68966eb4cSTom Rix * modify it under the terms of the GNU General Public License as 78966eb4cSTom Rix * published by the Free Software Foundation; either version 2 of 88966eb4cSTom Rix * the License, or (at your option) any later version. 98966eb4cSTom Rix * 108966eb4cSTom Rix * This program is distributed in the hope that it will be useful, 118966eb4cSTom Rix * but WITHOUT ANY WARRANTY; without even the implied warranty of 128966eb4cSTom Rix * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 138966eb4cSTom Rix * GNU General Public License for more details. 148966eb4cSTom Rix * 158966eb4cSTom Rix * You should have received a copy of the GNU General Public License 168966eb4cSTom Rix * along with this program; if not, write to the Free Software 178966eb4cSTom Rix * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 188966eb4cSTom Rix * MA 02111-1307 USA 198966eb4cSTom Rix * 208966eb4cSTom Rix * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git 218966eb4cSTom Rix * 228966eb4cSTom Rix * Copyright (C) 2007-2009 Texas Instruments, Inc. 238966eb4cSTom Rix */ 248966eb4cSTom Rix 258966eb4cSTom Rix #ifndef TWL4030_H 268966eb4cSTom Rix #define TWL4030_H 278966eb4cSTom Rix 288966eb4cSTom Rix #include <common.h> 298966eb4cSTom Rix #include <i2c.h> 308966eb4cSTom Rix 318966eb4cSTom Rix /* I2C chip addresses */ 328966eb4cSTom Rix 338966eb4cSTom Rix /* USB */ 348966eb4cSTom Rix #define TWL4030_CHIP_USB 0x48 358966eb4cSTom Rix /* AUD */ 368966eb4cSTom Rix #define TWL4030_CHIP_AUDIO_VOICE 0x49 378966eb4cSTom Rix #define TWL4030_CHIP_GPIO 0x49 388966eb4cSTom Rix #define TWL4030_CHIP_INTBR 0x49 398966eb4cSTom Rix #define TWL4030_CHIP_PIH 0x49 408966eb4cSTom Rix #define TWL4030_CHIP_TEST 0x49 418966eb4cSTom Rix /* AUX */ 428966eb4cSTom Rix #define TWL4030_CHIP_KEYPAD 0x4a 438966eb4cSTom Rix #define TWL4030_CHIP_MADC 0x4a 448966eb4cSTom Rix #define TWL4030_CHIP_INTERRUPTS 0x4a 458966eb4cSTom Rix #define TWL4030_CHIP_LED 0x4a 468966eb4cSTom Rix #define TWL4030_CHIP_MAIN_CHARGE 0x4a 478966eb4cSTom Rix #define TWL4030_CHIP_PRECHARGE 0x4a 488966eb4cSTom Rix #define TWL4030_CHIP_PWM0 0x4a 498966eb4cSTom Rix #define TWL4030_CHIP_PWM1 0x4a 508966eb4cSTom Rix #define TWL4030_CHIP_PWMA 0x4a 518966eb4cSTom Rix #define TWL4030_CHIP_PWMB 0x4a 528966eb4cSTom Rix /* POWER */ 538966eb4cSTom Rix #define TWL4030_CHIP_BACKUP 0x4b 548966eb4cSTom Rix #define TWL4030_CHIP_INT 0x4b 558966eb4cSTom Rix #define TWL4030_CHIP_PM_MASTER 0x4b 568966eb4cSTom Rix #define TWL4030_CHIP_PM_RECEIVER 0x4b 578966eb4cSTom Rix #define TWL4030_CHIP_RTC 0x4b 588966eb4cSTom Rix #define TWL4030_CHIP_SECURED_REG 0x4b 598966eb4cSTom Rix 608966eb4cSTom Rix /* Register base addresses */ 618966eb4cSTom Rix 628966eb4cSTom Rix /* USB */ 638966eb4cSTom Rix #define TWL4030_BASEADD_USB 0x0000 648966eb4cSTom Rix /* AUD */ 658966eb4cSTom Rix #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 668966eb4cSTom Rix #define TWL4030_BASEADD_GPIO 0x0098 678966eb4cSTom Rix #define TWL4030_BASEADD_INTBR 0x0085 688966eb4cSTom Rix #define TWL4030_BASEADD_PIH 0x0080 698966eb4cSTom Rix #define TWL4030_BASEADD_TEST 0x004C 708966eb4cSTom Rix /* AUX */ 718966eb4cSTom Rix #define TWL4030_BASEADD_INTERRUPTS 0x00B9 728966eb4cSTom Rix #define TWL4030_BASEADD_LED 0x00EE 738966eb4cSTom Rix #define TWL4030_BASEADD_MADC 0x0000 748966eb4cSTom Rix #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 758966eb4cSTom Rix #define TWL4030_BASEADD_PRECHARGE 0x00AA 768966eb4cSTom Rix #define TWL4030_BASEADD_PWM0 0x00F8 778966eb4cSTom Rix #define TWL4030_BASEADD_PWM1 0x00FB 788966eb4cSTom Rix #define TWL4030_BASEADD_PWMA 0x00EF 798966eb4cSTom Rix #define TWL4030_BASEADD_PWMB 0x00F1 808966eb4cSTom Rix #define TWL4030_BASEADD_KEYPAD 0x00D2 818966eb4cSTom Rix /* POWER */ 828966eb4cSTom Rix #define TWL4030_BASEADD_BACKUP 0x0014 838966eb4cSTom Rix #define TWL4030_BASEADD_INT 0x002E 848966eb4cSTom Rix #define TWL4030_BASEADD_PM_MASTER 0x0036 858966eb4cSTom Rix #define TWL4030_BASEADD_PM_RECIEVER 0x005B 868966eb4cSTom Rix #define TWL4030_BASEADD_RTC 0x001C 878966eb4cSTom Rix #define TWL4030_BASEADD_SECURED_REG 0x0000 888966eb4cSTom Rix 898966eb4cSTom Rix /* 908966eb4cSTom Rix * Power Management Master 918966eb4cSTom Rix */ 928966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 938966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 948966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 958966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 968966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_BOOT 0x3A 978966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_BOOT 0x3B 988966eb4cSTom Rix #define TWL4030_PM_MASTER_SHUNDAN 0x3C 998966eb4cSTom Rix #define TWL4030_PM_MASTER_BOOT_BCI 0x3D 1008966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E 1018966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F 1028966eb4cSTom Rix #define TWL4030_PM_MASTER_BGAP_TRIM 0x40 1038966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 1048966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 1058966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 1068966eb4cSTom Rix #define TWL4030_PM_MASTER_PROTECT_KEY 0x44 1078966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 1088966eb4cSTom Rix #define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 1098966eb4cSTom Rix #define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 1108966eb4cSTom Rix #define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 1118966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_P123_STATE 0x49 1128966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_CFG 0x4A 1138966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B 1148966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C 1158966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 1168966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 1178966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 1188966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 1198966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 1208966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 1218966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 1228966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 1238966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_DATA 0x5A 1248966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_CONFIG 0x5B 1258966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT1 0x5C 1268966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT2 0x5D 1278966eb4cSTom Rix #define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E 1288966eb4cSTom Rix #define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F 1298966eb4cSTom Rix #define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 1308966eb4cSTom Rix #define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 1318966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 1328966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 1338966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 1348966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 1358966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM1 0x66 1368966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM2 0x67 1378966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_CFG 0x68 1388966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_A 0x69 1398966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_B 0x6A 1408966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_C 0x6B 1418966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_D 0x6C 1428966eb4cSTom Rix #define TWL4030_PM_MASTER_BB_CFG 0x6D 1438966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_TST 0x6E 1448966eb4cSTom Rix #define TWL4030_PM_MASTER_TRIM1 0x6F 1458966eb4cSTom Rix /* P[1-3]_SW_EVENTS */ 1468966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) 1478966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) 1488966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) 1498966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) 1508966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) 1518966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) 1528966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) 1538966eb4cSTom Rix 1548966eb4cSTom Rix /* Power Managment Receiver */ 1552c155130STom Rix #define TWL4030_PM_RECEIVER_SC_CONFIG 0x5B 1562c155130STom Rix #define TWL4030_PM_RECEIVER_SC_DETECT1 0x5C 1572c155130STom Rix #define TWL4030_PM_RECEIVER_SC_DETECT2 0x5D 1582c155130STom Rix #define TWL4030_PM_RECEIVER_WATCHDOG_CFG 0x5E 1592c155130STom Rix #define TWL4030_PM_RECEIVER_IT_CHECK_CFG 0x5F 1602c155130STom Rix #define TWL4030_PM_RECEIVER_VIBRATOR_CFG 0x5F 1612c155130STom Rix #define TWL4030_PM_RECEIVER_DC_TO_DC_CFG 0x61 1622c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_TRIM1 0x62 1632c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_TRIM2 0x63 1642c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_TRIM1 0x64 1652c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_TRIM2 0x65 1662c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_TRIM1 0x66 1672c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_TRIM2 0x67 1682c155130STom Rix #define TWL4030_PM_RECEIVER_MISC_CFG 0x68 1692c155130STom Rix #define TWL4030_PM_RECEIVER_LS_TST_A 0x69 1702c155130STom Rix #define TWL4030_PM_RECEIVER_LS_TST_B 0x6A 1712c155130STom Rix #define TWL4030_PM_RECEIVER_LS_TST_C 0x6B 1722c155130STom Rix #define TWL4030_PM_RECEIVER_LS_TST_D 0x6C 1732c155130STom Rix #define TWL4030_PM_RECEIVER_BB_CFG 0x6D 1742c155130STom Rix #define TWL4030_PM_RECEIVER_MISC_TST 0x6E 1752c155130STom Rix #define TWL4030_PM_RECEIVER_TRIM1 0x6F 1762c155130STom Rix #define TWL4030_PM_RECEIVER_TRIM2 0x70 1772c155130STom Rix #define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT 0x71 1782c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP 0x72 1792c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX1_TYPE 0x73 1802c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX1_REMAP 0x74 1812c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX1_DEDICATED 0x75 1822c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP 0x76 1832c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX2_TYPE 0x77 1842c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX2_REMAP 0x78 1852c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX2_DEDICATED 0x79 1862c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP 0x7A 1872c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX3_TYPE 0x7B 1882c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX3_REMAP 0x7C 1892c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX3_DEDICATED 0x7D 1902c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP 0x7E 1912c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX4_TYPE 0x7F 1922c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX4_REMAP 0x80 1932c155130STom Rix #define TWL4030_PM_RECEIVER_VAUX4_DEDICATED 0x81 1942c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP 0x82 1952c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC1_TYPE 0x83 1962c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC1_REMAP 0x84 1972c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC1_DEDICATED 0x85 1982c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP 0x86 1992c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC2_TYPE 0x87 2002c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC2_REMAP 0x88 2012c155130STom Rix #define TWL4030_PM_RECEIVER_VMMC2_DEDICATED 0x89 2022c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP 0x8A 2032c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL1_TYPE 0x8B 2042c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL1_REMAP 0x8C 2052c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL1_DEDICATED 0x8D 2062c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP 0x8E 2072c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL2_TYPE 0x8F 2082c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL2_REMAP 0x90 2092c155130STom Rix #define TWL4030_PM_RECEIVER_VPLL2_DEDICATED 0x91 2102c155130STom Rix #define TWL4030_PM_RECEIVER_VSIM_DEV_GRP 0x92 2112c155130STom Rix #define TWL4030_PM_RECEIVER_VSIM_TYPE 0x93 2122c155130STom Rix #define TWL4030_PM_RECEIVER_VSIM_REMAP 0x94 2132c155130STom Rix #define TWL4030_PM_RECEIVER_VSIM_DEDICATED 0x95 2142c155130STom Rix #define TWL4030_PM_RECEIVER_VDAC_DEV_GRP 0x96 2152c155130STom Rix #define TWL4030_PM_RECEIVER_VDAC_TYPE 0x97 2162c155130STom Rix #define TWL4030_PM_RECEIVER_VDAC_REMAP 0x98 2172c155130STom Rix #define TWL4030_PM_RECEIVER_VDAC_DEDICATED 0x99 2182c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP 0x9A 2192c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA1_TYP 0x9B 2202c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA1_REMAP 0x9C 2212c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED 0x9D 2222c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP 0x9E 2232c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA2_TYPE 0x9F 2242c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA2_REMAP 0xA0 2252c155130STom Rix #define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED 0xA1 2262c155130STom Rix #define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP 0xA2 2272c155130STom Rix #define TWL4030_PM_RECEIVER_VINTDIG_TYPE 0xA3 2282c155130STom Rix #define TWL4030_PM_RECEIVER_VINTDIG_REMAP 0xA4 2292c155130STom Rix #define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED 0xA5 2302c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_DEV_GRP 0xA6 2312c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_TYPE 0xA7 2322c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_REMAP 0xA8 2332c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_CFG 0xA9 2342c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_MISC_CFG 0xAA 2352c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_TEST1 0xAB 2362c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_TEST2 0xAC 2372c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_OSC 0xAD 2382c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_RESERVED 0xAE 2392c155130STom Rix #define TWL4030_PM_RECEIVER_VIO_VSEL 0xAF 2402c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_DEV_GRP 0xB0 2412c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_TYPE 0xB1 2422c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_REMAP 0xB2 2432c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_CFG 0xB3 2442c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_MISC_CFG 0xB4 2452c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_TEST1 0xB5 2462c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_TEST2 0xB6 2472c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_OSC 0xB7 2482c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_RESERVED 0xB8 2492c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_VSEL 0xB9 2502c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG 0xBA 2512c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_VFLOOR 0xBB 2522c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_VROOF 0xBC 2532c155130STom Rix #define TWL4030_PM_RECEIVER_VDD1_STEP 0xBD 2542c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_DEV_GRP 0xBE 2552c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_TYPE 0xBF 2562c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_REMAP 0xC0 2572c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_CFG 0xC1 2582c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_MISC_CFG 0xC2 2592c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_TEST1 0xC3 2602c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_TEST2 0xC4 2612c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_OSC 0xC5 2622c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_RESERVED 0xC6 2632c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_VSEL 0xC7 2642c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG 0xC8 2652c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_VFLOOR 0xC9 2662c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_VROOF 0xCA 2672c155130STom Rix #define TWL4030_PM_RECEIVER_VDD2_STEP 0xCB 2688966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC 2698966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD 2708966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE 2718966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF 2728966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 2738966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 2748966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 2758966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 2768966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 2778966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 2782c155130STom Rix #define TWL4030_PM_RECEIVER_VUSBCP_TYPE 0xD6 2792c155130STom Rix #define TWL4030_PM_RECEIVER_VUSBCP_REMAP 0xD7 2808966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 2818966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 2822c155130STom Rix #define TWL4030_PM_RECEIVER_REGEN_DEV_GRP 0xDA 2832c155130STom Rix #define TWL4030_PM_RECEIVER_REGEN_TYPE 0xDB 2842c155130STom Rix #define TWL4030_PM_RECEIVER_REGEN_REMAP 0xDC 2852c155130STom Rix #define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP 0xDD 2862c155130STom Rix #define TWL4030_PM_RECEIVER_NRESPWRON_TYPE 0xDE 2872c155130STom Rix #define TWL4030_PM_RECEIVER_NRESPWRON_REMAP 0xDF 2882c155130STom Rix #define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP 0xE0 2892c155130STom Rix #define TWL4030_PM_RECEIVER_CLKEN_TYPE 0xE1 2902c155130STom Rix #define TWL4030_PM_RECEIVER_CLKEN_REMAP 0xE2 2912c155130STom Rix #define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP 0xE3 2922c155130STom Rix #define TWL4030_PM_RECEIVER_SYSEN_TYPE 0xE4 2932c155130STom Rix #define TWL4030_PM_RECEIVER_SYSEN_REMAP 0xE5 2942c155130STom Rix #define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP 0xE6 2952c155130STom Rix #define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE 0xE7 2962c155130STom Rix #define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP 0xE8 2972c155130STom Rix #define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP 0xE9 2982c155130STom Rix #define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE 0xEA 2992c155130STom Rix #define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP 0xEB 3002c155130STom Rix #define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP 0xEC 3012c155130STom Rix #define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE 0xED 3022c155130STom Rix #define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP 0xEE 3032c155130STom Rix #define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP 0xEF 3042c155130STom Rix #define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0 3052c155130STom Rix #define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1 3062c155130STom Rix 3072c155130STom Rix /* LED */ 3082c155130STom Rix #define TWL4030_LED_LEDEN 0xEE 309*ead39d7aSGrazvydas Ignotas #define TWL4030_LED_LEDEN_LEDAON (1 << 0) 310*ead39d7aSGrazvydas Ignotas #define TWL4030_LED_LEDEN_LEDBON (1 << 1) 311*ead39d7aSGrazvydas Ignotas #define TWL4030_LED_LEDEN_LEDAPWM (1 << 4) 312*ead39d7aSGrazvydas Ignotas #define TWL4030_LED_LEDEN_LEDBPWM (1 << 5) 3138966eb4cSTom Rix 3148966eb4cSTom Rix /* Keypad */ 3158966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 3168966eb4cSTom Rix #define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 3178966eb4cSTom Rix #define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 3188966eb4cSTom Rix #define TWL4030_KEYPAD_LK_PTV_REG 0xD5 3198966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 3208966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 3218966eb4cSTom Rix #define TWL4030_KEYPAD_KBC_REG 0xD8 3228966eb4cSTom Rix #define TWL4030_KEYPAD_KBR_REG 0xD9 3238966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SMS 0xDA 3248966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB 3258966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC 3268966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD 3278966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE 3288966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF 3298966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 3308966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 3318966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 3328966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR1 0xE3 3338966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR1 0xE4 3348966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR2 0xE5 3358966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR2 0xE6 3368966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIR 0xE7 3378966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_EDR 0xE8 3388966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 3398966eb4cSTom Rix 3408966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) 3418966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) 3428966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) 3438966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) 3448966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) 3458966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) 3468966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) 3478966eb4cSTom Rix 3488966eb4cSTom Rix /* USB */ 349bffbb2a8STom Rix #define TWL4030_USB_VENDOR_ID_LO 0x00 350bffbb2a8STom Rix #define TWL4030_USB_VENDOR_ID_HI 0x01 351bffbb2a8STom Rix #define TWL4030_USB_PRODUCT_ID_LO 0x02 352bffbb2a8STom Rix #define TWL4030_USB_PRODUCT_ID_HI 0x03 353bffbb2a8STom Rix #define TWL4030_USB_FUNC_CTRL 0x04 354bffbb2a8STom Rix #define TWL4030_USB_FUNC_CTRL_SET 0x05 355bffbb2a8STom Rix #define TWL4030_USB_FUNC_CTRL_CLR 0x06 356bffbb2a8STom Rix #define TWL4030_USB_IFC_CTRL 0x07 357bffbb2a8STom Rix #define TWL4030_USB_IFC_CTRL_SET 0x08 358bffbb2a8STom Rix #define TWL4030_USB_IFC_CTRL_CLR 0x09 359bffbb2a8STom Rix #define TWL4030_USB_OTG_CTRL 0x0A 360bffbb2a8STom Rix #define TWL4030_USB_OTG_CTRL_SET 0x0B 361bffbb2a8STom Rix #define TWL4030_USB_OTG_CTRL_CLR 0x0C 362bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_RISE 0x0D 363bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_RISE_SET 0x0E 364bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_RISE_CLR 0x0F 365bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_FALL 0x10 366bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_FALL_SET 0x11 367bffbb2a8STom Rix #define TWL4030_USB_USB_INT_EN_FALL_CLR 0x12 368bffbb2a8STom Rix #define TWL4030_USB_USB_INT_STS 0x13 369bffbb2a8STom Rix #define TWL4030_USB_USB_INT_LATCH 0x14 370bffbb2a8STom Rix #define TWL4030_USB_DEBUG 0x15 371bffbb2a8STom Rix #define TWL4030_USB_SCRATCH_REG 0x16 372bffbb2a8STom Rix #define TWL4030_USB_SCRATCH_REG_SET 0x17 373bffbb2a8STom Rix #define TWL4030_USB_SCRATCH_REG_CLR 0x18 374bffbb2a8STom Rix #define TWL4030_USB_CARKIT_CTRL 0x19 375bffbb2a8STom Rix #define TWL4030_USB_CARKIT_CTRL_SET 0x1A 376bffbb2a8STom Rix #define TWL4030_USB_CARKIT_CTRL_CLR 0x1B 377bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_DELAY 0x1C 378bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_EN 0x1D 379bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_EN_SET 0x1E 380bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_EN_CLR 0x1F 381bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_STS 0x20 382bffbb2a8STom Rix #define TWL4030_USB_CARKIT_INT_LATCH 0x21 383bffbb2a8STom Rix #define TWL4030_USB_CARKIT_PLS_CTRL 0x22 384bffbb2a8STom Rix #define TWL4030_USB_CARKIT_PLS_CTRL_SET 0x23 385bffbb2a8STom Rix #define TWL4030_USB_CARKIT_PLS_CTRL_CLR 0x24 386bffbb2a8STom Rix #define TWL4030_USB_TRANS_POS_WIDTH 0x25 387bffbb2a8STom Rix #define TWL4030_USB_TRANS_NEG_WIDTH 0x26 388bffbb2a8STom Rix #define TWL4030_USB_RCV_PLTY_RECOVERY 0x27 389bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL 0x30 390bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL_SET 0x31 391bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL_CLR 0x32 392bffbb2a8STom Rix #define TWL4030_USB_MCPC_IO_CTRL 0x33 393bffbb2a8STom Rix #define TWL4030_USB_MCPC_IO_CTRL_SET 0x34 394bffbb2a8STom Rix #define TWL4030_USB_MCPC_IO_CTRL_CLR 0x35 395bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL2 0x36 396bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL2_SET 0x37 397bffbb2a8STom Rix #define TWL4030_USB_MCPC_CTRL2_CLR 0x38 398bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL 0x80 399bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL_SET 0x81 400bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL_CLR 0x82 401bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL 0x83 402bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL_SET 0x84 403bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL_CLR 0x85 404bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_EN_RISE_SET 0x87 405bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_EN_RISE_CLR 0x88 406bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_EN_FALL 0x89 407bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_EN_FALL_SET 0x8A 408bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_EN_FALL_CLR 0x8B 409bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_STS 0x8C 410bffbb2a8STom Rix #define TWL4030_USB_OTHER_INT_LATCH 0x8D 411bffbb2a8STom Rix #define TWL4030_USB_ID_STATUS 0x96 412bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_1_INT_EN 0x97 413bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_1_INT_EN_SET 0x98 414bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_1_INT_EN_CLR 0x99 415bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_1_INT_STS 0x9A 416bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_1_INT_LATCH 0x9B 417bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_2_INT_EN 0x9C 418bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_2_INT_EN_SET 0x9D 419bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_2_INT_EN_CLR 0x9E 420bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_2_INT_STS 0x9F 421bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_2_INT_LATCH 0xA0 422bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CTRL 0xA1 423bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CTRL_SET 0xA2 424bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CTRL_CLR 0xA3 425bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CMD 0xA4 426bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CMD_SET 0xA5 427bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CMD_CLR 0xA6 428bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CMD_STS 0xA7 429bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_STATUS 0xA8 430bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_ERR_STATUS 0xAA 431bffbb2a8STom Rix #define TWL4030_USB_CARKIT_SM_CTRL_STATE 0xAB 432bffbb2a8STom Rix #define TWL4030_USB_POWER_CTRL 0xAC 433bffbb2a8STom Rix #define TWL4030_USB_POWER_CTRL_SET 0xAD 434bffbb2a8STom Rix #define TWL4030_USB_POWER_CTRL_CLR 0xAE 435bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL2 0xAF 436bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL2_SET 0xB0 437bffbb2a8STom Rix #define TWL4030_USB_OTHER_IFC_CTRL2_CLR 0xB1 438bffbb2a8STom Rix #define TWL4030_USB_REG_CTRL_EN 0xB2 439bffbb2a8STom Rix #define TWL4030_USB_REG_CTRL_EN_SET 0xB3 440bffbb2a8STom Rix #define TWL4030_USB_REG_CTRL_EN_CLR 0xB4 441bffbb2a8STom Rix #define TWL4030_USB_REG_CTRL_ERROR 0xB5 442bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL2 0xB8 443bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL2_SET 0xB9 444bffbb2a8STom Rix #define TWL4030_USB_OTHER_FUNC_CTRL2_CLR 0xBA 445bffbb2a8STom Rix #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB 446bffbb2a8STom Rix #define TWL4030_USB_CARKIT_ANA_CTRL_SET 0xBC 447bffbb2a8STom Rix #define TWL4030_USB_CARKIT_ANA_CTRL_CLR 0xBD 448bffbb2a8STom Rix #define TWL4030_USB_VBUS_DEBOUNCE 0xC0 449bffbb2a8STom Rix #define TWL4030_USB_ID_DEBOUNCE 0xC1 450bffbb2a8STom Rix #define TWL4030_USB_TPH_DP_CON_MIN 0xC2 451bffbb2a8STom Rix #define TWL4030_USB_TPH_DP_CON_MAX 0xC3 452bffbb2a8STom Rix #define TWL4030_USB_TCR_DP_CON_MIN 0xC4 453bffbb2a8STom Rix #define TWL4030_USB_TCR_DP_CON_MAX 0xC5 454bffbb2a8STom Rix #define TWL4030_USB_TPH_DP_PD_SHORT 0xC6 455bffbb2a8STom Rix #define TWL4030_USB_TPH_CMD_DLY 0xC7 456bffbb2a8STom Rix #define TWL4030_USB_TPH_DET_RST 0xC8 457bffbb2a8STom Rix #define TWL4030_USB_TPH_AUD_BIAS 0xC9 458bffbb2a8STom Rix #define TWL4030_USB_TCR_UART_DET_MIN 0xCA 459bffbb2a8STom Rix #define TWL4030_USB_TCR_UART_DET_MAX 0xCB 460bffbb2a8STom Rix #define TWL4030_USB_TPH_ID_INT_PW 0xCD 461bffbb2a8STom Rix #define TWL4030_USB_TACC_ID_INT_WAIT 0xCE 462bffbb2a8STom Rix #define TWL4030_USB_TACC_ID_INT_PW 0xCF 463bffbb2a8STom Rix #define TWL4030_USB_TPH_CMD_WAIT 0xD0 464bffbb2a8STom Rix #define TWL4030_USB_TPH_ACK_WAIT 0xD1 465bffbb2a8STom Rix #define TWL4030_USB_TPH_DP_DISC_DET 0xD2 466bffbb2a8STom Rix #define TWL4030_USB_VBAT_TIMER 0xD3 467bffbb2a8STom Rix #define TWL4030_USB_CARKIT_4W_DEBUG 0xE0 468bffbb2a8STom Rix #define TWL4030_USB_CARKIT_5W_DEBUG 0xE1 469bffbb2a8STom Rix #define TWL4030_USB_PHY_PWR_CTRL 0xFD 470bffbb2a8STom Rix #define TWL4030_USB_PHY_CLK_CTRL 0xFE 471bffbb2a8STom Rix #define TWL4030_USB_PHY_CLK_CTRL_STS 0xFF 4728966eb4cSTom Rix 4738966eb4cSTom Rix /* 4748966eb4cSTom Rix * Convience functions to read and write from TWL4030 4758966eb4cSTom Rix * 4768966eb4cSTom Rix * chip_no is the i2c address, it must be one of the chip addresses 4778966eb4cSTom Rix * defined at the top of this file with the prefix TWL4030_CHIP_ 4788966eb4cSTom Rix * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD 4798966eb4cSTom Rix * 4808966eb4cSTom Rix * val is the data either written to or read from the twl4030 4818966eb4cSTom Rix * 4828966eb4cSTom Rix * reg is the register to act on, it must be one of the defines 4838966eb4cSTom Rix * above and with the format TWL4030_<chip suffix>_<register name> 4848966eb4cSTom Rix * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and 4858966eb4cSTom Rix * TWL4030_LED_LEDEN. 4868966eb4cSTom Rix */ 4878966eb4cSTom Rix static inline int twl4030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) 4888966eb4cSTom Rix { 4898966eb4cSTom Rix return i2c_write(chip_no, reg, 1, &val, 1); 4908966eb4cSTom Rix } 4918966eb4cSTom Rix 4928966eb4cSTom Rix static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) 4938966eb4cSTom Rix { 4948966eb4cSTom Rix return i2c_read(chip_no, reg, 1, val, 1); 4958966eb4cSTom Rix } 4968966eb4cSTom Rix 4972c155130STom Rix /* 4982c155130STom Rix * Power 4992c155130STom Rix */ 5002c155130STom Rix 501cd782635STom Rix /* For hardware resetting */ 502cd782635STom Rix void twl4030_power_reset_init(void); 5032c155130STom Rix /* For initializing power device */ 5042c155130STom Rix void twl4030_power_init(void); 505fccc0fcaSTom Rix /* For initializing mmc power */ 506fccc0fcaSTom Rix void twl4030_power_mmc_init(void); 507fccc0fcaSTom Rix 5082c155130STom Rix /* 5092c155130STom Rix * LED 5102c155130STom Rix */ 511*ead39d7aSGrazvydas Ignotas void twl4030_led_init(unsigned char ledon_mask); 512cd782635STom Rix 513bffbb2a8STom Rix /* 514bffbb2a8STom Rix * USB 515bffbb2a8STom Rix */ 516bffbb2a8STom Rix int twl4030_usb_ulpi_init(void); 517bffbb2a8STom Rix 5188966eb4cSTom Rix #endif /* TWL4030_H */ 519