18966eb4cSTom Rix /* 28966eb4cSTom Rix * Copyright (c) 2009 Wind River Systems, Inc. 38966eb4cSTom Rix * Tom Rix <Tom.Rix at windriver.com> 48966eb4cSTom Rix * 58966eb4cSTom Rix * This program is free software; you can redistribute it and/or 68966eb4cSTom Rix * modify it under the terms of the GNU General Public License as 78966eb4cSTom Rix * published by the Free Software Foundation; either version 2 of 88966eb4cSTom Rix * the License, or (at your option) any later version. 98966eb4cSTom Rix * 108966eb4cSTom Rix * This program is distributed in the hope that it will be useful, 118966eb4cSTom Rix * but WITHOUT ANY WARRANTY; without even the implied warranty of 128966eb4cSTom Rix * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 138966eb4cSTom Rix * GNU General Public License for more details. 148966eb4cSTom Rix * 158966eb4cSTom Rix * You should have received a copy of the GNU General Public License 168966eb4cSTom Rix * along with this program; if not, write to the Free Software 178966eb4cSTom Rix * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 188966eb4cSTom Rix * MA 02111-1307 USA 198966eb4cSTom Rix * 208966eb4cSTom Rix * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git 218966eb4cSTom Rix * 228966eb4cSTom Rix * Copyright (C) 2007-2009 Texas Instruments, Inc. 238966eb4cSTom Rix */ 248966eb4cSTom Rix 258966eb4cSTom Rix #ifndef TWL4030_H 268966eb4cSTom Rix #define TWL4030_H 278966eb4cSTom Rix 288966eb4cSTom Rix #include <common.h> 298966eb4cSTom Rix #include <i2c.h> 308966eb4cSTom Rix 318966eb4cSTom Rix /* I2C chip addresses */ 328966eb4cSTom Rix 338966eb4cSTom Rix /* USB */ 348966eb4cSTom Rix #define TWL4030_CHIP_USB 0x48 358966eb4cSTom Rix /* AUD */ 368966eb4cSTom Rix #define TWL4030_CHIP_AUDIO_VOICE 0x49 378966eb4cSTom Rix #define TWL4030_CHIP_GPIO 0x49 388966eb4cSTom Rix #define TWL4030_CHIP_INTBR 0x49 398966eb4cSTom Rix #define TWL4030_CHIP_PIH 0x49 408966eb4cSTom Rix #define TWL4030_CHIP_TEST 0x49 418966eb4cSTom Rix /* AUX */ 428966eb4cSTom Rix #define TWL4030_CHIP_KEYPAD 0x4a 438966eb4cSTom Rix #define TWL4030_CHIP_MADC 0x4a 448966eb4cSTom Rix #define TWL4030_CHIP_INTERRUPTS 0x4a 458966eb4cSTom Rix #define TWL4030_CHIP_LED 0x4a 468966eb4cSTom Rix #define TWL4030_CHIP_MAIN_CHARGE 0x4a 478966eb4cSTom Rix #define TWL4030_CHIP_PRECHARGE 0x4a 488966eb4cSTom Rix #define TWL4030_CHIP_PWM0 0x4a 498966eb4cSTom Rix #define TWL4030_CHIP_PWM1 0x4a 508966eb4cSTom Rix #define TWL4030_CHIP_PWMA 0x4a 518966eb4cSTom Rix #define TWL4030_CHIP_PWMB 0x4a 528966eb4cSTom Rix /* POWER */ 538966eb4cSTom Rix #define TWL4030_CHIP_BACKUP 0x4b 548966eb4cSTom Rix #define TWL4030_CHIP_INT 0x4b 558966eb4cSTom Rix #define TWL4030_CHIP_PM_MASTER 0x4b 568966eb4cSTom Rix #define TWL4030_CHIP_PM_RECEIVER 0x4b 578966eb4cSTom Rix #define TWL4030_CHIP_RTC 0x4b 588966eb4cSTom Rix #define TWL4030_CHIP_SECURED_REG 0x4b 598966eb4cSTom Rix 608966eb4cSTom Rix /* Register base addresses */ 618966eb4cSTom Rix 628966eb4cSTom Rix /* USB */ 638966eb4cSTom Rix #define TWL4030_BASEADD_USB 0x0000 648966eb4cSTom Rix /* AUD */ 658966eb4cSTom Rix #define TWL4030_BASEADD_AUDIO_VOICE 0x0000 668966eb4cSTom Rix #define TWL4030_BASEADD_GPIO 0x0098 678966eb4cSTom Rix #define TWL4030_BASEADD_INTBR 0x0085 688966eb4cSTom Rix #define TWL4030_BASEADD_PIH 0x0080 698966eb4cSTom Rix #define TWL4030_BASEADD_TEST 0x004C 708966eb4cSTom Rix /* AUX */ 718966eb4cSTom Rix #define TWL4030_BASEADD_INTERRUPTS 0x00B9 728966eb4cSTom Rix #define TWL4030_BASEADD_LED 0x00EE 738966eb4cSTom Rix #define TWL4030_BASEADD_MADC 0x0000 748966eb4cSTom Rix #define TWL4030_BASEADD_MAIN_CHARGE 0x0074 758966eb4cSTom Rix #define TWL4030_BASEADD_PRECHARGE 0x00AA 768966eb4cSTom Rix #define TWL4030_BASEADD_PWM0 0x00F8 778966eb4cSTom Rix #define TWL4030_BASEADD_PWM1 0x00FB 788966eb4cSTom Rix #define TWL4030_BASEADD_PWMA 0x00EF 798966eb4cSTom Rix #define TWL4030_BASEADD_PWMB 0x00F1 808966eb4cSTom Rix #define TWL4030_BASEADD_KEYPAD 0x00D2 818966eb4cSTom Rix /* POWER */ 828966eb4cSTom Rix #define TWL4030_BASEADD_BACKUP 0x0014 838966eb4cSTom Rix #define TWL4030_BASEADD_INT 0x002E 848966eb4cSTom Rix #define TWL4030_BASEADD_PM_MASTER 0x0036 858966eb4cSTom Rix #define TWL4030_BASEADD_PM_RECIEVER 0x005B 868966eb4cSTom Rix #define TWL4030_BASEADD_RTC 0x001C 878966eb4cSTom Rix #define TWL4030_BASEADD_SECURED_REG 0x0000 888966eb4cSTom Rix 898966eb4cSTom Rix /* 908966eb4cSTom Rix * Power Management Master 918966eb4cSTom Rix */ 928966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 938966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 948966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 958966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 968966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_BOOT 0x3A 978966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_BOOT 0x3B 988966eb4cSTom Rix #define TWL4030_PM_MASTER_SHUNDAN 0x3C 998966eb4cSTom Rix #define TWL4030_PM_MASTER_BOOT_BCI 0x3D 1008966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E 1018966eb4cSTom Rix #define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F 1028966eb4cSTom Rix #define TWL4030_PM_MASTER_BGAP_TRIM 0x40 1038966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 1048966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 1058966eb4cSTom Rix #define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 1068966eb4cSTom Rix #define TWL4030_PM_MASTER_PROTECT_KEY 0x44 1078966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 1088966eb4cSTom Rix #define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 1098966eb4cSTom Rix #define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 1108966eb4cSTom Rix #define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 1118966eb4cSTom Rix #define TWL4030_PM_MASTER_STS_P123_STATE 0x49 1128966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_CFG 0x4A 1138966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B 1148966eb4cSTom Rix #define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C 1158966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 1168966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 1178966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 1188966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 1198966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 1208966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 1218966eb4cSTom Rix #define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 1228966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 1238966eb4cSTom Rix #define TWL4030_PM_MASTER_MEMORY_DATA 0x5A 1248966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_CONFIG 0x5B 1258966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT1 0x5C 1268966eb4cSTom Rix #define TWL4030_PM_MASTER_SC_DETECT2 0x5D 1278966eb4cSTom Rix #define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E 1288966eb4cSTom Rix #define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F 1298966eb4cSTom Rix #define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 1308966eb4cSTom Rix #define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 1318966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 1328966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 1338966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 1348966eb4cSTom Rix #define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 1358966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM1 0x66 1368966eb4cSTom Rix #define TWL4030_PM_MASTER_VIO_TRIM2 0x67 1378966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_CFG 0x68 1388966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_A 0x69 1398966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_B 0x6A 1408966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_C 0x6B 1418966eb4cSTom Rix #define TWL4030_PM_MASTER_LS_TST_D 0x6C 1428966eb4cSTom Rix #define TWL4030_PM_MASTER_BB_CFG 0x6D 1438966eb4cSTom Rix #define TWL4030_PM_MASTER_MISC_TST 0x6E 1448966eb4cSTom Rix #define TWL4030_PM_MASTER_TRIM1 0x6F 1458966eb4cSTom Rix /* P[1-3]_SW_EVENTS */ 1468966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) 1478966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) 1488966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) 1498966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) 1508966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) 1518966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) 1528966eb4cSTom Rix #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) 1538966eb4cSTom Rix 1548966eb4cSTom Rix /* Power Managment Receiver */ 1558966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC 1568966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD 1578966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE 1588966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF 1598966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 1608966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 1618966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 1628966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 1638966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 1648966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 1658966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_TYPE 0xD6 1668966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSBCP_DEV_REMAP 0xD7 1678966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 1688966eb4cSTom Rix #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 1698966eb4cSTom Rix 1708966eb4cSTom Rix /* Keypad */ 1718966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 1728966eb4cSTom Rix #define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 1738966eb4cSTom Rix #define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 1748966eb4cSTom Rix #define TWL4030_KEYPAD_LK_PTV_REG 0xD5 1758966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 1768966eb4cSTom Rix #define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 1778966eb4cSTom Rix #define TWL4030_KEYPAD_KBC_REG 0xD8 1788966eb4cSTom Rix #define TWL4030_KEYPAD_KBR_REG 0xD9 1798966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SMS 0xDA 1808966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB 1818966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC 1828966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD 1838966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE 1848966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF 1858966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 1868966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 1878966eb4cSTom Rix #define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 1888966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR1 0xE3 1898966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR1 0xE4 1908966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_ISR2 0xE5 1918966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_IMR2 0xE6 1928966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIR 0xE7 1938966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_EDR 0xE8 1948966eb4cSTom Rix #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 1958966eb4cSTom Rix 1968966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) 1978966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) 1988966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) 1998966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) 2008966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) 2018966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) 2028966eb4cSTom Rix #define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) 2038966eb4cSTom Rix 2048966eb4cSTom Rix /* USB */ 2058966eb4cSTom Rix #define TWL4030_USB_FUNC_CTRL (0x04) 2068966eb4cSTom Rix #define TWL4030_USB_OPMODE_MASK (3 << 3) 2078966eb4cSTom Rix #define TWL4030_USB_XCVRSELECT_MASK (3 << 0) 2088966eb4cSTom Rix #define TWL4030_USB_IFC_CTRL (0x07) 2098966eb4cSTom Rix #define TWL4030_USB_CARKITMODE (1 << 2) 2108966eb4cSTom Rix #define TWL4030_USB_POWER_CTRL (0xAC) 2118966eb4cSTom Rix #define TWL4030_USB_OTG_ENAB (1 << 5) 2128966eb4cSTom Rix #define TWL4030_USB_PHY_PWR_CTRL (0xFD) 2138966eb4cSTom Rix #define TWL4030_USB_PHYPWD (1 << 0) 2148966eb4cSTom Rix #define TWL4030_USB_PHY_CLK_CTRL (0xFE) 2158966eb4cSTom Rix #define TWL4030_USB_CLOCKGATING_EN (1 << 2) 2168966eb4cSTom Rix #define TWL4030_USB_CLK32K_EN (1 << 1) 2178966eb4cSTom Rix #define TWL4030_USB_REQ_PHY_DPLL_CLK (1 << 0) 2188966eb4cSTom Rix #define TWL4030_USB_PHY_CLK_CTRL_STS (0xFF) 2198966eb4cSTom Rix #define TWL4030_USB_PHY_DPLL_CLK (1 << 0) 2208966eb4cSTom Rix 2218966eb4cSTom Rix /* 2228966eb4cSTom Rix * Convience functions to read and write from TWL4030 2238966eb4cSTom Rix * 2248966eb4cSTom Rix * chip_no is the i2c address, it must be one of the chip addresses 2258966eb4cSTom Rix * defined at the top of this file with the prefix TWL4030_CHIP_ 2268966eb4cSTom Rix * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD 2278966eb4cSTom Rix * 2288966eb4cSTom Rix * val is the data either written to or read from the twl4030 2298966eb4cSTom Rix * 2308966eb4cSTom Rix * reg is the register to act on, it must be one of the defines 2318966eb4cSTom Rix * above and with the format TWL4030_<chip suffix>_<register name> 2328966eb4cSTom Rix * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and 2338966eb4cSTom Rix * TWL4030_LED_LEDEN. 2348966eb4cSTom Rix */ 2358966eb4cSTom Rix static inline int twl4030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) 2368966eb4cSTom Rix { 2378966eb4cSTom Rix return i2c_write(chip_no, reg, 1, &val, 1); 2388966eb4cSTom Rix } 2398966eb4cSTom Rix 2408966eb4cSTom Rix static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) 2418966eb4cSTom Rix { 2428966eb4cSTom Rix return i2c_read(chip_no, reg, 1, val, 1); 2438966eb4cSTom Rix } 2448966eb4cSTom Rix 245*cd782635STom Rix /* For hardware resetting */ 246*cd782635STom Rix void twl4030_power_reset_init(void); 247*cd782635STom Rix 2488966eb4cSTom Rix #endif /* TWL4030_H */ 249